Commit graph

24298 commits

Author SHA1 Message Date
Karol Herbst
606b74035e lima: use nir_src_as_float
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-04-14 22:25:56 +02:00
Alyssa Rosenzweig
1e2cb3e964 panfrost/midgard: Use shared nir_lower_viewport_transform
v2: Run before lowering I/O.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-04-14 19:16:29 +00:00
Alyssa Rosenzweig
89b02bffcb panfrost: Cleanup indexed draw handling
As part of this cleanup, we use the newly-exposed
u_vbuf_get_minmax_index, deduplicating quite a bit of bookkeeping. We
also centralize the draw_flags tracking to make this code cleaner /
futureproofed; we have already had bugs regarding this field so we might
as well get it right now.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-14 15:25:46 +00:00
Alyssa Rosenzweig
74b17b9a9f panfrost/midgard: Drop dependence on mesa/st
This was used as a workaround for uniform sizing which was fixed in
771adffe ("st: Lower uniforms in st in the...")

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-14 15:25:46 +00:00
Qiang Yu
b46b661f53 lima/gpir: fix alu check miss last store slot
Fixes: 92d7ca4b1c "gallium: add lima driver"
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
2019-04-14 12:10:23 +08:00
Qiang Yu
8d91cd64aa lima/gpir: fix compile fail when two slot node
Come from glmark2-es2 jellyfish test.

Fixes: 92d7ca4b1c "gallium: add lima driver"
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
2019-04-14 12:10:23 +08:00
Vasily Khoruzhick
fef2f10cc2 lima: add support for depth/stencil fbo attachments and textures
Hardware supports writing back Z/S buffers and sampling from them,
so add support for that.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Icenowy Zheng <icenowy@aosc.io>
2019-04-14 01:16:00 +00:00
Vasily Khoruzhick
a817f0fec6 lima: use individual tile heap for each GP job.
Looks like it's somehow used by subsequent PP job, so we have to
preserve its contents until PP job is done.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Icenowy Zheng <icenowy@aosc.io>
2019-04-14 01:16:00 +00:00
Eric Anholt
dc402be73e v3d: Use the new lower_to_scratch implementation for indirects on temps.
We can use the same register spilling infrastructure for our loads/stores
of indirect access of temp variables, instead of doing an if ladder.

Cuts 50% of instructions and max-temps from 2 KSP shaders in shader-db.
Also causes several other KSP shaders with large bodies and large loop
counts to not be force-unrolled.

The change was originally motivated by NOLTIS slightly modifying register
pressure in piglit temp mat4 array read/write tests, triggering register
allocation failures.
2019-04-12 16:16:58 -07:00
Eric Anholt
8a2d91e124 v3d: Detect the correct number of QPUs and use it to fix the spill size.
We were missing a * 4 even if the particular hardware matched our
assumption.
2019-04-12 15:59:31 -07:00
Eric Anholt
6b1c659825 v3d: Add Compute Shader compilation support.
While waiting for the CSD UABI to get reviewed, I keep having to rebase
the CS patch.  Just land the compiler side for now to keep it from
diverging.

For now this covers just GLES 3.1 compute shaders, not CL kernels.
2019-04-12 15:59:31 -07:00
Eric Anholt
276ec879fd v3d: Drop a note for the future about PIPE_CAP_PACKED_UNIFORMS. 2019-04-12 15:58:28 -07:00
Mateusz Krzak
f4fc2ece57 panfrost: use os_mmap and os_munmap
32-bit needs mmap64 for 64-bit offsets. We get 64-bit offsets from kernel.

Signed-off-by: Mateusz Krzak <kszaquitto@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-12 16:33:00 +00:00
Mateusz Krzak
411da8b80d panfrost: cast bo_handles pointer to uintptr_t first
Required for 64-bit kernel to interpret the pointer from 32-bit userspace.

Signed-off-by: Mateusz Krzak <kszaquitto@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-12 16:33:00 +00:00
Marek Olšák
971bc10177 radeonsi: set AC_FUNC_ATTR_READNONE for image opcodes where it was missing
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-12 11:34:39 -04:00
Samuel Pitoiset
fd4041987b ac: add ac_build_load_helper_invocation() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-12 17:30:55 +02:00
Samuel Pitoiset
590a4c8981 ac: add ac_build_ddxy_interp() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-12 17:30:55 +02:00
Karol Herbst
a55c7352d6 lima: add bool parameter to type_size function
Fixes: 035759b61b
       ("nir/i965/freedreno/vc4: add a bindless bool to type size functions")

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-04-12 17:08:53 +02:00
Karol Herbst
98934e6aa1 nvc0/nir: enable bindless texture
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2019-04-12 09:02:59 +02:00
Karol Herbst
89a81fbd98 nv50/ir/nir: add support for bindless images
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2019-04-12 09:02:59 +02:00
Karol Herbst
b286cdedb7 nv50/ir/nir: handle bindless texture
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2019-04-12 09:02:59 +02:00
Karol Herbst
4a3c04a11f glsl/nir: add support for lowering bindless images_derefs
v2: handle atomics as well
    make use of nir_rewrite_image_intrinsic
v3: remove call to nir_remove_dead_derefs
v4: (Timothy Arceri) dont actually call lowering yet

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v3)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-12 09:02:59 +02:00
Timothy Arceri
035759b61b nir/i965/freedreno/vc4: add a bindless bool to type size functions
This required to calculate sizes correctly when we have bindless
samplers/images.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-12 09:02:59 +02:00
Karol Herbst
3b2a9ffd60 nir: move brw_nir_rewrite_image_intrinsic into common code
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-04-12 09:02:59 +02:00
Icenowy Zheng
400f0bfba1 lima: lower bool to float when building shaders
Both processors of Mali Utgard are float-only, so bool are not
acceptable data type of them. Fortunately the NIR compiler
infrastructure has a lower pass to lower bool to float.

Call this lower pass to lower bool to float for both GP and PP. This
makes Glamor on Xorg server 1.20.3 at least doesn't hang when starting
gtk3-demo.

The old map of nir op bcsel is changed to fcsel, and the map of b2f32 in
PP is dropped because it's not needed now (it's originally only mapped
to ppir_op_mov).

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-04-12 13:40:47 +08:00
Tomeu Vizoso
8f1c686bca panfrost: Guard against reading past end of buffer
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-12 07:12:17 +02:00
Tomeu Vizoso
c35ae93803 panfrost: split asserts in pandecode
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-04-12 07:11:52 +02:00
Dave Airlie
604d89c2d1 llvmpipe: fix undefined shift 1 << 31.
Pointed out by coverity.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2019-04-12 08:54:02 +10:00
Kenneth Graunke
4fcb749044 iris: Actually pin the scratch BO.
We were pinning it for compute shaders, and pinning it when restoring
saved buffers, but we never actually pinned it in the original batch
for VS/TCS/TES/GS/FS.

Fixes rendering in GFXBench5's Tessellation demo and a bunch of Piglit
geometry shader tests.
2019-04-11 15:03:27 -07:00
Lubomir Rintel
3dd2001993 kmsro: Extend to include armada-drm
This allows using the Marvell Armada display controllers (with the
armada drm modesetting driver) along with the render-only drivers,
such as Etnaviv on an OLPC XO-1.75 laptop.

v2:
- Add to Android.mk too

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-04-11 15:53:29 +00:00
Icenowy Zheng
a155c26a66 lima: implement blit with util_blitter
As we have already prepared for using util_blitter, use it to implement
lima_blit.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-04-11 13:45:51 +00:00
Icenowy Zheng
318ccbe7b2 lima: make lima_context_framebuffer subtype of pipe_framebuffer_state
Currently the lima driver saves the framebuffer state in its
from-scratch struct lima_context_framebuffer. However, util_blitter
requires to save framebuffer with standard struct
pipe_framebuffer_state.

Make the lima_context_framebuffer a subtype of the standard
pipe_framebuffer_state, thus the standard part can be used for
util_blitter framebuffer state saving.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-04-11 13:45:51 +00:00
Icenowy Zheng
8d27bc351f lima: add dummy set_sample_mask function
The set_sample_mask function is required in util_blitter.

Add a dummy one to make util_blitter work.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
2019-04-11 13:45:51 +00:00
Erik Faye-Lund
b60a13d5cb virgl: use debug_printf instead of fprintf
While we're at it, prefix the string with "VIRGL: ", to match similar
code elsewhere in virgl.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-04-11 09:53:25 +02:00
Erik Faye-Lund
7394ef4a72 virgl: do not warn about display-target binding
We never want to display a transfer-temp surface, so let's ignore that
flag when calculating the new binding flags.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-04-11 09:53:22 +02:00
Erik Faye-Lund
27d94a83cd virgl: only warn about unchecked flags
The other flags are already vetted, so there's no point in reporting
them.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-04-11 09:53:15 +02:00
Erik Faye-Lund
8f1a147d68 virgl: unsigned int -> unsigned
We don't usually spell out the int part of unsigned.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-04-11 09:53:10 +02:00
Rob Herring
2b780fe893 kmsro: Add platform support for exynos and sun4i
v2:
- add Android.mk change

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
2019-04-11 09:57:53 +08:00
Qiang Yu
92d7ca4b1c gallium: add lima driver
v2:
- use renamed util_dynarray_grow_cap
- use DEBUG_GET_ONCE_FLAGS_OPTION for debug flags
- remove DRM_FORMAT_MOD_ARM_AGTB_MODE0 usage
- compute min/max index in driver

v3:
- fix plbu framebuffer state calculation
- fix color_16pc assemble
- use nir_lower_all_source_mods for lowering neg/abs/sat
- use float arrary for static GPU data
- add disassemble comment for static shader code
- use drm_find_modifier

v4:
- use lima_nir_lower_uniform_to_scalar

v5:
- remove nir_opt_global_to_local when rebase

Cc: Rob Clark <robdclark@gmail.com>
Cc: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Arno Messiaen <arnomessiaen@gmail.com>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: marmeladema <xademax@gmail.com>
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rohan Garg <rohan@garg.io>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
2019-04-11 09:57:53 +08:00
Mark Janes
2393cc7f00 intel/common: move gen_debug to intel/dev
libintel_common depends on libintel_compiler, but it contains debug
functionality that is needed by libintel_compiler.  Break the circular
dependency by moving gen_debug files to libintel_dev.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-10 13:15:33 -07:00
Mike Blumenkrantz
03d6d01fe2 iris: support INTEL_NO_HW environment variable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-10 12:59:17 -07:00
Eric Anholt
afad1f7d62 vc4: Upload CS/VS UBO uniforms together.
Same as I did for V3D, drop all this code trying to GC the
non-indirectly-loaded uniforms from the UBO that's used for indirect
access of gallium cb[0].  While it does successfully drop some of those,
it came at the cost of uploading the VS's indirect unifroms twice, for the
bin and render versions of the shader.

With the UBO loads simplified, I was also able to easily backport V3D's
change to pack a UBO offset into the uniform_data[] field so that we don't
need to do the add of the uniform base in the shader.

As a bonus, now vc4 doesn't depend on mesa/st type_size functions.

total uniforms in shared programs: 25514 -> 25490 (-0.09%)
total instructions in shared programs: 77019 -> 76836 (-0.24%)
2019-04-10 11:45:30 -07:00
Eric Anholt
0204fb77e0 vc4: Split UBO0 and UBO1 address uniform handling.
I'm going to extend how UBO0 works in a moment.
2019-04-10 11:45:30 -07:00
Eric Anholt
7347d09d6a vc4: Don't forget to set the range when scalarizing our uniforms.
In the next commit, we'll want this for handling UBO access clamping.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-10 11:45:30 -07:00
Eric Anholt
771adffec1 st: Lower uniforms in st in the !PIPE_CAP_PACKED_UNIFORMS case as well.
PIPE_CAP_PACKED_UNIFORMS conflates several things: Lowering uniforms i/o
at the st level instead of the backend, packing uniforms with no padding
at all, and lowering to UBOs.

Requiring backends to lower uniforms i/o for !PIPE_CAP_PACKED_UNIFORMS
leads to the driver needing to either link against the type size function
in mesa/st, or duplicating it in the backend.  Given that all backends
want this lower-io as far as I can tell, just move it to mesa/st to
resolve the link issue and avoid the driver author needing to understand
st's uniforms layout.

Incidentally, fixes uniform layout failures in nouveau in:

dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_fragment
dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_vertex
dEQP-GLES2.functional.shaders.struct.uniform.sampler_array_fragment
dEQP-GLES2.functional.shaders.struct.uniform.sampler_array_vertex

and I think in Lima as well.

v2: fix indents

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-04-10 11:44:20 -07:00
Erik Faye-Lund
7c05c95d05 virgl: use debug_printf instead of fprintf
While we're at it, prefix the string with "VIRGL: ", to match similar
code elsewhere in virgl.

Fixes: d7b3196976 ("virgl: Return an error if we use fp64 on top of GLES")
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
2019-04-10 14:27:45 +02:00
Gert Wollny
04e672257c virgl: Enable passing arrays as input to fragment shaders
This is needed to properly handle interpolateAt* when the input to be
interpolated is passed as array in the original GLSL.

Currently, the the GLSL compiler would lower selecting the correct input so
that the interpolant parameter to interpolateAt* is a temporary, and this
can not be used to create a valid shader on the host side, because here the
parameter must a shader input.

By allowing the passing the created TGSI allows to create proper GLSL.
This is related to the virglrenderer bug
  https://gitlab.freedesktop.org/virgl/virglrenderer/issues/74

v2: Squash the two patches handling these flags into another

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
2019-04-10 11:09:40 +02:00
Lepton Wu
1f063c0bfb virgl: Set bind when creating temp resource.
virgl render complains about "Illegal resource" when running
dEQP-EGL.functional.color_clears.single_context.gles2.rgb888_window,
the reason is that a zero bind value was given for temp resource.

Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
2019-04-09 19:25:25 -07:00
Khaled Emara
f0fb73dcf6 freedreno: PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT unreachable statement
There seems to be a duplicate return statement,
as A2XX doesn't support shader buffers.

Reviewed-by: Rob Clark <robdclark@gmail.com>
2019-04-09 17:31:06 -04:00
Gert Wollny
b999865f55 softpipe: Enable PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT
The offset alignment must be set to s16 because the tile cache is
implemented to require this.

This enables ARB_buffer_texture_range and OES_texture_buffer for
softpipe. The according deqp-gles31 tests pass.

Also update the feature table.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-04-09 08:17:45 +00:00