Commit graph

15715 commits

Author SHA1 Message Date
Georg Lehmann
5fb54d1fde aco/ra: fix copying 64bit literal to sgprs
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
2024-09-02 11:09:55 +00:00
Georg Lehmann
364764356c aco/ra: use parallelcopy to copy literal instead of s_mov
This can result in smaller code size.

Foz-DB Vega10:
Totals from 4745 (7.53% of 63053) affected shaders:
CodeSize: 33014176 -> 33007088 (-0.02%); split: -0.02%, +0.00%
Copies: 690055 -> 704738 (+2.13%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
2024-09-02 11:09:55 +00:00
Georg Lehmann
607cf5a8e9 aco/ra: unconditionally replace literal with sgpr when promoting to VOP3
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30932>
2024-09-02 11:09:55 +00:00
Samuel Pitoiset
8873382703 radv: fix emitting DGC indirect draws with drawid/base_instance
This fixes test_execute_indirect_state_vbo_offsets, a new vkd3d-proton
test.

The drawid/base_instance bits were cleared by mistake.

Fixes: e59a16bbb8 ("radv: use an indirect draw when IBO isn't updated as part of DGC")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30971>
2024-09-02 09:58:32 +00:00
Samuel Pitoiset
e4e789ce10 radv: allow VK_EXT_legacy_vertex_attributes with DGC
Dynamic vertex input state is supported with DGC but it wasn't at the
time this extension has been introduced.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30957>
2024-09-02 09:09:07 +00:00
Collabora's Gfx CI Team
b32b15f0df Uprev Piglit to 93b4bd2e0aaab1c22ae3e1a23f9e057a8f7451b2
a3826de3c2...93b4bd2e0a

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30863>
2024-09-02 08:30:51 +00:00
Samuel Pitoiset
45319cb253 radv: specialize push constant stages with DGC
Even if the layout declares using push constant for more stages than
needed, upload_sgpr/inline_sgpr will prevent the DGC prepare shader to
emit them because it's initialized to 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
2024-08-30 18:02:23 +00:00
Samuel Pitoiset
8c5358040d radv: move emitting VBOs with DGC
Only for graphics.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
2024-08-30 18:02:22 +00:00
Samuel Pitoiset
2234e6d75a radv: add a helper to store data to the DGC upload space
The offset is automatically incremented when something is stored.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
2024-08-30 18:02:22 +00:00
Samuel Pitoiset
330d6e0951 radv: stop passing the upload offset to dgc_emit_bind_pipeline()
This doesn't do anything.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
2024-08-30 18:02:22 +00:00
Samuel Pitoiset
e96be348f2 radv: move emitting the compute pipeline with DGC
Only compute is supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30924>
2024-08-30 18:02:22 +00:00
Sai Teja
05f6e9f11e ci: Disable angle jobs for GL changes
Mesa's GL stack changes doesn't affect angle in any
way for now. Thus, drop angle jobs for GL changes from
intel and amd CI.

Signed-off-by: Sai Teja <saiteja13427@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30943>
2024-08-30 15:09:15 +00:00
Qiang Yu
588a65f29a ac: do not lower some ops in nir_lower_packing
AMD does not implement nir_op_pack_32_4x8_split, others
are implemented, so don't lower them.

Fixes: 0f937426cc ("radeonsi: lower subgroup ops after wave size is known")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11781
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30885>
2024-08-30 05:46:51 +00:00
Yinjie Yao
7f1c0fbe61 radeonsi/vcn: Rename transform_skip_disabled and remove hardcoded value for VCN5
This fix the HEVC encode corruption caused by mismatch between PPS
header and IB setting, the fix only apply for VCN5.
Rename from transform_skip_dicarded to transform_skip_disabled.

Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30930>
2024-08-30 01:17:22 +00:00
Eric Engestrom
66bae75d47 radeonsi/ci: mark a bunch of subgroups tests as failing
Fixes: 48a49c4e04 ("radeonsi: enable KHR_shader_subgroup")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
2024-08-29 19:21:52 +00:00
Eric Engestrom
39d6251141 radeonsi/ci: bump timeout for nightly job glcts-vangogh-valve
It now takes ~45min (likely due to new failures being retried, itself
caused by KHR_shader_subgroup being added), but let's bump the timeout
a bit higher to avoid having to do this again soon.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
2024-08-29 19:21:52 +00:00
Valentine Burley
b37e06fd58 vulkan, radv: Add new common vk_format_get_plane_width/height helpers
Add new vk_format_get_plane_width/height helpers using ycbcr_info and use it to
replace RADV's ones which relied on util_format_get_plane_width/height.

We already have this data in the YCbCr table, so this avoids having the maintain the list
of pipe formats in util_format_get_plane_width/height.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30899>
2024-08-29 15:57:51 +00:00
Faith Ekstrand
8c60f1461b vulkan: Take a VkPipelineCreateFlags2KHR in vk_pipeline_*shader_stage*()
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30876>
2024-08-29 03:30:31 +00:00
Eric Engestrom
5434aa79f5 ci: run only one vkd3d test at a time
Both radv and nvk seem to be having a lot of random failures when there
are several tests running in parallel.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24739>
2024-08-29 00:18:54 +00:00
Eric Engestrom
23e9cbc623 ci/vkd3d: use upstream test-runner.sh for process isolation
Once again, making sure the input (*-vkd3d-*.txt) have the same format
as deqp-runner so that users don't have to care which one they're using,
and the output is also in the same format so that tools automatically
handle everything.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24739>
2024-08-29 00:18:54 +00:00
Faith Ekstrand
3e1d847d37 radv: Use the SPIR-V printer in spirv_to_nir
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30875>
2024-08-28 21:52:59 +00:00
Samuel Pitoiset
7392e3306e radv: remove useless check about non-indexed draws and DGC
The index buffer is only emitted inside the indexed draw path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Samuel Pitoiset
0e1e5264b5 radv: specialize indirect command layout stride for DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Samuel Pitoiset
8edbfbfe68 radv: specialize push constant DGC token
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Samuel Pitoiset
7d0972711c radv: simplify allocating push constants with DGC
Using a condition will allow to specialize it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Samuel Pitoiset
545949d12f radv: specialize VBO DGC token
Can't really specialize more without rewriting VBO completely.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Samuel Pitoiset
64076c652c radv: specialize pipeline DGC token
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Samuel Pitoiset
7270bf7aa3 radv: specialize index buffer DGC token
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Samuel Pitoiset
3128eca2d0 radv: specialize draw DGC token
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Samuel Pitoiset
ccd55b55da radv: specialize dispatch DGC token
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Samuel Pitoiset
b4793400f3 radv: add a pointer to the DGC layout in dgc_cmdbuf
Will be useful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Samuel Pitoiset
c7540d3fd6 radv: prepare for specialized DGC shaders
The DGC prepare shader is getting crazy and it takes a non-trivial
amount of time. Using specialized DGC shaders is cleaner and it's
faster than a pile of conditional SALU instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>
2024-08-28 11:03:36 +00:00
Georg Lehmann
246e22ff4f aco/tests: do not use mul with constant to tests neg modifier
The neg can be moved to the constant operand, which defeats the point
of the test.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30781>
2024-08-27 20:41:10 +00:00
Georg Lehmann
bf67ac30fe aco/tests: allow literals with resolved swizzles in vop3p test
My new optimizer code will resolve swizzles for constants.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30781>
2024-08-27 20:41:09 +00:00
Georg Lehmann
6a18eb6afc aco/tests: parse neg(constant) in vop3p test
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30781>
2024-08-27 20:41:09 +00:00
Georg Lehmann
52465956ca aco/print_ir: use neg() for constants
Otherwise, it's not clear if -1 is 0xffffffff or 0x80000001.
LLVM uses a similar logic.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30781>
2024-08-27 20:41:09 +00:00
Georg Lehmann
fb8e730d9b aco/tests: do not use add to tests neg modifer
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30781>
2024-08-27 20:41:09 +00:00
Georg Lehmann
f71522e5cf aco/tests: don't test dpp constant propagation with row shift
With bc=1, removing DPP for shifts is invalid.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30781>
2024-08-27 20:41:09 +00:00
Samuel Pitoiset
2fda0db66f ac,radeonsi,radv: add common GFX preambles
RADV and RadeonSI have a few differences.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30789>
2024-08-27 14:14:57 +00:00
Samuel Pitoiset
80e8e18cc6 ac: add ac_gfx103_get_cu_mask_ps()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30789>
2024-08-27 14:14:57 +00:00
Samuel Pitoiset
9bfb23b252 radv: rework computing the DGC cmdbuf layout
This is much better and less error prone because the offset/size are
computed in only one place now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30868>
2024-08-27 12:36:36 +00:00
Samuel Pitoiset
4c1a912372 radv: remove RADV_DEBUG=nogsfastlaunch2
It's been two Mesa releases since this fast-launch mode2 has been fixed
on GFX11 and everything works as expected. The option is no longer
needed, note that GFX12 only has mode2 apparently.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30815>
2024-08-27 07:51:33 +00:00
Dave Airlie
7db16e7cdd radv: turn video decode/encode on for VCN4 with latest fw
With the latest fw in the linux-firmware repo, navi3x passes
all the CTS tests.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30837>
2024-08-26 22:19:09 +00:00
Dave Airlie
4255bbd958 radv: move video decode enable test into a flag
This makes it easier to start conditionalising this on fw releases.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30837>
2024-08-26 22:19:09 +00:00
Benjamin Cheng
95a980b61f radv/video: add event support for VCN4
This was the main missing piece for passing vulkan video CTS
as the video firmwares couldn't do proper vulkan events.

With new enough firmware this is now possible.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30837>
2024-08-26 22:19:09 +00:00
Assadian, Navid
cb32bcd3fe amd/vpelib: Add 420 semi-planar 12bit handling
Adds semi-Planar 420 12 bits formats.

Reviewed-by: Roy Chan <roy.chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Navid Assadian <navid.assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30715>
2024-08-26 19:57:15 +00:00
Brendan
fcad791d07 amd/vpelib: Create virtual stream concept
[Why]
Need to create streams that don't come from input params (ex. for bg
gen) to prepare for future concepts.

[How]
Add enum for stream type, create helper functions to populate virtual
streams, and add custom functions where virtual stream function varies
from input stream function.

Reviewed-by: Roy Chan <roy.chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Brendan Leder <brendansteve.leder@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30715>
2024-08-26 19:57:14 +00:00
Lin, Ricky
b670701b65 amd/vpelib: Increase the CD field in vpe descriptor programming
Introduce the vpe desc writer hook.

Co-authored-by: Roy Chan <roy.chan@amd.com>
Reviewed-by: Roy Chan <roy.chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Ricky Lin <ricky.lin@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30715>
2024-08-26 19:57:14 +00:00
Shih, Jude
cb9175a7af amd/vpelib: Update Plane Descriptor Writer
Refactor to support new plane descriptor hook, and update enum
vpe_scan_direction.

Co-authored-by: Jesse Agate <jesse.agate@amd.com>
Co-authored-by: Roy Chan <roy.chan@amd.com>
Reviewed-by: Roy Chan <roy.chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Jude Shih <shenshih@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30715>
2024-08-26 19:57:14 +00:00
Patel, Utpal
18dae30b17 amd/vpelib: Add resource function hooks for checking support
Add function hooks for checking support including rotation, background
color, DCC capability and input/output support check.

Reviewed-by: Roy Chan <roy.chan@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Utpal Patel <utpal.patel@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30715>
2024-08-26 19:57:14 +00:00