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Author SHA1 Message Date
Alyssa Rosenzweig
5de49375ec asahi: Expose PIPE_CAP_CLIP_HALFZ 
Use the Zink lowering pass to handle the non-halfz case. Metal, like Vulkan,
uses half-z (and Metal is not configurable, making r/e tricky).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
acfeba4010 agx: Add scissor upload BO 
Not sure what the proper data structure for this is yet, but this will
hold over until we start optimizing for memory usage.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
6d9242e109 asahi: Skip draws if the scissor culls everything 
We can't pack the scissor descriptor for these, and there would be no rendering
anyway, so detect this condition and skip the draw.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
861109e441 asahi: Mark scissor dirty if rast->scissor changes 
Although there is a scissor enable bit in the hardware rasterizer state, we
cannot rely on it alone as we also "scissor" to the viewport.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
be5ea29237 asahi: Track scissor states 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
38a9c59377 asahi: Dirty track viewport descriptor 
Mitigates the extra CPU cost from packing in the previous commit, and
avoids the redundant memcpy.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
b659c53f95 asahi: Defer viewport pack 
Nontrivial interaction between viewport state and scissor state, so
defer until draw time to deal with it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
f99f7e70d7 asahi: Add scissor enable bit 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
d7cbfd4f6c asahi: Add "set scissor" command 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
f170b8357b asahi: Fix scissor descriptor definition 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Daniel Stone
5e3b293149 docs: Even more gratutious nitpicks 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11085>
 2021-05-30 23:04:34 +01:00
Alyssa Rosenzweig
e9483110d2 agx: Zero r0l before first use of control flow 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
839fff846a agx: Add break/continue support 
Following Dougall's notes closely.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
dd06e6af34 agx: Implement loops in the simplest way 
Again, optimizations are possible, but for now go for conformance.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
11705488ed agx: Optimize out empty else blocks 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
cf43206e76 agx: Implement emit_if the simplest way 
Lots of optimizations are possible from here.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
3def66e8aa agx: Fix up branch offsets at pack time 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
4fb964ccb8 agx: Model jump instructions 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
6efd00336b agx: Pack control flow instructions 
Nearly ALU.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
44dd5edae9 agx: Add push_exec alias 
Use the same canonical form as Metal, so the disassembler can alias it
back.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
4eb8fbf780 agx: Model pop_exec 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
a270665a9e agx: Model control flow instructions 
Thankfully the encoding is regular, if a bit complicated.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
4fe03cf97c agx: Add inner loop nesting count field 
Needed for proper handling of break/continue with nested if-else.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
8454d08aa3 agx: Add branch target to IR 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
ad4dfb3321 agx: Add invert_cond (ccn) to IR 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
21cf528e76 agx: Add nest field to IR 
Needed to model control flow instructions.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
6f54385b0a agx: Track block offsets 
For fixing branch offsets.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
f7918ebc82 agx: Track current_block 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
0a7a6f0558 agx: Implement boolean mov 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
a1a8ee9b11 agx: Enable 1-bit load_const 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
2d1390392f agx: Pack ld_var Dx 
In the expected place.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
1f2d1423bb agx: Drop cmdline version back to ES3.0 
The patch needed for this to work was dropped. Fixes the standalone
compiler.

Fixes: 972409dacb ("asahi: Stub command-line compiler for AGX G13B")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
10e9a1bd32 asahi: Fix meson.build definition to depend on agx_pack.h 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Daniel Stone
53c84551f5 doc: Gratuituous promotion of Wayland 
This is really just a dummy commit to get the docs regenerated so
we can stop 404ing.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11083>
 2021-05-30 14:44:04 +01:00
Karol Herbst
4d5c57edca gv100/ir: fix quadop/pop lowering 
Fixes: texture_cube_map_array.sampling

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11061>
 2021-05-30 13:34:31 +00:00
Karol Herbst
f4847077c7 gm107/ir: emit barrier sources for quadon/pop 
We drop them later on, but it's actually how that needs to be done on
Volta.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11061>
 2021-05-30 13:34:31 +00:00
Karol Herbst
de666cc418 gv100/ir: add support for barrier thread state files for OP_CVT 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11061>
 2021-05-30 13:34:31 +00:00
Karol Herbst
f14ed4f077 nv50/ir: add barrier and thread_state files 
Those are required on Turing+ to handle cross thread synchronization and
other goodies as the c/r stack is gone.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11061>
 2021-05-30 13:34:31 +00:00
Karol Herbst
f4c6c89dec nv50/ir/ra: fixes upcoming barrier file 
Replaces some FILE_ADDRESS with LAST_REGISTER_FILE and makes RA not choke
on instructions using TS values.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11061>
 2021-05-30 13:34:31 +00:00
Daniel Stone
79a7f33710 CI: Disable rk3399-gru-kevin jobs for now 
We lost a few machines from the rota due to an infrastructure issue and
we don't have enough for good parallelism.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11082>
 2021-05-30 12:40:43 +01:00
Hoe Hao Cheng
17d7b0bb8f vulkan/util: generate vk_dispatch_table that combines all dispatch tables 
Zink uses this, as it doesn't need to differentiate all the entrypoints.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11045>
 2021-05-30 01:57:49 +00:00
Boyuan Zhang
c9baccb516 radeon/vcn: enable parsing support for st_rps_bits 
Set st_rps_bits in hevc message buffer and set corresponding flag to indicate
that st_rps_bits will be used for parsing the short_term_ref_pic_set structure.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10889>
 2021-05-29 20:40:08 +00:00
Boyuan Zhang
9bd391bb64 frontends/vdpau: disable UseStRpsBits for vdpau hevc 
vdpau interface doesn't provide st_rps_bits, it uses NumDeltaPocsOfRefRpsIdx
instead. So disabling the flag to indicate st_rps_bits will not be used.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10889>
 2021-05-29 20:40:08 +00:00
Boyuan Zhang
1285e0d2fc frontends/va: get st_rps_bits from VA pic param hevc 
Get st_rps_bits from VAPictureParameterBufferHEVC, and set the flag that
indicates st_rps_bits will be used for parsing the short_term_ref_pic_set
structure

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10889>
 2021-05-29 20:40:08 +00:00
Boyuan Zhang
db0bf188d9 vl: add st_rps_bits for HEVC decode 
st_rps_bits is used for accelorater to skip parsing the short_term_ref_pic_set
structure, which is needed for HEVC decode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10889>
 2021-05-29 20:40:08 +00:00
Vinson Lee
fa1a1e7c80 travis: Download XQuartz from GitHub. 
Bintray was sunsetted on May 1st, 2021.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11026>
 2021-05-29 10:25:16 +00:00
Erik Faye-Lund
05bb449610 util/prim_restart: revert part of bad fix 
When drawing using util_translate_prim_restart_ib, zink explicitly
ignores pipe_draw_start_count_bias::start, because
util_translate_prim_restart_ib used to create a new index-buffer without
padding at the start.

This makes a lot of sense, because creating a padded index buffer is
just wasteful.

So let's walk back on the choice of starting to pad the output buffer.

Fixes: 1272c2e052 ("util/prim_restart: fix util_translate_prim_restart_ib")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4851
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11059>
 2021-05-29 09:13:03 +00:00
Erik Faye-Lund
1dfad514ea zink: add support for string-markers 
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11004>
 2021-05-29 09:02:13 +00:00
Erik Faye-Lund
6c03a85094 zink: untangle have_EXT_debug_utils and ZINK_DEBUG_VALIDATION 
EXT_debug_utils is useful for more than just validation, so let's
untangle these a bit.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11004>
 2021-05-29 09:02:13 +00:00
Erik Faye-Lund
ba392e9511 zink: implement half-float packing 
This cap isn't really optional for drivers that implement GL SPIR-V
support, so let's just implement it.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4846
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11057>
 2021-05-29 08:16:40 +00:00