Commit graph

85652 commits

Author SHA1 Message Date
Eric Anholt
f505f66cd5 vc4: Add support for storing to NIR registers in a non-SSA fashion.
Previously, there were occasionally NIR registers in our programs, but
they were always actually used SSA-only.  Now that we're trying to support
control flow, we need to actually conditionally move to registers based on
whether channels are active or not.
2016-07-12 17:42:41 -07:00
Eric Anholt
ab1d40b84a vc4: Add a flag in the screen to track control flow support.
For now it's still always false, but I need it in place for kernel
backwards compat support as I extend the backend for control flow.
2016-07-12 17:42:40 -07:00
Eric Anholt
05bcd9dd96 vc4: Define a QIR branch instruction
This uses the branch condition code in inst->cond to jump to either
successor[0] (condition matches) or successor[0] (condition doesn't
match).
2016-07-12 17:42:40 -07:00
Eric Anholt
54800bb71c vc4: Add kernel support for branching in shader validation.
We're already checking that branch instructions are within the
contents of the shader and the proper PROG_END sequence is present.
The other thing we need in the presence of branching is to verify that
the shader doesn't overflow past the end of the uniforms stream.

To do that, we require that at the start of any basic block reading
uniforms have the following instructions:

load_imm temp, <offset within uniform stream>
add unif_addr, temp, unif

The instructions are generated by userspace, and the kernel verifies
that the load_imm is of the expected offset, and that the add adds it
to a uniform.  We track which uniform in the stream that is, and at
draw call time fix up the uniform stream to have the address of the
start of the shader's uniforms for that draw call.

Signed-off-by: Eric Anholt <eric@anholt.net>
2016-07-12 17:42:39 -07:00
Eric Anholt
e2d7760df5 vc4: Add a bitmap of branch targets in kernel validation.
This isn't used yet, it's just a first step toward loop validation.
During the main parsing of instructions, we need to know when we hit a new
basic block so that we can reset validated state.
2016-07-12 17:42:38 -07:00
Eric Anholt
24095c8b3b vc4: Track the current instruction into the validation_state.
This reduces how much we need to pass around as arguments, which was
becoming more of a problem with looping validation.
2016-07-12 17:42:38 -07:00
Eric Anholt
c73aa0a09b vc4: Add QPU support for generating BRANCH instructions. 2016-07-12 17:42:38 -07:00
Eric Anholt
6d34345001 vc4: Print live variable start/ends during QIR dumping.
This only happens when live variables are set up, which is not in the
normal dump, but is set up when we've failed to register allocate.
2016-07-12 17:42:37 -07:00
Eric Anholt
89918c1e74 vc4: Implement live intervals using a CFG.
Right now our CFG is always a trivial single basic block, but that will
change when enable loops.
2016-07-12 17:41:59 -07:00
Eric Anholt
f2eb8e3052 vc4: Make vc4_qir_schedule handle each block in the program.
Basically we just treat each block independently.  The only inter-block
scheduling I can think of that would be be interesting would be to move
texture result collection to after a short loop/if block that doesn't do
texturing.  However, the kernel disallows that as part of its security
validation.
2016-07-12 15:47:26 -07:00
Eric Anholt
46ec025ba9 vc4: Convert uniforms lowering to work with multiple blocks.
We still decide which uniform to lower based on how many
instructions-that-need-lowering use that uniform, but now we emit a new
temporary uniform load in each of the basic blocks containing an
instruction being lowered.

This commit is best reviewed with diff -b.
2016-07-12 15:47:26 -07:00
Eric Anholt
0c923e6c33 vc4: Convert vc4_opt_peephole_sf to work with control flow.
We need to apply the peephole pass to each of the blocks in the program.
We don't do dataflow analysis for SF across blocks, but we also don't
generate code that would need us to do so.
2016-07-12 15:47:26 -07:00
Eric Anholt
6c1f834a23 vc4: Create a basic block structure and move the instructions into it.
The optimization passes and scheduling aren't actually ready for multiple
blocks with control flow yet (as seen by the "cur_block" references in
them instead of iterating over blocks), but this creates the structures
necessary for converting them.
2016-07-12 15:47:26 -07:00
Eric Anholt
d3cdbf6fd8 vc4: Add a "qir_for_each_inst_inorder" macro and use it in many places.
We have the prior list_foreach() all over the code, but I need to move
where instructions live as part of adding support for control flow.  Start
by just converting to a helper iterator macro.  (The simpler
"qir_for_each_inst()" will be used for the for-each-inst-in-a-block
iterator macro later)
2016-07-12 15:47:25 -07:00
Eric Anholt
6858f05924 vc4: Also enable phi elimination.
This avoids a bunch of code gen regressions when enabling loops in vc4.

Prior to that, the GLSL that would have generated these optimizable phi
nodes was being lowered to csels between either (undef, a) or (a, a), and
those were being dealt with by nir_opt_undef and nir_opt_algebraic.
2016-07-12 15:47:25 -07:00
Eric Engestrom
e8959ba7af vc4: fix memory leak
The allocation has succeeded by that point, so it needs to be freed.

CovID: 1358929
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-07-12 15:47:12 -07:00
Eric Anholt
c65a00eaff vc4: Close our screen's fd on screen close.
We're passed in a freshly dup()ed fd on screen create, so we should close
it on exit.  Debugged by Hugh Cole-Baker.
2016-07-12 15:46:09 -07:00
Eric Anholt
c93f6938d5 nir: Add optimization for (a || True == True)
This was appearing in vc4 VS/CS in mupen64, due to vertex attrib lowering
producing some constants that were getting compared.

total instructions in shared programs: 112276 -> 112198 (-0.07%)
instructions in affected programs:     2239 -> 2161 (-3.48%)
total estimated cycles in shared programs: 283102 -> 283038 (-0.02%)
estimated cycles in affected programs:     2365 -> 2301 (-2.71%)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-12 15:46:09 -07:00
Tim Rowley
be126c8a2a swr: [rasterizer core] correct MSAA behavior for conservative rasterization
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-07-12 11:10:55 -05:00
Tim Rowley
c6ca126591 swr: [rasterizer core] conservative rast backend changes
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-07-12 11:10:49 -05:00
Tim Rowley
b6dbb95dc9 swr: [rasterizer] buckets cleanup
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-07-12 11:10:44 -05:00
Tim Rowley
eb6b2b340e swr: [rasterizer core] make all api functions call GetContext
Small api cleanup.  Make all api functions call GetContext instead
of locally casting handle.  Makes debugging easier by providing a
single point to track context changes.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-07-12 11:10:36 -05:00
Tim Rowley
f810907669 swr: [rasterizer] add support for llvm-3.9
v2: use signed compare, remove unneeded vmask

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-07-12 11:09:49 -05:00
Tim Rowley
ae4f2c849a swr: [rasterizer jitter] fix llvm-3.7 compile
d3d97f8 broke llvm-3.7, which has a mismatched API for
setDataLayout/getDataLayout.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-07-12 10:42:57 -05:00
Brian Paul
d46489ddea docs: remove duplicated line in 12.0.1 release notes file
Signed-off-by: Brian Paul <brianp@vmware.com>
2016-07-12 09:42:42 -06:00
Leo Liu
55f0b97b40 st/omx/dec: convert decoder video buffer to progressive
with encode tunneling

The idea of encode tunneling is to use video buffer directly for encoder,
but currently the encoder doesn’t support interlaced surface, the OMX
decoder set progressive surface before on that purpose.

Since now we are polling the driver for interlacing information for
decoder, we got the interlaced as preferred as other APIs(VDPAU, VA-API),
thus breaking the transcode with tunneling.

The solution is when with tunnel detected, re-allocate progressive target
buffers, and then converting the interlaced decoder results to there.

This has been tested with transcode results bit to bit matching as before
with surface from progressive to progressive.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Tested-by: Julien Isorce <j.isorce@samsung.com>
2016-07-12 09:27:53 -04:00
Leo Liu
82f875f4d8 vl/compositor: set layer of y or uv to render
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Tested-by: Julien Isorce <j.isorce@samsung.com>
2016-07-12 09:27:53 -04:00
Leo Liu
14761da9f9 vl/compositor: add weave to yuv shader
This shader will make interlaced yuv to progressive yuv.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Tested-by: Julien Isorce <j.isorce@samsung.com>
2016-07-12 09:27:53 -04:00
Leo Liu
2e18c2c6f8 vl/compositor: move weave shader out from rgb weaving
We'll use weave shader in the later patch.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Tested-by: Julien Isorce <j.isorce@samsung.com>
2016-07-12 09:27:53 -04:00
Marek Olšák
ead7736821 glsl_to_tgsi: don't use the negate modifier in integer ops after bitcast
This bug is uncovered by glsl/lower_if_to_cond_assign.
I don't know if it can be reproduced in any other way.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-12 11:58:53 +02:00
Francisco Jerez
e300696304 clover/api: Implement clLinkProgram per-device binary presence validation rule.
Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:35 -07:00
Serge Martin
f29ed2da24 clover: Add clLinkProgram (CL 1.2).
[ Francisco Jerez: Use validate_build_common for error checking,
  simplify control flow slightly and handle additional exception
  types. ]

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:35 -07:00
Francisco Jerez
c478db6c0a clover: Trivial cleanups for api/program.cpp.
Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:35 -07:00
Francisco Jerez
9c7cda2792 clover/core: Remove compiler.hpp.
header_map was the only definition left in compiler.hpp, move it into
program.hpp which is its only user in clover/core.

Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:35 -07:00
Francisco Jerez
c2e37fe1f9 clover/llvm: Get rid of compile_program_llvm().
Superseded by compile_program() and link_program().

Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:35 -07:00
Francisco Jerez
010918f5aa clover: Provide separate program methods for compilation and linking.
[ Serge Martin: Fix inverted opts and log build ctor args.
  Keep the log related to the build. Fix indentation ]

Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:35 -07:00
Francisco Jerez
1942490bae clover: Unify program::build_* into a single method returning a struct.
This gets rid of the program::build_* query methods and replaces them
with the program::build() method that returns a single data structure
containing all parameters for the last build done on the given target
device (including build logs, options and the binary itself).

[ Serge Martin: Fix inverted opts and log build ctor args ]

Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Serge Martin
7f6a4a4342 clover: Change program::build opts argument to std::string.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
2a73ae662c clover: Define error subclass to signal build option parse failure.
Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
4ef1c0918d clover: Move back to using build_error to signal compilation failure.
This partially reverts 7e0180d57d.
Having two different exception subclasses for compilation and linking
makes it more difficult to share or move code between the two
codepaths, because the exact same function under the same error
condition would need to throw one exception or the other depending on
what top-level API is being implemented with it.  There is little
benefit anyway because clCompileProgram() and clLinkProgram() can tell
whether they are linking or compiling a program.

Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Serge Martin
70fe6267a3 clover: Override ret_object.
Return an API object from an intrusive reference to a Clover object,
incrementing the reference count of the object.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
85309e8b55 clover/tgsi: Add stub link_program() function.
Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
ba613636e8 clover/tgsi: Move compiler entry point declaration into tgsi directory and namespace.
Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
fb3eeb1314 clover/llvm: Implement the -create-library linker option.
[ Serge Martin: disable internalize pass when building a library.
  Otherwise some functions may be inlined and removed ]

Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
9de3f4a59f clover/llvm: Implement linkage of multiple clover modules.
Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
132b6ccd4f clover/llvm: Split compilation and linking.
Split the work previously done by compile_program_llvm() into
compile_program() (which simply runs the front-end and serializes the
resulting LLVM IR) and link_program() (which takes care of everything
else down to binary codegen).

[ Serge Martin: allow LLVM IR dump after compilation ]

Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
1a7d11aa3d clover/llvm: Implement library bitcode codegen.
Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
86100e13ab clover/llvm: Trivial assorted cleanups for invocation.cpp.
Drop a few include and using directives which are no longer necessary.

Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
520cc26859 clover/llvm: Split native codegen into separate file.
Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:34 -07:00
Francisco Jerez
8195637363 clover/llvm: Split bitcode codegen into separate file.
Reviewed-by: Serge Martin <edb+mesa@sigluy.net>
Tested-by: Jan Vesely <jan.vesely@rutgers.edu>
2016-07-11 20:34:33 -07:00