Commit graph

85652 commits

Author SHA1 Message Date
Francisco Jerez
fcd9d1badc i965/vec4: Drop backend_reg::in_range() in favor of regions_overlap().
This makes sure that overlap checks are done correctly throughout the
back-end when the '*this' register starts before the register/size
pair provided as argument, and is actually less annoying to use than
in_range() at this point since regions_overlap() takes its size
arguments in bytes.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:55 -07:00
Francisco Jerez
56bcb2230f i965/vec4: Port regions_overlap() to the vec4 IR.
This is copy-pasted almost line by line from the FS back-end.  The
only reason it cannot be implemented in terms of backend_reg is that
the backend_reg::nr field doesn't have the same meaning for uniforms
on both back-ends.  It could be easily deduplicated by using a
template function.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:55 -07:00
Francisco Jerez
c057278c06 i965/fs: Stop using fs_reg::in_range() in favor of regions_overlap().
Its only use left in the FS back-end should be using regions_overlap()
instead to avoid getting a false negative result in cases where source
and destination overlap but the former starts before the latter in the
VGRF file.

v2: Put back lost components factor (Iago).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:55 -07:00
Francisco Jerez
b42c13a5b8 i965/fs: Drop fs_inst::overwrites_reg() in favor of regions_overlap().
fs_inst::overwrites_reg is rather easy to misuse because it cannot
tell how large the register region starting at 'reg' is, so in cases
where the destination region starts after 'reg' it may give a
misleading result.  regions_overlap() is somewhat more verbose to use
but handles arbitrary overlap correctly so it should generally be used
instead.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:55 -07:00
Francisco Jerez
32d67923b2 i965/fs: Fix LOAD_PAYLOAD handling in register coalesce is_nop_mov().
is_nop_mov() was broken for LOAD_PAYLOAD instructions in two ways: On
the one hand the original destination register offset wasn't being
taken into account which would give incorrect results if it was
already non-zero, and on the other hand all source registers were
being treated as if they had a size of 32B, which is almost never the
case in SIMD16 programs for non-header sources.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:55 -07:00
Francisco Jerez
5cc6425d70 i965/fs: Fix can_propagate_from() source/destination overlap check.
The previous overlap condition only made sure that the VGRF numbers or
GRF-aligned offsets were different without taking the amount of data
written and read by the instruction into consideration.  Use the
regions_overlap() helper instead.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:55 -07:00
Francisco Jerez
9ae77d7020 i965/fs: Compare full register offsets in cmod propagation pass.
This could potentially have misoptimized a program in cases where
inst->src[0] had a non-zero sub-GRF offset.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:55 -07:00
Francisco Jerez
3a4ea7cf80 i965/fs: Don't consider LOAD_PAYLOAD with stride > 1 source to behave like a raw copy.
Noticed the problem by inspection while typing in the previous commit.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:55 -07:00
Francisco Jerez
1164aa1a1b i965/fs: Don't consider LOAD_PAYLOAD with sub-GRF offset to behave like a raw copy.
This was likely the original intention, and at least register coalesce
relies on it.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:55 -07:00
Francisco Jerez
a5bbe4c127 i965/vec4: Take into account misalignment in regs_written() and regs_read().
Unlike the FS counterpart of this commit this was likely not (yet) a
bug, but let's fix it already in preparation for implementing support
for sub-GRF offsets in the VEC4 back-end.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:54 -07:00
Francisco Jerez
717d8efd58 i965/fs: Take into account misalignment in regs_written() and regs_read().
There was a workaround for this in fs_inst::size_read() for the
SHADER_OPCODE_MOV_INDIRECT instruction and FIXED_GRF register file
*only*.  We should take this possibility into account for the sources
and destinations of all instructions on all optimization passes that
need to quantize dataflow in 32B increments by adding the amount of
misalignment to the size read or written from the regs_read() and
regs_written() helpers respectively.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:54 -07:00
Francisco Jerez
e540045df5 i965/fs: Take into account trailing padding in regs_written() and regs_read().
This fixes regs_written() and regs_read() to return a more accurate
value when the padding left between components due to a stride value
greater than one causes the region bounds given by size_written or
size_read to overflow into the next register.  This could become a
problem in optimization passes that keep track of dataflow using
fixed-size arrays with register granularity, because the overflow
register (not actually accessed by the region) may not have been
allocated at all which could lead to undefined memory access.

An alternative to this would be to subtract the trailing padding
already during the calculation of fs_inst::size_read and
::size_written, but that would break code that currently assumes that
::size_read and _written are whole multiples of the component size,
and would be hard to maintain looking forward because size_written is
assigned from a bunch of different places.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:54 -07:00
Francisco Jerez
937373eb25 i965/fs: Handle fixed HW GRF subnr in reg_offset().
This will be useful later on when we start using reg_offset() on fixed
hardware registers.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:54 -07:00
Francisco Jerez
1a4b7fdd88 i965/fs: Handle arbitrary offsets in brw_reg_from_fs_reg for MRF/VGRF registers.
This restriction seemed rather artificial...  Removing it actually
simplifies things slightly.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:54 -07:00
Francisco Jerez
d6b60934aa i965/fs: Return more accurate read size for LINTERP from fs_inst::size_read.
The LINTERP virtual instruction only reads three scalar components
from the first 16B of the second source, we can now teach size_read()
about it since its return value is represented with byte granularity.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:54 -07:00
Francisco Jerez
31a40202b8 i965/fs: Return more accurate read size from fs_inst::size_read for IMM and UNIFORM files.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:54 -07:00
Francisco Jerez
728dd30c0a i965/vec4: Replace vec4_instruction::regs_read with ::size_read using byte units.
The previous regs_read value can be recovered by rewriting each
reference of regs_read() like 'x = i.regs_read(j)' to 'x =
DIV_ROUND_UP(i.size_read(j), reg_unit)'.

For the same reason as in the previous patches, this doesn't attempt
to be particularly clever about simplifying the result in the interest
of keeping the rather lengthy patch as obvious as possible.  I'll come
back later to clean up any ugliness introduced here.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:54 -07:00
Francisco Jerez
e1a918ba7b i965/fs: Replace fs_inst::regs_read with ::size_read using byte units.
The previous regs_read value can be recovered by rewriting each
reference of regs_read() like 'x = i.regs_read(j)' to 'x =
DIV_ROUND_UP(i.size_read(j), reg_unit)'.

For the same reason as in the previous patches, this doesn't attempt
to be particularly clever about simplifying the result in the interest
of keeping the rather lengthy patch as obvious as possible.  I'll come
back later to clean up any ugliness introduced here.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:53 -07:00
Francisco Jerez
27cb6b081e i965/ir: Drop backend_instruction::regs_written field.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:53 -07:00
Francisco Jerez
69fdf13c21 i965/vec4: Replace vec4_instruction::regs_written with ::size_written field in bytes.
The previous regs_written field can be recovered by rewriting each
rvalue reference of regs_written like 'x = i.regs_written' to 'x =
DIV_ROUND_UP(i.size_written, reg_unit)', and each lvalue reference
like 'i.regs_written = x' to 'i.size_written = x * reg_unit'.

For the same reason as in the previous patches, this doesn't attempt
to be particularly clever about simplifying the result in the interest
of keeping the rather lengthy patch as obvious as possible.  I'll come
back later to clean up any ugliness introduced here.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:53 -07:00
Francisco Jerez
69570bbad8 i965/fs: Replace fs_inst::regs_written with ::size_written field in bytes.
The previous regs_written field can be recovered by rewriting each
rvalue reference of regs_written like 'x = i.regs_written' to 'x =
DIV_ROUND_UP(i.size_written, reg_unit)', and each lvalue reference
like 'i.regs_written = x' to 'i.size_written = x * reg_unit'.

For the same reason as in the previous patches, this doesn't attempt
to be particularly clever about simplifying the result in the interest
of keeping the rather lengthy patch as obvious as possible.  I'll come
back later to clean up any ugliness introduced here.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:53 -07:00
Francisco Jerez
d28cfa35fe i965/vec4: Add wrapper functions for vec4_instruction::regs_read and ::regs_written.
This is in preparation for dropping vec4_instruction::regs_read and
::regs_written in favor of more accurate alternatives expressed in
byte units.  The main reason these wrappers are useful is that a
number of optimization passes implement dataflow analysis with
register granularity, so these helpers will come in handy once we've
switched register offsets and sizes to the byte representation.  The
wrapper functions will also make sure that GRF misalignment (currently
neglected by most of the back-end) is taken into account correctly in
the calculation of regs_read and regs_written.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:53 -07:00
Francisco Jerez
c458eeb946 i965/fs: Add wrapper functions for fs_inst::regs_read and ::regs_written.
This is in preparation for dropping fs_inst::regs_read and
::regs_written in favor of more accurate alternatives expressed in
byte units.  The main reason these wrappers are useful is that a
number of optimization passes implement dataflow analysis with
register granularity, so these helpers will come in handy once we've
switched register offsets and sizes to the byte representation.  The
wrapper functions will also make sure that GRF misalignment (currently
neglected by most of the back-end) is taken into account correctly in
the calculation of regs_read and regs_written.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:53 -07:00
Francisco Jerez
be095e11e4 i965/fs: Replace fs_reg::subreg_offset with fs_reg::offset expressed in bytes.
The fs_reg::subreg_offset and ::offset fields are now redundant, the
sub-GRF offset can just be added to the single ::offset field
expressed in byte units.  The current subreg_offset value can be
recovered by applying the following rule: Replace each rvalue
reference of subreg_offset like 'x = r.subreg_offset' with 'x =
r.offset % reg_unit', and each lvalue reference like 'r.subreg_offset
= x' with 'r.offset = ROUND_DOWN_TO(r.offset, reg_unit) + x'.

For the same reason as in the previous patches, this doesn't attempt
to be particularly clever about simplifying the result in the interest
of keeping the rather lengthy patch as obvious as possible.  I'll come
back later to clean up any ugliness introduced here.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:53 -07:00
Francisco Jerez
9a523dd051 i965/ir: Remove backend_reg::reg_offset.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:53 -07:00
Francisco Jerez
fba020e5af i965/vec4: Replace dst/src_reg::reg_offset with dst/src_reg::offset expressed in bytes.
The dst/src_reg::offset field in byte units introduced in the previous
patch is a more straightforward alternative to an offset
representation split between ::reg_offset and ::subreg_offset fields.
The split representation makes it too easy to forget about one of the
offsets while dealing with the other, which has led to multiple FS
back-end bugs in the past.  To make the matter worse the unit
reg_offset was expressed in was rather inconsistent, for uniforms it
would be expressed in either 4B or 16B units depending on the
back-end, and for most other things it would be expressed in 32B
units.

This encodes reg_offset as a new offset field expressed consistently
in byte units.  Each rvalue reference of reg_offset in existing code
like 'x = r.reg_offset' is rewritten to 'x = r.offset / reg_unit', and
each lvalue reference like 'r.reg_offset = x' is rewritten to
'r.offset = r.offset % reg_unit + x * reg_unit'.

Because the change affects a lot of places and is rather non-trivial
to verify due to the inconsistent value of reg_unit, I've tried to
avoid making any additional changes other than applying the rewrite
rule above in order to keep the patch as simple as possible, sometimes
at the cost of introducing obvious stupidity (e.g. algebraic
expressions that could be simplified given some knowledge of the
context) -- I'll clean those up later on in a second pass.

v2: Fix division by the wrong reg_unit in the UNIFORM case of
    convert_to_hw_regs(). (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:52 -07:00
Francisco Jerez
86944e063a i965/fs: Replace fs_reg::reg_offset with fs_reg::offset expressed in bytes.
The fs_reg::offset field in byte units introduced in this patch is a
more straightforward alternative to the current register offset
representation split between fs_reg::reg_offset and ::subreg_offset.
The split representation makes it too easy to forget about one of the
offsets while dealing with the other, which has led to multiple
back-end bugs in the past.  To make the matter worse the unit
reg_offset was expressed in was rather inconsistent, for uniforms it
would be expressed in either 4B or 16B units depending on the
back-end, and for most other things it would be expressed in 32B
units.

This encodes reg_offset as a new offset field expressed consistently
in byte units.  Each rvalue reference of reg_offset in existing code
like 'x = r.reg_offset' is rewritten to 'x = r.offset / reg_unit', and
each lvalue reference like 'r.reg_offset = x' is rewritten to
'r.offset = r.offset % reg_unit + x * reg_unit'.

Because the change affects a lot of places and is rather non-trivial
to verify due to the inconsistent value of reg_unit, I've tried to
avoid making any additional changes other than applying the rewrite
rule above in order to keep the patch as simple as possible, sometimes
at the cost of introducing obvious stupidity (e.g. algebraic
expressions that could be simplified given some knowledge of the
context) -- I'll clean those up later on in a second pass.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-09-14 14:50:52 -07:00
Eero Tamminen
8ad5fb3a8f glsl: grammar fix
Signed-off-by: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-09-14 13:35:47 -07:00
Kenneth Graunke
aa70ac172e docs: Mention AEP in release notes 2016-09-14 12:43:16 -07:00
Kenneth Graunke
8c9dddadad i965: Enable ANDROID_extension_pack_es31a on Gen9+.
AEP requires ASTC, which is currently only enabled on Skylake and later.
(It may be possible to extend this to Cherryview/Braswell in the future,
but earlier hardware doesn't have ASTC support.)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-09-14 12:16:25 -07:00
Kenneth Graunke
2d8a3fa7ea nir: Report progress from nir_lower_phis_to_scalar.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-09-14 12:01:51 -07:00
Kenneth Graunke
32630e211e nir: Report progress from nir_lower_alu_to_scalar.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-09-14 12:01:49 -07:00
Kenneth Graunke
e6eed3533e nir: Call nir_metadata_preserve from nir_lower_alu_to_scalar().
This is mandatory.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-09-14 12:01:39 -07:00
Rob Clark
bff90aedf1 nir/lower_tex: fix typo with sample_dim
Numeric 2 is actually GLSL_SAMPLER_DIM_3D, which I don't think is what
was intended.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-14 13:45:32 -04:00
Rob Clark
1a8424ceba nir: move tex_instr_remove_src
I want to re-use this in a different pass, so move to nir.h

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-14 13:45:32 -04:00
Rob Clark
2c3f966276 nir/lower_tex: remove tex_instr_find_src()
Turns out it already exists.. so don't duplicate it.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-09-14 13:45:32 -04:00
Kyle Brenneman
7206b3a556 egl: Add storage for EGL_KHR_debug's state to EGL objects
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 11:45:58 -04:00
Kyle Brenneman
1d535c1e83 egl: Factor out _eglGetSyncAttribCommon
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 11:45:58 -04:00
Kyle Brenneman
5b0b844ac9 egl: Factor out _eglWaitSyncCommon
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 11:45:58 -04:00
Kyle Brenneman
9a992038e7 egl: Lock the display in _eglCreateSync's callers
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 11:45:58 -04:00
Kyle Brenneman
58338c6b65 egl: Factor out _eglCreateImageCommon (v2)
v2:
- Pass disp to RETURN_EGL_ERROR so we unlock the display

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 11:45:58 -04:00
Kyle Brenneman
82a2e2cb50 egl: Factor out _eglWaitClientCommon
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 11:45:58 -04:00
Kyle Brenneman
8cc3d9855f egl: Use _eglCreatePixmapSurfaceCommon consistently
This moves the native pixmap fixup to a helper function so we don't
repeat ourselves.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 11:45:58 -04:00
Kyle Brenneman
7d7ae5e1c3 egl: Use _eglCreateWindowSurfaceCommon consistently
This moves the native window fixup to a helper function so we don't
repeat ourselves.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 11:45:58 -04:00
Kyle Brenneman
017946b724 egl: Factor out _eglGetPlatformDisplayCommon
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 11:45:58 -04:00
Kyle Brenneman
fe6ffa79be egl: Fix typo
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 11:45:58 -04:00
Adam Jackson
e2c067d256 egl: Tear down images and syncs at eglTerminate
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2016-09-14 11:45:58 -04:00
Kyle Brenneman
6e50f12b04 egl: Update eglext.h (v2)
Updated eglext.h to revision 33111 from the Khronos repository.

v2:
- Don't (re)move extension includes from eglext.h (Emil Velikov)
- Bump to revision 33111 (Adam Jackson)

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
2016-09-14 11:45:58 -04:00
Brendan King
95f3e5861c configure.ac: fix the name of the Wayland Scanner pc file
The Wayland Scanner pkg-config file is called wayland-scanner.pc.

Fixes: 153539bd9d ("configure: rework wayland_scanner
       handling (fix make distcheck)")

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Brendan King <Brendan.King@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 14:38:30 +01:00
Eric Engestrom
4bb9efb592 gbm: remove left-over array
e7c8c85785 ("gbm: Removed unused function.") forgot to remove
the global array used only by that function.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-14 14:37:34 +01:00