Commit graph

131687 commits

Author SHA1 Message Date
Mike Blumenkrantz
59e923e5a1 lavapipe: don't read line stipple info in pipeline creation if stipple is disabled
otherwise these values may be (harmlessly) garbage

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11933>
2021-07-16 22:13:49 +00:00
Eric Anholt
11f9ad9238 gallium/ttn: Add a debug flag for dumping the shaders.
Just like for ntt, it's nice to be able to dump the shader that assertion
failed on you.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11915>
2021-07-16 21:55:12 +00:00
Emma Anholt
8c36022e0d nir_to_tgsi: Fix image declarations.
We failed to translate the target type, which virgl needs for translation.
Also the read_only flag is for consts, shader inputs, and uniforms.  The
access flag gives you the readonly qualifier.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11916>
2021-07-16 21:35:31 +00:00
Jason Ekstrand
46cc332025 anv: Stop reference counting semaphores
The only reason we had to refcount semaphores was for the ancient
sync_file semaphores which we used for pre-syncobj kernels.  Now that we
assume syncobj and that code is gone, we don't need reference counting
anymore either.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9777>
2021-07-16 21:12:21 +00:00
Jason Ekstrand
d44ea09e61 anv: Drop unused sync_file and BO semaphore code
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9777>
2021-07-16 21:12:21 +00:00
Jason Ekstrand
3b363d5b55 anv: Assume syncobj support
Sync object for i915 support has been in upstream Linux since 4.14 which
is 3.5 years old at this point and, as far as we can tell, it also
exists in all the ChromeOS kernels.  Assuming it allows us to drop some
of our more gnarly synchronization fall-back paths.

At the time of merge, ChromeOS was on the following kernels:

 - kernel 3.18: SKL
 - kernel 4.4: BYT, KBL, APL
 - Kernel 4.14: BDW, GLK

All of the pre-4.14 kernels have had syncobj support back-ported.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9777>
2021-07-16 21:12:21 +00:00
Jason Ekstrand
a62973580b intel/eu: Start validating LSC message descriptors
This is certainly not a full validation but it at least gets the
framework in place and validates one hard-to-find restriction.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11657>
2021-07-16 17:25:48 +00:00
Sagar Ghuge
89b7a40212 intel/compiler: Enable has_iadd3 option on XeHP
shader-db result is inconclusive but doesn't harm to include it for
reference.

Shader-db result on XeHPG:

total instructions in shared programs: 1397405 -> 1397315 (<.01%)
instructions in affected programs: 88252 -> 88162 (-0.10%)
helped: 20
HURT: 7
helped stats (abs) min: 1 max: 18 x̄: 7.20 x̃: 7
helped stats (rel) min: 0.03% max: 2.20% x̄: 0.37% x̃: 0.23%
HURT stats (abs)   min: 4 max: 23 x̄: 7.71 x̃: 4
HURT stats (rel)   min: 0.10% max: 0.68% x̄: 0.22% x̃: 0.11%
95% mean confidence interval for instructions value: -6.81 0.14
95% mean confidence interval for instructions %-change: -0.42% -0.02%
Inconclusive result (value mean confidence interval includes 0).

total cycles in shared programs: 119924219 -> 119931868 (<.01%)
cycles in affected programs: 45029193 -> 45036842 (0.02%)
helped: 11
HURT: 16
helped stats (abs) min: 15 max: 5490 x̄: 1655.73 x̃: 140
helped stats (rel) min: <.01% max: 0.35% x̄: 0.11% x̃: <.01%
HURT stats (abs)   min: 1 max: 2944 x̄: 1616.38 x̃: 1743
HURT stats (rel)   min: <.01% max: 0.17% x̄: 0.09% x̃: 0.10%
95% mean confidence interval for cycles value: -606.11 1172.70
95% mean confidence interval for cycles %-change: -0.04% 0.07%
Inconclusive result (value mean confidence interval includes 0).

v2:
- Include shader-db result (Jason)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:56 +00:00
Sagar Ghuge
06ab737686 nir: Add optimizations for iadd3
This patch also adds has_iadd3 bit to give more control if backend
supports ternary add instruction or not.

v2:
- Add patterns in late optimization (Connor Abbott)

Suggested-by: Alyssa/Jason

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:56 +00:00
Sagar Ghuge
e6db2299a8 intel/compiler: Allow ternary add to promote source to immediate
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:56 +00:00
Sagar Ghuge
cde9ca616d intel/compiler: Make decision based on source type instead of opcode
This patch restructure code a little bit to check if source can be
represented as immediate operand. This is a foundation for next patch
which add checks for integer operand as well.

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:56 +00:00
Sagar Ghuge
705285b9f4 intel/compiler: Add support for ternary add instruction on XeHP
v2:
- Re-arragne opcode in correct order (Matt Turner)
- Move ADD3 case closer to LRP (Jason)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:56 +00:00
Sagar Ghuge
e8dff256c0 nir: Add new opcode for ternary addition
v2:
- Make it 2src commutative (Connor Abbott)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11596>
2021-07-16 15:59:55 +00:00
Timur Kristóf
6e17931d21 radv: Use pre-computed viewport transform for NGG culling state.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz
c9a478f1cd radv: remove unused variable from radv_emit_viewport
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz
a2ef92d7a5 radv: pre-calculate viewport transforms
this requires more storage in the viewport struct, but it avoids
the need to repeatedly calculate the same transform if e.g., a meta
operation occurs, which can save about 5% cpu in some cases

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz
1e13cb1965 radv: merge si_write_viewport into radv_emit_viewport
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Danylo Piliaiev
53d4485a02 freedreno: fix wrong tile aligment for 3 CCU gpu
Fixes: 78c8a8af80 "freedreno: Generate device-info tables at build time"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5060

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11928>
2021-07-16 15:02:27 +00:00
Timur Kristóf
60c5abf685 aco: Remove s_and with exec when all lanes are active.
This helps NGG GS and culling shaders.
No Fossil DB changes without NGG culling.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11458>
2021-07-16 14:31:54 +00:00
Timur Kristóf
e66f54e5c8 aco: Allow elect to take advantage of knowing when all lanes are active.
Implement elect using a pseudo-op which is lowered during the
insert_exec_mask pass. This makes it possible to emit a more
optimal sequence when the exec mask is constant.

Fossil DB results on Sienna Cichlid:
Totals from 211 (0.16% of 128647) affected shaders:
CodeSize: 2254356 -> 2240468 (-0.62%); split: -0.62%, +0.00%
Instrs: 438471 -> 434996 (-0.79%); split: -0.80%, +0.01%
Latency: 2717082 -> 2709400 (-0.28%); split: -0.28%, +0.00%
InvThroughput: 566987 -> 566342 (-0.11%); split: -0.11%, +0.00%
Copies: 40058 -> 40162 (+0.26%)
Branches: 31209 -> 31211 (+0.01%)
PreSGPRs: 9927 -> 10125 (+1.99%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11458>
2021-07-16 14:31:54 +00:00
Timur Kristóf
b12318f26c aco: Swap s_and operand order for ballot.
This allows our optimizer to recognize this and eliminate it when
it can prove that the s_and with exec is unneeded.

Fossil DB changes on Sienna Cichlid:
Totals from 1969 (1.53% of 128647) affected shaders:
CodeSize: 9468228 -> 9469348 (+0.01%); split: -0.00%, +0.01%
Instrs: 1773566 -> 1773581 (+0.00%); split: -0.01%, +0.01%
Latency: 19504042 -> 19503385 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 3617406 -> 3617333 (-0.00%)
Copies: 108998 -> 110592 (+1.46%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11458>
2021-07-16 14:31:54 +00:00
Jason Ekstrand
f5008a48d3 intel/perf: Use intel_i915_query_flags instead of hand-rolling it
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Jason Ekstrand
ba99d2a328 intel/dev: Use intel_i915_query_alloc in query_topology
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Jason Ekstrand
3fa6b8d041 iris: Use intel_i915_query for meminfo
Error handling with DRM_IOCTL_I915_QUERY is tricky and we got it wrong
in one of the two calls here.  Use the common helper instead.  This also
fixes a theoretical bug where calloc() fails.  While we're here, inline
iris_bufmgr_update_meminfo because we're not really benefiting from
having it separate anymore.

Fixes: e60114b2ae "iris/bufmgr: Query memory region info."
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Jason Ekstrand
35ec1d9730 anv: Use intel_i915_query_alloc for memory regions
Error handling with DRM_IOCTL_I915_QUERY is tricky and we got it wrong
in one of the two calls here.  Use the common helper instead.  This also
fixes a theoretical bug where calloc() fails.  While we're here, inline
anv_track_meminfo because we're not really benefiting from having it
separate anymore.

Fixes: 65e8d72bc1 "anv: Query memory region info"
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Jason Ekstrand
ffdf4d7683 intel: Pull anv_i915_query into common code
We also add a helper which contains the standard query+alloc+query
pattern used by anv_gem_get_engine_info().  The caller is required to
free the pointer.

These are declared static inline not because we care about the
performance of these helpers but because we're going to use them in the
intel_device_info code and we don't want a link dependency.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Jason Ekstrand
b664481ba9 anv: Handle errors properly in anv_i915_query
DRM_IOCTL_I915_QUERY is a multi-query.  The most egregious errors are
returned via the usual ioctl error mechanism but there are also
per-query errors that are indicated by item.length < 0.  We need to
handle those as well.  While we're at it, scrape errno so we can return
a proper integer error.

Fixes: c0d07c838a "anv: Support i915 query (DRM_IOCTL_I915_QUERY)..."
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11770>
2021-07-16 14:19:20 +00:00
Timur Kristóf
d07e5bde75 radv: Remove num_viewports from radv_skip_ngg_culling.
NGG culling is not compiled into shaders that can use multiple
viewports, so it's not necessary to check it here.

Fixes: 9a95f5487f
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11910>
2021-07-16 13:00:36 +00:00
Timur Kristóf
aa24740370 radv: Don't compile NGG culling into shaders that write viewport index.
We don't support NGG culling with multiple viewports yet.

Fixes: f30e4351de
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11910>
2021-07-16 13:00:36 +00:00
Jason Ekstrand
e56d5db341 iris: Re-emit MEDIA_VFE_STATE for variable group size shaders
It implicitly contains the number of threads via the CURBE allocation
size field.

Fixes: 33c61eb2f1 "iris: Implement ARB_compute_variable_group_size"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10640>
2021-07-16 11:02:50 +00:00
Iago Toral Quiroga
d7e1c0ec2e v3dv: don't emit frame setup more than once for multilayered framebuffers
We only need to do this once per job, not once per layer.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11923>
2021-07-16 09:36:37 +00:00
Iago Toral Quiroga
51d0d83667 v3dv: don't overallocate tile state for meta TLB operations
Generally, all meta operations that are implemented via the TLB and
only involve tile load/store operations only need one layer worth
of tile state memory and a single frame setup pointing the binner
to that memory.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11923>
2021-07-16 09:36:37 +00:00
Iago Toral Quiroga
7fcc518473 v3dv: allow limiting amount of tile state allocated
With multilayered framebuffer we want to allocate enough tile state for
all layers involved, so te binner can handle layered rendering where
a geometry shader is used to redirect primitives to specific layers by
writing to gl_Layer.

However, we may also have layered framebuffers in cases where layered
rendering won't be used. Typically this will happen for meta copy/clear
operations, where we setup multilayered framebuffers but then we just
load and/or store the tile buffer without ever rendering a primitive,
let alone use a geometry shader to do layered rendering. In these cases
we can reduce the amount of tile state allocated to a sigle layer.

This patch allows us to specify if we should allocate tile state for all
layers when we start a new frame. We will take advantage of this in
later patches targetting the meta copy/clear code paths.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11923>
2021-07-16 09:36:37 +00:00
Iago Toral Quiroga
93e7534a66 v3dv: improve TLB layered image clears
Our meta image clearing code was emitting a job per layer to clear,
but we can emit a single job that packs multiple layer clears for
better performance. For this we just need to make sure we pass
the maximum layer we can emit to v3dv_job_start_frame so we
allocate sufficent tile state memory.

Actually, since this operation is TLB based and doesn't make use of
layered rendering, we could do with allocating less tile state
memory too. We will improve this for this and many others TLB meta
implementations in follow up patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11923>
2021-07-16 09:36:37 +00:00
Iago Toral Quiroga
308041095c v3dv: remove unused layer field from struct rcl_clear_info
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11923>
2021-07-16 09:36:37 +00:00
Samuel Pitoiset
0b637919a8 radv: fix specifying the stencil layout for separate depth/stencil layouts
The Vulkan spec has been updated few months ago again and pNext is
always honored if present.

Found this with vkd3d-proton which implemented separate depth/stencil
layouts recently.

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11903>
2021-07-16 09:20:58 +02:00
Samuel Pitoiset
cadf2d63b7 radv: report APUs as discrete GPUs for Red Dead Redemption 2
On APUs, we fake heaps to simulate a dGPU setup because it seems to
have the maximum compatibility. Though, some applications like RDR2
still only looks at GTT if the driver reports an iGPU which means it
will only use 1/3rd of total memory available.

This is currently behind a drirc option because it might have
implications for other apps but we might want to extend this later
if everything is fine.

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11891>
2021-07-16 07:01:45 +00:00
Samuel Pitoiset
7a1cc56e40 radv: fix bounds checking for zero vertex stride on GFX6-7
GFX6 and GFX10+ have similar logic.

This fixes test_zero_vertex_stride from vkd3d-proton on
Pitcairn (GFX6) and on Bonaire (GFX7).

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11904>
2021-07-16 08:30:07 +02:00
Jason Ekstrand
0ee322acdb nir: Better document the Boissinot algorithm in nir_from_ssa()
Reviewed-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8815>
2021-07-16 06:19:25 +00:00
Jason Ekstrand
cb589ee394 intel/dev: Drop a bogus assert
In c24ba6cecb, I copied over the CHV thread count code from i965 and
ANV into common code.  While at it, I added an assert that I thought
should be true based on the comments.  It turns out to be invalid.  Drop
it.

Fixes: c24ba6cecb "intel/dev: Handle CHV CS thread weirdness in..."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5072
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11918>
2021-07-15 21:43:31 -05:00
Iván Briano
fce0027d91 anv: Unbreak wide lines on HSW/BDW
I knew there was a reason the limit was at ~8 and not rounded to it.

Fixes: 004fcfe698 ("anv: fix some multisample lines_wide CTS tests")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11914>
2021-07-15 21:59:37 +00:00
Caio Marcelo de Oliveira Filho
dfcb47bcec anv: Zero initialize pipeline structs
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11890>
2021-07-15 21:34:53 +00:00
Caio Marcelo de Oliveira Filho
34aae6a1f2 vulkan/util: Add and use vk_multialloc_zalloc variants
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11890>
2021-07-15 21:34:53 +00:00
Daniel Stone
49a7c92793 vulkan/wsi/wayland: Initialise wl_shm pointer in VkImage
We don't explicitly calloc the wsi_wl_image to zero; anything that's
expected to be valid needs to be explicitly initialised.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5063
Fixes: 6b36f35734 ("vulkan/wsi/wl: add wl_shm support for lavapipe.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Jan Beich <jbeich@freebsd.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11909>
2021-07-15 21:57:30 +01:00
Daniel Stone
1061ebb6da vulkan/wsi/wayland: Cosmetic alignment fix
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11909>
2021-07-15 21:57:29 +01:00
Dave Airlie
b3d2642ca4 draw: handle resetting draw_id between instances.
If we have a multi draw then the draw_id needs to get reset
between each instance.

Fixes the rest of the VK CTS multidraw tests

Fixes: ce0b1f23c3 ("aux/draw: track increment_draw_id value from draw info")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11899>
2021-07-16 05:41:25 +10:00
Dave Airlie
5447330a25 lavapipe: fix indexed multi draw draw_id increment
I cut-n-paste this badly from the non-indexed, and used the wrong
struct.

Fixes a bunch of multi-draw CTS

Fixes: cc8f7dbf2a ("lavapipe: fix multi-draw regression in shader parameters test")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11899>
2021-07-16 05:41:12 +10:00
Emma Anholt
bb35195b73 nir: Validate after deserialization.
It's a particularly relevant place for NIR bugs to occur, and if you make
a mistake in this code it gets caught in your debug build in something
like mesa/st's call to nir_split_var_copies() during finalization, which is
rather misleading.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11860>
2021-07-15 18:43:42 +00:00
Iván Briano
004fcfe698 anv: fix some multisample lines_wide CTS tests
We can use a better algorithm from ICL and onward by setting a chicken
bit, but prior to that we need to resort to disabling rectangular lines.
Since we don't support strictLines anyway, this shouldn't be a major
issue.

Closes #2833
Fixes dEQP-VK.rasterization.interpolation_multisample_*_bit.*lines_wide

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11672>
2021-07-15 17:07:35 +00:00
Iván Briano
f40a08d25c anv: Don't advertise unsupported shader stages
We don't currently support mesh or ray tracing, so don't advertise their
shader stages as supported for subgroups.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11893>
2021-07-15 16:32:54 +00:00