Since we now reserve space for memory variables, the indices for
the potential temporaries would now start at 2*ctx->ssa_alloc.
We only create temps in insert_coupling_code and none of those are
used in functions that look up things in the various luts. Only
where the temps are created we have to take care to not pass those
into bi_index_as_memory.
Therefore, let's not allocate any space for them. Otherwise we
would have to double the size of the luts to account for the
memory variables.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39305>
We want to lower spills and fills to actual LS instructions only
after SSA register allocation which future commits will add.
For now, we just lower the new MEMMOV instr immediately.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39305>
Otherwise we potentially waste space in the various lookup tables.
Happens for example in:
dEQP-VK.spirv_assembly.instruction.graphics.composite_insert.nested_struct_frag
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39305>
When the register pressure is at the allowed maximum and we have
instructions like the following, preferring rematerializable values
in cmp_dist means that we evict the source of an instruction before
it is even used. This makes no sense.
10 = LOAD_CONST
11 = LOAD_CONST // here we would evict 10!
12 = USE 10!, 11!
Happens in dEQP-VK.spirv_assembly.instruction.compute.opphi.wide
at the beginning of block1.
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39305>
Mesh shader uses store per vertex output for point size
and store per primitive output for layer id.
This fixes gpu-ratemeter run slow for kill point size
and layer id cases when mono shader is used which expect
to kill these outputs.
Also gather fragment shader per primitive input info
to kill mesh shader per primitive output.
Fixes: e6e21dfbf2 ("radeonsi: kill outputs for mesh shader")
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39644>
It was not possible to enable sqtt for first and second
frame because AMD_THREAD_TRACE_TRIGGER must be positive
and we missed call si_handle_sqtt at the beginning of
the first frame.
To support some test which does not swap buffer, add a
call to si_handle_sqtt when destroy context.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39644>
The GitHub compare API used to verify that DEQP_MAIN_COMMIT is based
on main is very fragile, causing many container build failures.
Add simple retry logic to make the check more robust.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39649>
This brings what ANV reports closer to what Iris reports, and is mostly dropping
redundancies.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39633>
This is for parity with what we do in the current GL shader-db path.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39633>
Traditionally we don't print these for GL and tooling doesn't know about this.
Just drop them. Note that neither AMD nor Intel uses the common GL print path
yet which is why this hadn't been hit.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39633>
The comment claims this was to unroll loops, but nir_opt_loop doesn't do that.
Whatever issue the AGX code was originally working around, it doesn't apply now
(I confirmed we produce similar code with or without the pass). In the meantime,
Panfrost and PowerVR cargo-culted the same broken logic. Drop it all.
Closes: #14732
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39588>
The NOP that sometimes gets emitted when no flags are set was causing
problems with the TC shader declarations on the device side causing the
arb_tesselation_shader@execution@built-in-functions piglit test to fail.
We can always emit the declaration and leave the flags as zero if they
are not enabled rather than outputting the problematic NOP.
Signed-off-by: Ian Forbes <ian.forbes@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39660>
This eliminates expensive div, mod, rem opcodes with non-constant src1 being
constant src1 hiding behind bcsel.
gcc and LLVM are missing this.
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39560>
This adds LNL entries to recently added RHWO and autostrip workarounds
and a media workaround for vulkan video on gfx12.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39622>
For non-WSI images, explicitly map VK_IMAGE_LAYOUT_PRESENT_SRC_KHR to
VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL in anv_layout_to_aux_state().
Before this patch, the function passed PRESENT_SRC into
vk_image_layout_to_usage_flags() and got a return value of 0 from it
(that function expects that layout to be explicitly handled by the
caller). This caused the logic dependent on the return value to be
unreliable.
Fixes: c5cad407f8 ("anv: handle non-wsi images in anv_layout_to_aux_state")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39618>
This also:
- removes the sparse flag (TFE) if it has no uses
- removes trailing unused components (if not sparse) or all contiguous unused
components before the sparse flag (if sparse)
- lowers 64-bit formatted buffer loads to 32 bits
Everything here could also be used by 64-bit non-buffer image loads
and txf if needed.
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
It will lower txf and buffer image loads to load_buffer_amd.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39474>
