fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 16:08:04 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1
26009 commits 66 branches 933 tags 991 MiB
Commit graph

26009 commits

This branch
This branch
All branches
Author SHA1 Message Date
Zack Rusin
57d0934bc5 st/xorg: unite finalization and stub out pipelined copies 2009-09-10 17:21:06 -04:00
Zack Rusin
974dec2e7b st/xorg: abstract flushing and syncing for the exa code 2009-09-10 17:21:06 -04:00
Zack Rusin
16886c8be3 st/xorg: disable solid fills until copies are accelerated as well 2009-09-10 17:21:06 -04:00
Zack Rusin
6be1a98ab9 st/xorg: implement exasolids with full pipelining 
plus fix some small issues with the shaders
 2009-09-10 17:21:06 -04:00
Zack Rusin
3167c2e8a0 st/xorg: start adding support for surface fills 2009-09-10 17:21:06 -04:00
Marcin Kościelnicki
18882f4d30 nv50: Fix tiling mode for lower mipmap levels. 2009-09-10 21:06:48 +02:00
Eric Anholt
36dd53a3cd intel: Don't forget to map the depth read buffer in spans. 
This broke BlitFramebufferEXT(GL_DEPTH_BUFFER_BIT).
 2009-09-10 11:16:18 -07:00
Alex Deucher
e669dc2b0d r300: enable rb3d_discard_src_pixel_lte_threshold for more chips on dri2 2009-09-10 12:04:38 -04:00
Alex Deucher
7dfe54a60e r300: add full support for two sided stencil on r5xx for dri2 2009-09-10 12:01:19 -04:00
Mathias Frohlich
f89751e719 mesa: fix cut&paste typos 2009-09-10 08:50:16 -06:00
Vinson Lee
c7291f69a0 util: Add PIPE_OS_APPLE back to auxiliary/util/u_time.h. 
Fixes typo from commit c6c44bf481.
 2009-09-10 15:33:57 +01:00
José Fonseca
6a405b4a21 llvmpipe: Fix alpha test. 2009-09-10 13:35:39 +01:00
José Fonseca
4c3a48ad0c llvmpipe: Mask out color channels not present in the color buffer. 2009-09-10 12:37:44 +01:00
José Fonseca
48f19c0bcd llvmpipe: Fix sampling from depth textures. Respect texture compare func. 
Fixes Mesa shadowtex sample.
 2009-09-10 12:14:53 +01:00
José Fonseca
c3c80c5c22 llvmpipe: Skip blending when mask is zero. 
This increases quake3 timedemo fps another 10%.
 2009-09-10 12:01:42 +01:00
José Fonseca
8e6b925d2a llvmpipe: Proper control flow builders. 
New control flow helper functions which keep track of all variables
and generate the correct Phi functions.

This re-enables skipping the fs execution of quads masked out by
the rasterizer, early z testing, and kill opcode.

This yields a performance improvement of around 20%.
 2009-09-10 11:44:03 +01:00
José Fonseca
bd3b59da63 llvmpipe: Copy the texture target into the sampler static state. 
Hunk forgotten in previous commit.
 2009-09-10 09:19:51 +01:00
José Fonseca
4139bc8f43 llvmpipe: Quick hack for 1D textures. 2009-09-09 21:48:50 +01:00
José Fonseca
b0b131b023 scons: Pass -mstackrealign option to gcc. 
It is impossible to have gcc generate SSE code without it, as thirdparty
applications often call us with an unaligned stack pointer.
 2009-09-09 21:48:50 +01:00
José Fonseca
abc160b664 llvmpipe: Fix depth mask computation. 
Fixes depth test for 24bit depth formats.
 2009-09-09 21:48:50 +01:00
José Fonseca
cdbbcdf3bd llvmpipe: Include zsbuf's format in the fragment shader key. 2009-09-09 21:48:50 +01:00
José Fonseca
da912a7a16 util: Fix depth/stencil format description. 
Inverse channel order.
 2009-09-09 21:48:49 +01:00
José Fonseca
01c831576e llvmpipe: Debug function to check stack alignment. 
Doing alignment check in locus is redundant, as gcc alignment assumptions
will optimize away the check.
 2009-09-09 21:48:49 +01:00
Eric Anholt
5604b27b93 i965: Fix relocation delta for WM surfaces. 
This was a regression in 0f328c90db.

Bug #23688
Bug #23254
 2009-09-09 12:52:52 -07:00
Brian Paul
4d85a6b393 i965: fix an overlooked merge conflict 2009-09-09 09:24:38 -06:00
Alex Deucher
49c230709c r600: check if textures are actually enabled before submission 
noticed by taiu on IRC.
 2009-09-09 11:17:24 -04:00
Brian Paul
7bf6347362 Merge branch 'mesa_7_6_branch' 2009-09-09 09:00:58 -06:00
Brian Paul
94a8157ef6 mesa: regenerate get.c form get_gen.py 2009-09-09 08:55:32 -06:00
Brian Paul
3fed69eb16 mesa: move call to init_c_cliptest() from enable.c to tnl module. 
Fixed gallium build breakage.
 2009-09-09 08:54:38 -06:00
Brian Paul
0c309bb494 Merge branch 'mesa_7_5_branch' into mesa_7_6_branch 
Conflicts:

	Makefile
	configs/default
	progs/glsl/Makefile
	src/gallium/auxiliary/util/u_simple_shaders.c
	src/gallium/state_trackers/glx/xlib/xm_api.c
	src/mesa/drivers/dri/i965/brw_draw_upload.c
	src/mesa/drivers/dri/i965/brw_vs_emit.c
	src/mesa/drivers/dri/intel/intel_context.h
	src/mesa/drivers/dri/intel/intel_pixel.c
	src/mesa/drivers/dri/intel/intel_pixel_read.c
	src/mesa/main/texenvprogram.c
	src/mesa/main/version.h
 2009-09-09 08:33:39 -06:00
aljen
c6c44bf481 gallium: Added HaikuOS platform 2009-09-09 08:24:18 -06:00
Brian Paul
89a765e92b mesa: disable GL_LUMINANCE case in _mesa_meta_draw_pixels() 
Works around a bug found on i965.  See bug 23670.
 2009-09-09 08:23:14 -06:00
Vinson Lee
d27d659043 scons: Set default_dri to no for Mac OS. 
Mac OS does not have libdrm.
 2009-09-09 08:21:07 -06:00
Alex Deucher
da9ed257a3 r600: fix ftp for dri1 
We use t->bo for dri1 since r600 uses CS for dri1.
 2009-09-09 01:43:17 -04:00
Zhenyu Wang
ca246dd186 intel: add B43 chipset support 
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
 2009-09-09 13:28:59 +08:00
Dave Airlie
5aaa45de4c r600: don't setup hardware state if TFP 
if we have a BO here it means TFP and we should have set it
up already.

tested by b0le on #radeon
 2009-09-09 15:02:16 +10:00
Brian Paul
8947cf6728 progs/tests: added Z invert option 2009-09-08 16:47:30 -06:00
Brian Paul
f78eafcacb mesa: bump version to 7.7 2009-09-08 16:46:06 -06:00
Brian Paul
97cbaab541 gallium: added r8g8b8_get/put_tile_rgba() 2009-09-08 16:45:34 -06:00
Brian Paul
079ae4c38c progs/demos: added RGB invert option 2009-09-08 16:45:07 -06:00
Brian Paul
126696caf7 mesa: fix viewport_z_clip breakage 2009-09-08 16:44:49 -06:00
Jakob Bornecrantz
e589a37f7b i915g: Add buffer write callback 2009-09-09 00:43:36 +01:00
Jakob Bornecrantz
d112132840 i915g: Reorg vbuf code a bit 2009-09-09 00:43:36 +01:00
Jakob Bornecrantz
547b726484 i915g: pwrite batchbuffer instead of map 2009-09-09 00:43:36 +01:00
Jakob Bornecrantz
d585616f5b i915g: Keep vertex buffers in a fifo 2009-09-09 00:43:35 +01:00
Jakob Bornecrantz
6e61d06209 util: Add super simple fifo 2009-09-09 00:43:35 +01:00
Jakob Bornecrantz
3833587818 i915g: Map vertex buffers via gtt 2009-09-09 00:43:35 +01:00
Jakob Bornecrantz
530fbd314e i915g: Remove lib prefix from driver 2009-09-09 00:43:35 +01:00
Eric Anholt
9fff4b46d3 docs: Add basic 7.7 relnotes. 2009-09-08 15:12:22 -07:00
Eric Anholt
f959ccdfa6 intel: Add support for ARB_draw_elements_base_vertex. 
On the 965, we just drop the value into the primitive packet.  On non-945,
we rely on the sw tnl code handling it.
 2009-09-08 15:12:22 -07:00