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12662 commits

Author SHA1 Message Date
Friedrich Vock
4f192b9af4 radv: Split up implementation of radv_shader_create 
This will make it easy to re-use the split-up parts for creating
replayed shaders.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
 2023-07-05 15:58:25 +00:00
Friedrich Vock
51f2fa1a5e radv: Break up radv_shader_nir_to_asm 
radv_shader_nir_to_asm actually had 3 functions: compiling the NIR to
asm, uploading the shaders and generating debug info for them.
This reduces the functionality of radv_shader_nir_to_asm to only compile
NIR to asm. Uploading the shader and generating debug info is split into
separate functions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
 2023-07-05 15:58:25 +00:00
Friedrich Vock
878a731c77 radv: Add radv_shader_reupload 
Used for relocating RT shaders with capture/replay.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
 2023-07-05 15:58:24 +00:00
Friedrich Vock
744357477e radv: Add utilities to serialize and deserialize shader allocation info 
Can be used to capture/replay an arbitrary sequence of shader
allocations while preserving VAs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
 2023-07-05 15:58:24 +00:00
Friedrich Vock
d23e41de6c radv: Add option to allocate shaders in replayable VA range 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
 2023-07-05 15:58:24 +00:00
Friedrich Vock
ec9f5b7777 radv: Move shader arena allocation to a separate function 
The arena size is also needed for capture/replay.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
 2023-07-05 15:58:24 +00:00
Friedrich Vock
91241014e8 radv: Add radv_shader_free_list 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23516>
 2023-07-05 15:58:24 +00:00
Joshua Ashton
59cf3702c4 radv: Remove unused pipeline param from radv_generate_pipeline_key 
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
 2023-07-04 21:05:16 +01:00
Joshua Ashton
5ca8390e5f radv: Advertise VK_EXT_pipeline_robustness 
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
 2023-07-04 21:05:09 +01:00
Joshua Ashton
c9ac960b6a radv: Implement VK_EXT_pipeline_robustness 
Funnel the data from the pNext into the new pipeline key members for buffer robustness

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
 2023-07-04 21:04:38 +01:00
Joshua Ashton
3e269c7a4e radv: Rename radv_required_subgroup_info to radv_shader_stage_key 
Additionally, prefix the members that are subgroup related with subgroup_

We will use this structure to store pipeline robustness information.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
 2023-07-04 21:04:34 +01:00
Joshua Ashton
2c6125c1c5 radv: Split and move buffer robustness to shader key 
Will be used by pipeline robustness.

There is also loads of space in the first dword.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
 2023-07-04 21:04:30 +01:00
Joshua Ashton
3e36b47b96 radv: Rename radv_nir_compiler_options::robust_buffer_access to robust_buffer_access_llvm 
This is only used by LLVM, make that clearer.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
 2023-07-04 21:04:21 +01:00
Joshua Ashton
f52ebc8b40 radv: Refactor buffer robustness to an enum 
Will be taken advantage of with pipeline robustness.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
 2023-07-04 21:04:10 +01:00
Yonggang Luo
0fbec6dd79 radv: Use nir_remove_non_entrypoints in radv_shader.c 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23902>
 2023-07-03 21:45:35 +00:00
Konstantin Seurer
20beebb041 amd: Move ac_hw_stage to its own file 
Otherwise ACO has to include ac_shader_util.h which also includes NIR.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23906>
 2023-07-03 21:12:45 +00:00
Connor Abbott
d322a80170 radv: Fix radv_pipeline_is_blend_enabled 
This was relying on cb being NULL instead of just gracefully handling
it, and it will stop being NULL once we start tracking attachment count
as state. Moreover is was broken in the case where only the blend enable
is dynamic.

Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22301>
 2023-07-03 19:51:05 +00:00
Tatsuyuki Ishi
94b92718d9 radv: Enable weak reference cache for device->mem_cache. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23878>
 2023-07-03 17:59:07 +00:00
Daniel Schürmann
3bd72eec1e radv: reference pipeline cache object in radv_pipeline 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23878>
 2023-07-03 17:59:07 +00:00
Konstantin Seurer
1ea963c00b radv: Use nir_builder_at 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
 2023-07-03 15:21:37 +00:00
Rhys Perry
ae48fae658 aco: remove 64-bit integer conversion opcodes 
These are handled by nir_lower_int64 now.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23926>
 2023-07-03 10:38:28 +00:00
Rhys Perry
b3b9b22c95 radv: call nir_lower_int64 later 
I would rather this be after several of these complicated lowering passes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23926>
 2023-07-03 10:38:27 +00:00
Rhys Perry
38cff03e58 radv: use nir_lower_conv64 
This has a more accurate i2f/u2f implementation.

fossil-db (navi21):
Totals from 342 (0.26% of 133461) affected shaders:
MaxWaves: 10480 -> 10472 (-0.08%)
Instrs: 273455 -> 274019 (+0.21%); split: -0.02%, +0.22%
CodeSize: 1545020 -> 1546852 (+0.12%); split: -0.11%, +0.23%
VGPRs: 9528 -> 9552 (+0.25%)
SpillSGPRs: 553 -> 592 (+7.05%); split: -2.71%, +9.76%
SpillVGPRs: 821 -> 811 (-1.22%); split: -1.71%, +0.49%
Latency: 3837590 -> 3822989 (-0.38%); split: -0.52%, +0.14%
InvThroughput: 1284512 -> 1277012 (-0.58%); split: -0.77%, +0.19%
VClause: 6480 -> 6486 (+0.09%); split: -0.15%, +0.25%
SClause: 6640 -> 6645 (+0.08%); split: -0.02%, +0.09%
Copies: 45858 -> 46160 (+0.66%); split: -0.10%, +0.76%
Branches: 8736 -> 8741 (+0.06%); split: -0.01%, +0.07%
PreSGPRs: 14320 -> 14323 (+0.02%)
PreVGPRs: 8545 -> 8551 (+0.07%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9275
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23926>
 2023-07-03 10:38:27 +00:00
Timur Kristóf
bd43d9e3d9 radv: Enable required subgroup size on mesh/task. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23925>
 2023-07-03 10:49:11 +02:00
Timur Kristóf
34ace6688a radv: Use required subgroup info for graphics shaders. 
We plan to allow setting this on some graphics shader stages.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23925>
 2023-07-03 10:49:00 +02:00
Timur Kristóf
8982bd6045 radv: Refactor required subgroup size in pipeline key. 
This is to allow setting required subgroup size and
full subgroups on more than just the compute stage.

Use an enum (not the actual subgroup size integer)
so that we can have some bits reserved there for
future use.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23925>
 2023-07-03 10:47:39 +02:00
Rhys Perry
25c49e491f aco,ac/llvm,ac/nir,vtn: unify cube opcodes 
fossil-db (navi21):
Totals from 17068 (12.79% of 133461) affected shaders:
Instrs: 24743703 -> 24743572 (-0.00%); split: -0.00%, +0.00%
CodeSize: 132579952 -> 132580620 (+0.00%); split: -0.00%, +0.00%
VGPRs: 1227840 -> 1227984 (+0.01%)
Latency: 403180114 -> 403251188 (+0.02%); split: -0.00%, +0.02%
InvThroughput: 75311302 -> 75320892 (+0.01%); split: -0.00%, +0.01%
VClause: 415400 -> 415402 (+0.00%); split: -0.00%, +0.00%
Copies: 1715404 -> 1715258 (-0.01%); split: -0.01%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com> (r600)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23930>
 2023-06-30 15:35:03 +00:00
Timur Kristóf
d63549a642 ac/nir/ngg: Follow tex sources when analyzing before culling. 
Helps find more possible reusable uniforms variables.
Also prepares the code for more improvements to the analysis.

Fossil DB stats on GFX10.3:

Totals from 6745 (5.00% of 134913) affected shaders:
VGPRs: 304824 -> 304632 (-0.06%)
SpillSGPRs: 228 -> 231 (+1.32%)
CodeSize: 24975152 -> 24863684 (-0.45%); split: -0.56%, +0.11%
Instrs: 4774357 -> 4760913 (-0.28%); split: -0.42%, +0.13%
Latency: 22381084 -> 22218421 (-0.73%); split: -0.88%, +0.15%
InvThroughput: 3984765 -> 3981677 (-0.08%); split: -0.10%, +0.02%
VClause: 110036 -> 110265 (+0.21%); split: -0.67%, +0.88%
SClause: 116296 -> 104576 (-10.08%); split: -10.89%, +0.81%
Copies: 366923 -> 377370 (+2.85%); split: -0.78%, +3.63%
Branches: 119882 -> 119891 (+0.01%); split: -0.00%, +0.01%
PreSGPRs: 314591 -> 350697 (+11.48%); split: -0.36%, +11.83%
PreVGPRs: 252279 -> 252267 (-0.00%); split: -0.02%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
 2023-06-30 11:47:03 +00:00
Timur Kristóf
411f69b9c5 ac/nir/ngg: Follow intrinsic sources when analyzing before culling. 
Helps find more possible reusable uniforms variables.
Also prepares the code for more improvements to the analysis.

Fossil DB stats on GFX10.3:

Totals from 54578 (40.45% of 134913) affected shaders:
VGPRs: 1950536 -> 1950328 (-0.01%); split: -0.02%, +0.01%
SpillSGPRs: 483 -> 1324 (+174.12%); split: -8.90%, +183.02%
CodeSize: 148017620 -> 146549576 (-0.99%); split: -1.10%, +0.11%
MaxWaves: 1533710 -> 1533716 (+0.00%); split: +0.00%, -0.00%
Instrs: 28137479 -> 27909113 (-0.81%); split: -0.94%, +0.13%
Latency: 134454624 -> 130909188 (-2.64%); split: -2.72%, +0.09%
InvThroughput: 20664192 -> 20646525 (-0.09%); split: -0.15%, +0.06%
VClause: 540374 -> 540986 (+0.11%); split: -0.76%, +0.88%
SClause: 720823 -> 636209 (-11.74%); split: -12.46%, +0.72%
Copies: 2287330 -> 2326140 (+1.70%); split: -1.71%, +3.41%
Branches: 844769 -> 844848 (+0.01%); split: -0.00%, +0.01%
PreSGPRs: 1987505 -> 2416965 (+21.61%); split: -0.12%, +21.73%
PreVGPRs: 1582704 -> 1581579 (-0.07%); split: -0.07%, +0.00%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
 2023-06-30 11:47:03 +00:00
Timur Kristóf
91b28fc621 ac/nir/ngg: Add upper limit to reusable uniforms. 
This is a heuristic to try to reduce SGPR spilling.

While the stats changes on this commit are not impressive,
this is mainly meant to reduce the regressions from the
next few commits which will find more of these
reusable uniforms.

Fossil DB stats on GFX10.3:

Totals from 567 (0.42% of 134913) affected shaders:
VGPRs: 32528 -> 32608 (+0.25%)
SpillSGPRs: 291 -> 247 (-15.12%); split: -49.14%, +34.02%
CodeSize: 3956896 -> 4006552 (+1.25%); split: -0.07%, +1.33%
MaxWaves: 10508 -> 10486 (-0.21%)
Instrs: 756092 -> 764613 (+1.13%); split: -0.09%, +1.22%
Latency: 2533679 -> 2544752 (+0.44%); split: -0.09%, +0.52%
InvThroughput: 733729 -> 733690 (-0.01%); split: -0.06%, +0.06%
VClause: 4853 -> 4861 (+0.16%); split: -1.36%, +1.52%
SClause: 15627 -> 17485 (+11.89%); split: -0.01%, +11.90%
Copies: 62584 -> 65345 (+4.41%); split: -1.61%, +6.02%
Branches: 17356 -> 17405 (+0.28%); split: -0.10%, +0.39%
PreSGPRs: 46758 -> 43465 (-7.04%); split: -8.37%, +1.33%
PreVGPRs: 28944 -> 28931 (-0.04%); split: -0.08%, +0.04%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
 2023-06-30 11:47:03 +00:00
Timur Kristóf
ddeabcc19b ac/nir/ngg: Call nir_convert_to_lcssa before divergence analysis. 
I've recently learned that this is necessary to get
correct results from divergence analysis.

No Fossil DB stats changes on GFX10.3.

Note, when backporting this patch to stable, make sure
the call to nir_convert_to_lcssa is before nir_divergence_analysis,
which may be located in a different place in the stable branch.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
 2023-06-30 11:47:03 +00:00
Samuel Pitoiset
b544a6d6c3 radv: emit PA_SC_SCREEN_SCISSOR_BR with the actual fb extent 
For some reasons, this register is needed for RGP to report actual
render/depth targets size instead of 0 for both width/height. It
doesn't seem to have any other effects.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9169
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23921>
 2023-06-30 06:38:53 +00:00
Eric Engestrom
9a8a7aaf1d ci: split valve farm in two 
There are two physical locations, so it makes sense to manage them
separately.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23908>
 2023-06-29 20:25:01 +00:00
Eric Engestrom
690549f1b6 amd/ci: add another dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.* flake 
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/44643768

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23935>
 2023-06-29 17:35:12 +00:00
Juston Li
33ee59af1d radv: fix incorrect size for primitives generated query 
Primitives generated queries write 1 integer, the primitives-generated
count that is incremented every time a primitive emitted to that stream
reaches the transform feedback stage.

Fixes: 1ebf463a5a ("radv: implement VK_EXT_primitives_generated_query")
Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23915>
 2023-06-29 16:58:50 +00:00
Georg Lehmann
5099137612 aco/optimizer: delete s_bitcmp optimization 
This is now done in NIR.
No Foz-DB changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23298>
 2023-06-29 13:39:30 +00:00
Georg Lehmann
130fbda71b radv: set has_bit_test for aco 
Foz-DB Navi21:
Totals from 15285 (11.52% of 132657) affected shaders:
VGPRs: 1019136 -> 1019000 (-0.01%); split: -0.02%, +0.01%
SpillSGPRs: 10889 -> 10909 (+0.18%)
SpillVGPRs: 901 -> 914 (+1.44%); split: -0.89%, +2.33%
CodeSize: 103578640 -> 103523220 (-0.05%); split: -0.08%, +0.03%
MaxWaves: 259782 -> 259820 (+0.01%)
Instrs: 19247383 -> 19223764 (-0.12%); split: -0.15%, +0.02%
Latency: 323877613 -> 323684655 (-0.06%); split: -0.10%, +0.04%
InvThroughput: 62505295 -> 62386541 (-0.19%); split: -0.21%, +0.02%
VClause: 366162 -> 366136 (-0.01%); split: -0.03%, +0.02%
SClause: 786505 -> 785527 (-0.12%); split: -0.22%, +0.10%
Copies: 1348920 -> 1349209 (+0.02%); split: -0.26%, +0.29%
Branches: 456331 -> 456324 (-0.00%); split: -0.01%, +0.00%
PreSGPRs: 849542 -> 849402 (-0.02%); split: -0.02%, +0.01%
PreVGPRs: 925300 -> 924678 (-0.07%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23298>
 2023-06-29 13:39:30 +00:00
Georg Lehmann
573e98f34a aco: implement nir_op_bitz/bitnz 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23298>
 2023-06-29 13:39:30 +00:00
Erik Faye-Lund
a6da9d7147 amd: use imm-helpers 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
 2023-06-29 07:08:19 +00:00
Joshua Ashton
68b9ad0ba7 radv: Do not enable robustness for push constants with robustBufferAccess2 
There is no spec text requiring this behaviour, it is only for buffers.

Signed-off-by: Joshua Ashton <joshua@froggi.es>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23885>
 2023-06-28 20:49:30 +00:00
Konstantin Seurer
1e2f647fbb radv/rt: Hash stages using radv_hash_shaders 
The hash also depends on the radv_pipeline_key as well as the flags. The
pipeline layout will also play a role when we implement inline
descriptor sets and push constants.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23747>
 2023-06-28 19:45:25 +00:00
Konstantin Seurer
de1092e256 radv/rt: Fix caching non-recursive stages 
The hash used for insertion is calculated in a different way than the
hash used for lookup.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23747>
 2023-06-28 19:45:25 +00:00
Eric Engestrom
189c7d6ff1 amd/ci: add another dEQP-VK.multiview.renderpass2.multisample.* flake 
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/44557372

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23910>
 2023-06-28 18:32:10 +00:00
Samuel Pitoiset
3f7ea95bc9 radv: inline more values in radv_emit_fb_ds_state() 
These are no longer adjusted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23887>
 2023-06-28 13:21:44 +00:00
Samuel Pitoiset
5010ab8fff radv: stop emitting TILE_SURFACE_ENABLE for the ZRANGE_PRECISION workaround 
The only case that matters is when the fb is emitted, but HTILE is
already disabled there using DB_RENDER_CONTROL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23887>
 2023-06-28 13:21:44 +00:00
Samuel Pitoiset
7b8c6cedcf radv: allow NV_device_generated_commands with RADV_DEBUG=noibs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23791>
 2023-06-28 06:34:20 +00:00
Samuel Pitoiset
277b2afd70 radv/amdgpu: add support for executing DGC cmdbuf with RADV_DEBUG=noibs 
This contains some preliminary work to be able to execute DGC cmdbuf
on the compute queue because IB2 doesn't exist.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23791>
 2023-06-28 06:34:20 +00:00
Samuel Pitoiset
82c60b41e9 radv/amdgpu: add more small helpers for managing CS 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23791>
 2023-06-28 06:34:20 +00:00
Rhys Perry
79d935ceaf radv: use nir_opt_intrinsics 
No fossil-db changes (navi21).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23621>
 2023-06-27 18:53:50 +00:00
Rhys Perry
58f8e0e2a0 nir,aco: add INCLUDE_HELPERS index to reduce intrinsic 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23621>
 2023-06-27 18:53:50 +00:00