Commit graph

138427 commits

Author SHA1 Message Date
Dave Airlie
4e67d2aad4 crocus: find correct relocation target for the bo.
If we have batch a + b, and writing to batch b, causes batch a
to flush, all the bo->index get reset, and we try to submit a -1
to the kernel.

Look the bo index up when creating relocations.

Fixes crash seen in KHR-GL46.compute_shader.pipeline-post-fs
and a trace from Wasteland 3

Fixes: f3630548f1 ("crocus: initial gallium driver for Intel gfx 4-7")

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14905>
(cherry picked from commit 37c3be6947)

Conflicts:
	src/gallium/drivers/crocus/ci/crocus-hsw-flakes.txt

I've deleted this file, which the original removed an entry from as it
doesn't exist, and the CI isn't run on the 22.0 branch.
2022-02-07 21:51:26 -08:00
Mike Blumenkrantz
8f5fb1eb10 zink: min/max blit region in coverage functions
these regions might not have the coords in the correct order, which will
cause them to fail intersection tests, resulting in clears that are never
applied

cc: mesa-stable

fixes:
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_all_buffer_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_color_and_depth_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_color_and_stencil_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_linear_filter_color_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_magnifying_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_minifying_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_missing_buffers_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_nearest_filter_color_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_dimensions_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_height_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_width_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_scissor_blit

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14867>
(cherry picked from commit 388f23eabe)
2022-02-07 21:49:43 -08:00
Mike Blumenkrantz
4587268d2b zink: reject invalid draws
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14859>
(cherry picked from commit b656ab75a6)
2022-02-07 21:49:43 -08:00
Mike Blumenkrantz
a04818a500 zink: fix PIPE_CAP_TGSI_BALLOT export conditional
this requires VK_EXT_shader_subgroup_ballot

cc: mesa-stable

fixes (lavapipe):
KHR-GL46.shader_ballot_tests.ShaderBallotAvailability
KHR-GL46.shader_ballot_tests.ShaderBallotFunctionRead

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14858>
(cherry picked from commit e38c13830f)
2022-02-07 21:49:42 -08:00
Rhys Perry
59b2c1ddde radv: fix R_02881C_PA_CL_VS_OUT_CNTL with mixed cull/clip distances
Matches radeonsi.

Seems Vulkan CTS doesn't really test cull distances. Removing
VARYING_SLOT_CULL_DIST0/VARYING_SLOT_CULL_DIST1 variables doesn't break
any of dEQP-VK.clipping.*, except for tests which read the variables in
the fragment shader.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5984
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14882>
(cherry picked from commit 7ddad1b93a)
2022-02-07 21:49:42 -08:00
Daniel Stone
2ce020120a egl/wayland: Reset buffer age when destroying buffers
A buffer age of 0 means that the buffer is uninitialised or has unknown
content. We rely on the buffer age initially being 0 through zalloc when
the surface is first created; when they are first used for a swap, we
set their age to 1, and then we increment the age of every buffer in the
chain with a non-zero age when we swap.

Now that we can release buffers, both through dmabuf-feedback as well as
detecting when we're using a deeper swapchain than the compositor needs,
make sure to reset their age as they are released. Without doing this,
the age will stay as it was before it was released and be incremented,
returning the wrong age to the user the first time a previously-released
buffer slot has been reused.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5977
Fixes: 22d796feb8 ("egl/wayland: break double/tripple buffering feedback loops")
Fixes: b5848b2dac ("egl/wayland: use surface dma-buf feedback to allocate surface buffers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14873>
(cherry picked from commit 3da8300562)
2022-02-07 21:49:41 -08:00
Samuel Pitoiset
ba2d22e95f Revert "radv: re-apply "Do not access set layout during vkCmdBindDescriptorSets.""
The most famous RADV revert over the past months. This was an issue
in RADV and not an use-after-free (descriptor set layouts can be
destroyed almost at any time).

This reverts commit b775aaff1e.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14621>
(cherry picked from commit 9ea4029f9f)
2022-02-07 21:49:15 -08:00
Charmaine Lee
5ff5f3cbf7 mesa: fix misaligned pointer returned by dlist_alloc
In cases where the to-be-allocated node size with padding exceeds BLOCK_SIZE
but without padding doesn't, a new block is not created and no padding is done
to the previous instruction, causing a misaligned pointer to be returned.

v2: Per Ilia Mirkin's suggestion, remove the extra condition in the first
    if statement, let it unconditionally pad the last instruction if needed.
    The updated currentPos will then be taken into account in the
    block size checking.

This fixes crash seen with lightsmark and Optuma apitraces

Fixes:  05605d7f53 (' mesa: remove display list OPCODE_NOP')

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Tested-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14871>
(cherry picked from commit 945a1e0b8c)
2022-02-07 21:36:05 -08:00
Neha Bhende
5a7a564d7c svga: store shared_mem_size in svga_compute_shader instead of svga_context
When new context was created, shared_mem_size was getting overwritten.
This fixes glretrace failure seen with manhattan, aztec and BASS2_intro
apitraces

Fixes: 247c61f2d0 ('svga: Add support for compute shader, shader buffers and image views')

Tested with glretrace, piglit

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
(cherry picked from commit dd6793ec9218782b1b716a87582d7219bae4e75f)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14870>
(cherry picked from commit 9230b28533)
2022-02-07 21:36:04 -08:00
Mike Blumenkrantz
2c7d0e1b49 zink: use scanout obj when returning resource param info
embarrassing typo since the base obj has no modifier data available

cc: mesa-stable

fixes #5980

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14875>
(cherry picked from commit 960e72417f)
2022-02-07 21:36:04 -08:00
Danylo Piliaiev
83eef372a2 turnip: Unconditionaly remove descriptor set from pool's list on free
We didn't remove desc set from the pool's list if pool was
host_memory_base. On the other hand in there is no point in removing
desc set from the list in DestroyDescriptorPool/ResetDescriptorPool.

Fixes: da7a4751
("turnip: Drop references to layout of all sets on pool reset/destruction")

Fixes cts tests:
 dEQP-VK.api.buffer_marker.graphics.default_mem.bottom_of_pipe.memory_dep.draw
 dEQP-VK.api.buffer_marker.graphics.default_mem.bottom_of_pipe.memory_dep.dispatch

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14855>
(cherry picked from commit 183bc15bdb)
2022-02-07 21:36:03 -08:00
Kenneth Graunke
0a1f166f4d iris: Make an iris_foreach_batch macro that skips unsupported batches
IRIS_BATCH_BLITTER isn't supported prior to Tigerlake; in general,
batches may not be supported on all hardware.  In most cases, querying
them is harmless (if useless): they reference nothing, have no commands
to flush, and so on.  However, the fence code does need to know that
certain batches don't exist, so it can avoid adding inter-batch fences
involving them.

This patch introduces a new iris_foreach_batch() iterator macro that
walks over all batches that are actually supported on the platform,
while skipping the others.  It provides a central place to update should
we add or reorder more batches in the future.

Fixes various tests in the piglit.spec.ext_external_objects.* category.

Thanks to Tapani Pälli for catching this.

Fixes: a90a1f15 ("iris: Create an IRIS_BATCH_BLITTER for using the BLT command streamer")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14834>
(cherry picked from commit fd0e4aedeb)
2022-02-07 21:36:03 -08:00
Jesse Natalie
68242654f8 microsoft/compiler: Only treat tess level location as special if it's a patch constant
Fixes: a550c059 ("microsoft/compiler: For load_input from DS, use loadPatchConstant")
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14837>
(cherry picked from commit ce6dbbabf9)
2022-02-07 21:36:02 -08:00
Jesse Natalie
c7bd1f0720 microsoft/compiler: Only prep phis for the current function
Fixes: 41af9620 ("microsoft/compiler: Emit all NIR functions into the DXIL module")
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14837>
(cherry picked from commit 0c711dc823)
2022-02-07 21:36:02 -08:00
Mike Blumenkrantz
88762cf59b zink: add VK_BUFFER_USAGE_CONDITIONAL_RENDERING_BIT_EXT for query binds
required by spec

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14853>
(cherry picked from commit 1e96542390)
2022-02-07 21:36:01 -08:00
Rhys Perry
a58a01050c aco: don't encode src2 for v_writelane_b32_e64
Encoding src2 doesn't cause issues for print_asm() because we have a
workaround there, but it does for RGP and it seems the developers are not
interested in fixing it.

https://github.com/GPUOpen-Tools/radeon_gpu_profiler/issues/61

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14832>
(cherry picked from commit 0447a2303f)
2022-02-03 10:32:02 -08:00
Pierre-Eric Pelloux-Prayer
b6e296f823 radeonsi: limit loop unrolling for LLVM < 13
Without this change LLVM 12 hits this error:

"""
LLVM ERROR: Error while trying to spill SGPR0_SGPR1 from class SReg_64:
Cannot scavenge register without an emergency spill slot!
"""

when running glcts KHR-GL46.arrays_of_arrays_gl.AtomicUsage test.

Fixes: 9ff086052a ("radeonsi: unroll loops of up to 128 iterations")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14848>
(cherry picked from commit eaa87b1a46)
2022-02-03 10:32:02 -08:00
Iago Toral Quiroga
fabb6b5c5e broadcom/compiler: fix offset alignment for ldunifa when skipping
The intention was to align the address to 4 bytes (32-bit), not
16 bytes.

Fixes: bdb6201ea1 ("broadcom/compiler: use ldunifa with unaligned constant offset")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14830>
(cherry picked from commit 0a8449b07c)
2022-02-03 10:32:01 -08:00
Mike Blumenkrantz
0ec3de0563 llvmpipe: disable PIPE_SHADER_CAP_FP16_CONST_BUFFERS
this cap is broken

cc: mesa-stable

fixes:
GTF-GL46.gtf21.GL2Tests.glGetUniform.glGetUnifor

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14835>
(cherry picked from commit 9a75392cd8)
2022-02-03 10:32:01 -08:00
Mike Blumenkrantz
b2be43a192 zink: disable PIPE_SHADER_CAP_FP16_CONST_BUFFERS
this cap is broken

cc: mesa-stable

fixes:
GTF-GL46.gtf21.GL2Tests.glGetUniform.glGetUniform

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14835>
(cherry picked from commit 9a38dab2d1)
2022-02-03 10:32:00 -08:00
Bas Nieuwenhuizen
0395c483d4 radv: Handle SDMA for padding.
Also assert that nobody actually needs to chain an SDMA IB because we have
not implemented non-PKT3 chaining.

Fixes: ef40f2ccc2 ("radv/amdgpu: Fix handling of IB alignment > 4 words.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5923
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14781>
2022-02-02 22:23:17 +00:00
Emma Anholt
dbcdededb2 intel: Add missing dep of gen_*_header.py on utils.py.
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14725>
2022-02-02 11:21:57 -08:00
Emma Anholt
3d5ee08c15 freedreno/isaspec: Add missing dep of encode.py/decode.py calls on isa.py
Fixes: #5921
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14725>
2022-02-02 11:21:56 -08:00
Caio Oliveira
242c7a6513 anv: Add experimental support for VK_NV_mesh_shader
Enable setting ANV_EXPERIMENTAL_NV_MESH_SHADER=1 environment variable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Caio Oliveira
d9416cd8bd intel/dev: Enable Mesh Shading for DG2
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
da273b2b7b anv: Put first few push constants directly into Task/Mesh InlineData
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
27c32fd14b anv: include ClipDistance array in mesh shader per-vertex output
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
c95b4ac2eb anv: tell the hardware about gl_[Clip|Cull]Distance in mesh shaders
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
bbde9f2448 anv: Implement indirect dispatch for Mesh pipeline
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
18e628135d anv: Add support for UBOs, SSBOs and push constants in Mesh pipeline
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
f12f5ae2f8 anv: Add support for non-zero firstTask in vkCmdDrawMeshTasksNV
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Marcin Ślusarz
97da3e0814 anv: Enable conditional rendering in vkCmdDrawMeshTasksNV
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Caio Oliveira
ef04caea9b anv: Implement Mesh Shading pipeline
The Mesh pipeline is implemented as a variant of the
regular (primitive) Graphics Pipeline.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Caio Oliveira
325ac235a7 anv: Add boilerplate for VK_NV_mesh_shader
Use minimum values for the properties.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Caio Oliveira
c93cbc77f7 intel/common: Add helper for URB allocation in Mesh pipeline
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Caio Marcelo de Oliveira Filho
b01c73fd0a intel: Add INTEL_URB_DEREF_BLOCK_SIZE_MESH
And corresponding value in XML.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
2022-02-02 18:17:57 +00:00
Alyssa Rosenzweig
4c38229ac1 pan/va: Add ARM_shader_framebuffer_fetch asm test
This is a nontrivial chunk of code that makes for a nice dis/assembler test
case (and caught a bug already...). Add it to the observatory.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Alyssa Rosenzweig
a99eac8a49 pan/va: Handle shift lanes in assembler
Noticed in a program using ARM_shader_framebuffer_fetch.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Alyssa Rosenzweig
b3c7159308 pan/va: Add lots of swizzle assembler tests
The swizzle handling in ISA.xml was broken in a bunch of place. Now that
we've fixed these issues, let's add tons of tests to validate.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Alyssa Rosenzweig
57bb3c7158 pan/va: Add 2-channel 8-bit swizzles for conversions
Instructions like V2S8_TO_V2S16 need a special 4-bit special selecting any two
bytes. The definition is the same as Bifrost. Let's call this a half-swizzle
since we need a name, and it is indeed half a swizzle...

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Alyssa Rosenzweig
cdb7c4e42d pan/va: Vectorize 8->16-bit conversions
Matches Bifrost, too.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Alyssa Rosenzweig
441c47ff74 pan/va: Fix lane select for [US]_TO_[USF]32
The lane select is in bit 28, this is covered by the "16-bit swizzle" mode.
However, the source type isn't inferred from the name in valhall.py, so
explicitly annotate the source as 16-bit.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Alyssa Rosenzweig
46cd0ddcb6 pan/va: Fix MKVEC.v2i16 lane select
The lanes are at bit 28 and bit 26 respectively. This matches the 16-bit "swizzle" encoding. In general the handling of widens/swizzles/lane/lanes on Valhall is rather confused but... one problem at a time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Alyssa Rosenzweig
a95ca2402c pan/va: Test LD_TILE assembly
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Alyssa Rosenzweig
dc61e362f4 pan/va: Add missing fields to LD_TILE
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Alyssa Rosenzweig
0f9007985d pan/va: Add missing <clamp/> to V2F32_TO_V2F16
For parity with Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Alyssa Rosenzweig
3fff018c98 pan/va: Add .absolute bit to BRANCHZI
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14833>
2022-02-02 17:42:01 +00:00
Lionel Landwerlin
665ffd4bf9 anv: Update VK_KHR_fragment_shading_rate for newer HW
Per primitive & attachment shading rate support added.

v2: Rebase on KHR_dynamic_rendering

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
fc837e9f8b anv/pass: rely on precomputed dynamic rendering pass/subpass more
For instance, the current code in genX_cmd_buffer.c assumes that the
depth/stencil attachments & resolves will be at the end of all
attachments, but that won't be the case anymore with fragment rate
shading.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00
Lionel Landwerlin
16763e8b8e anv: force primitive shading rate write in last geometry stage
v2: Use new helper to check if stage supports variable shading rate
    setting

v3: Update comment & iterate backward (Caio)
    Apply only to relevant platforms (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
2022-02-02 17:09:46 +00:00