Commit graph

65666 commits

Author SHA1 Message Date
Faith Ekstrand
3797fc18d8 util/format_pack: Clamp SNORM values to [-1, 1] when unpacking
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28793>
2024-06-19 01:56:22 +00:00
Erico Nunes
08ecb39789 lima/ci: update piglit ci expectations
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29474>
2024-06-18 19:13:27 +00:00
Maaz Mombasawala
9cadf45ddf svga: Retry DRM_VMW_SYNCCPU ioctl on failure.
The ioctl DRM_VMW_SYNCCPU may sometimes fail with ERESTART or EBUSY, which
in turn bubbles up to the application as a GL_OUT_OF_MEMORY error.
We are seeing this in glamor, while this does not cause any real issues, it
does pollute the system log.
Retrying DRM_VMW_SYNCCPU fixes this issue.

Reviewed-by: Neha Bhende <neha.bhende@broadcom.com>
Reviewed-by: Zack Rusin <zack.rusin@broadcom.com>
Reviewed-by: Martin Krastev <martin.krastev@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29755>
2024-06-18 19:01:53 +00:00
Connor Abbott
0a4afef6ea freedreno/a6xx: Implement early preamble
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
2024-06-18 16:52:31 +00:00
Connor Abbott
d35c1e5051 freedreno/a6xx: Workaround early preamble HW bug
Port of the previous commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27462>
2024-06-18 16:52:31 +00:00
Marek Olšák
75777f1dc8 nir: add a NIR option flag nir_io_prefer_scalar_fs_inputs
It's a NIR option because passing flags from radeonsi to the GLSL linker is
complicated.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29406>
2024-06-17 23:48:35 +00:00
Francisco Jerez
8e61d32db8 iris,anv/xe2+: Use pipelined variant of 3DSTATE_DRAWING_RECTANGLE.
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29562>
2024-06-17 16:19:17 -07:00
Francisco Jerez
576c9e3af2 iris,anv/xe2+: Set tessellation redistribution regions per patch to recommended values.
See also HSDES#14015504893 regarding the region-based tessellation
redistribution feature which allows fine-tuning the number of regions
per patch.  This sets it to the recommended value, since region-based
redistribution is enabled by default.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29562>
2024-06-17 16:19:17 -07:00
Francisco Jerez
2aa4652a68 iris,anv/xe2+: Enable the DX10/OGL border mode for YCrCb as per Wa_14014226147.
Hardware defaults to DX9 YCrCb border color mode instead of the
behavior expected for DX10/OGL.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29562>
2024-06-17 16:19:17 -07:00
Alyssa Rosenzweig
15257b65c6 treewide: use nir_metadata_control_flow
Via Coccinelle patch:

    @@
    @@

    -nir_metadata_block_index | nir_metadata_dominance
    +nir_metadata_control_flow

...plus some manual fixups for call sites missed by coccinelle.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Juan A. Suarez Romero <jasuarez@igalia.com> [broadcom]
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com> [lima]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29745>
2024-06-17 16:28:14 -04:00
Daniel Schürmann
7af16e9f1e nir/shader_info: remove uses_demote
This flag is mostly redundant with uses_discard and was only
introduced to implement demote with LLVM when it didn't have
that intrinsic.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617>
2024-06-17 19:37:16 +00:00
Daniel Schürmann
e52e8dd02e zink: pass zink_screen to nir_to_spirv().
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617>
2024-06-17 19:37:16 +00:00
Daniel Schürmann
9b1a748b5e nir: remove nir_intrinsic_discard
The semantics of discard differ between GLSL and HLSL and
their various implementations. Subsequently, numerous application
bugs occurred and SPV_EXT_demote_to_helper_invocation was written
in order to clarify the behavior. In NIR, we now have 3 different
intrinsics for 2 things, and while demote and terminate have clear
semantics, discard still doesn't and can mean either of the two.

This patch entirely removes nir_intrinsic_discard and
nir_intrinsic_discard_if and replaces all occurences either with
nir_intrinsic_terminate{_if} or nir_intrinsic_demote{_if} in the
case that the NIR option 'discard_is_demote' is being set.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617>
2024-06-17 19:37:16 +00:00
Daniel Schürmann
f3d8bd18dd nir: introduce discard_is_demote compiler option
This new option indicates that the driver emits the same
code for nir_intrinsic_discard and nir_intrinsic_demote.
Otherwise, it is assumed that discard is implemented as
terminate.

spirv_to_nir uses this option in order to directly emit
nir_demote in case of OpKill.

RADV GFX11:
Totals from 3965 (4.99% of 79439) affected shaders:
MaxWaves: 119418 -> 119424 (+0.01%); split: +0.03%, -0.03%
Instrs: 1608753 -> 1620830 (+0.75%); split: -0.18%, +0.93%
CodeSize: 8759152 -> 8785152 (+0.30%); split: -0.18%, +0.48%
VGPRs: 152292 -> 149232 (-2.01%); split: -2.37%, +0.36%
Latency: 9162314 -> 10033923 (+9.51%); split: -0.46%, +9.97%
InvThroughput: 1491656 -> 1493408 (+0.12%); split: -0.10%, +0.22%
VClause: 21424 -> 21452 (+0.13%); split: -0.31%, +0.44%
SClause: 53598 -> 55871 (+4.24%); split: -2.15%, +6.39%
Copies: 90553 -> 90462 (-0.10%); split: -2.91%, +2.81%
Branches: 16283 -> 16311 (+0.17%)
PreSGPRs: 113993 -> 113254 (-0.65%); split: -1.84%, +1.19%
PreVGPRs: 110951 -> 108914 (-1.84%); split: -2.08%, +0.24%
VALU: 963192 -> 963167 (-0.00%); split: -0.01%, +0.01%
SALU: 87926 -> 90795 (+3.26%); split: -2.92%, +6.18%
VMEM: 25937 -> 25936 (-0.00%)
SMEM: 110012 -> 109799 (-0.19%); split: -0.20%, +0.01%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617>
2024-06-17 19:37:15 +00:00
Pavel Ondračka
4b040577d5 r300: vectorization tweaks for R300/R400
Vectorization can make the constant layout worse and increase
the constant register usage. The worst scenario is vectorization
lowered indirect register access, where we access i-th element
and later we access i-1 or i+1 (most notably glamor and gsk shaders).
In this case we already added constants 1..n where n is the array
size, however we can reuse them unless the lowered ladder gets
vectorized later.

Thus prevent vectorization of the specific patterns from lowered
indirect access.

This is quite a heavy hammer, we could in theory estimate how many
slots will the current ubos and constants need and only disable
vectorization when we are close to the limit. However, this would
likely need a global shader analysis each time r300_should_vectorize_inst
is called, which we want to avoid.

So for now just don't vectorize anything that loads constants if we
already have lot of uniforms.

This is the final missing piece to make glamor work on R400.

shader-db R420:
total instructions in shared programs: 107288 -> 107290 (<.01%)
instructions in affected programs: 236 -> 238 (0.85%)
helped: 2
HURT: 3
total temps in shared programs: 17730 -> 17726 (-0.02%)
temps in affected programs: 41 -> 37 (-9.76%)
helped: 4
HURT: 0
total cycles in shared programs: 163251 -> 163251 (0.00%)
cycles in affected programs: 478 -> 478 (0.00%)
helped: 2
HURT: 3
GAINED: 7 (2 glamor and 5 GSK shaders)

RV370 is quite similar instruction/temp-wise, but we don't gain any
shader there, because they are all over the 64 instructions limit...

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10787
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29734>
2024-06-17 18:16:02 +00:00
Pavel Ondračka
5f68ba505b r300: missing whitespace in shader stats
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29734>
2024-06-17 18:16:02 +00:00
Amol Surati
4bf330471b nine: avoid using post-compacted indices with state expecting pre-compacted ones
The commit 973e6f3b implemented compaction of the stream-number space. The
functions `update_vertex_elements(_sw)` began using the post-compacted
stream-numbers/indices when maintaining the `stream_usage_mask` and
when reading from the arrays `vtxstride` and `stream_freq`.

But, the `stream_instancedata_mask`, with which the `stream_usage_mask`
is compared/bitwise-anded, maintains bits for the pre-compacted indices.
Additionally, the information within the arrays is stored using the
pre-compacted indices.

The functions have a disagreement, regarding the type (pre- vs post-
compacted) of indices, with the rest of the relevant source. This change
removes the disagreement by having them use pre-compacted indices when
maintaining the `stream_usage_mask` and when reading from the arrays.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11283
Fixes: 973e6f3b ("gallium: remove start_slot parameter from pipe_context::set_vertex_buffers")
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29704>
2024-06-17 17:53:43 +00:00
Eric Engestrom
4f1c56bf46 nvk+zink/ci: add flakes seen over the last few nightlies
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29748>
2024-06-17 11:18:05 +00:00
Eric Engestrom
2fe297e6d6 nvk+zink/ci: mark spec@ext_image_dma_buf_import@ext_image_dma_buf_import-refcount-multithread as fixed
Fixed by a commit in the 2498d673...39fdd2ae range, likely one of the
commits in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29591,
but it doesn't really matter, we're just happy it's fixed :P

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29748>
2024-06-17 11:18:05 +00:00
Alyssa Rosenzweig
38c36990b6 asahi: implement rba2 semantics for vbo
Different APIs have different robustness requirements for VBOs. Add a knob to
select the desired robustness so we can implement rba2 in honeykrisp.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742>
2024-06-16 12:15:22 -04:00
Alyssa Rosenzweig
4a71456a1a libagx: make index buffer fetch robust
for hk

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29742>
2024-06-16 12:15:22 -04:00
Dave Airlie
f7434d7576 nouveau/nvc0: increase overallocation on shader bo to 2K
I've been seeing a bunch of read page faults at the end of the
shader allocation, nvk uses a full page at the end to overallocate
so align with that and see if it goes away.

ahulliet and skeggsb both said 2k was used.

Cc: mesa-stable
Reviewed-by: Arthur Huillet <ahuillet@nvidia.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29722>
2024-06-15 01:12:39 +00:00
Mike Blumenkrantz
2bb35bf489 lavapipe: fix mesh+task binding with shader objects
if mesh and task shaders are bound separately, and if they have different
workgroup sizes, the setting of workgroup size will be broken if
set during shader bind

this must be deferred to draw time to pull the correct values

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29733>
2024-06-14 22:07:14 +00:00
Marek Olšák
3b4133acf8 radeonsi/ci: update gfx10.3 failures
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29705>
2024-06-14 19:54:28 +00:00
Marek Olšák
4e455c198f Revert "radeonsi: fix initialization of occlusion query buffers for disabled RBs"
This reverts commit dab4295cd5.

The commit causes hangs on Navi21 with 3 SEs.

Fixes: dab4295cd5 - radeonsi: fix initialization of occlusion query buffers for disabled RBs

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29705>
2024-06-14 19:54:28 +00:00
Alyssa Rosenzweig
ece3896d5b asahi: add broken bits of unstable Linux UAPI
Rebasing around this patch has been a significant burden for development.
Staging patches to asahi/mesa helps somewhat but 1. it's still really
frustrating to have this much divergence with upstream, and 2. ideally we
wouldn't have to do that.

The kernel upstreaming is stalled for various reasons.  This patch adds
compile-only code to speak the unstable Linux UAPI for the SOLE purpose of
reducing my rebase pain... NOT to actually work.

It is NOT for users OR distro maintainers. asahi will refuse to probe on
upstream Mesa to protect against regressions. The uapi is NOT STABLE and
upstream Mesa CANNOT be used with it. Attempting to bypass this WILL give you a
broken system.

This patch employs several layers of deterrents against system-breaking
enablement. With a lot of warning text at the relevant sites.  Hopefully that is
good enough to prevent people from breaking systems. And if people brazenly
ignore all of the above ... they get to pick up the pieces.

You have been warned.

---

There is significant prior art for Mesa including downstream kernel uapi
supports in-tree:

* powervr (downstream android driver)
* turnip (downstream kgsl android driver)
* asahi ... ironically (prop macOS kernel driver)
* maybe vc4?

Linux is only special because of distros shipping tagged Mesa releases. The
several layers of guards here guarantee that no tagged Mesa release would
possibly probe even on an asahi downstream kernel. A distro would need a
significant scary patch to make it probe. If/when it breaks, that's on them
and they pick up the pieces.

I make a stability guarantee ONLY for Fedora Asahi Remix -- where we push
packages for both a downstream kernel and Mesa in tandem, while we patiently
wait for upstreaming -- and that is *it*. It will be a nice future when this all
works upstream, but unfortunately we're not there yet.

Acked by Dave [1] and Sima [2]

[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29620#note_2444189
[2] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29620#note_2445155

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Co-developed-by: Asahi Lina <lina@asahilina.net>
Signed-off-by: Asahi Lina <lina@asahilina.net>
Co-developed-by: Sergio Lopez <slp@sinrega.org>
Signed-off-by: Sergio Lopez <slp@sinrega.org>
Co-developed-by: i509VCB <git@i509.me>
Signed-off-by: i509VCB <git@i509.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29620>
2024-06-14 15:44:30 +00:00
Alyssa Rosenzweig
08984e68fb gallium: remove ability to probe asahi
The asahi uapi is unstable. Do not attempt to probe on it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29620>
2024-06-14 15:44:30 +00:00
Karol Herbst
169dc86e74 gallium: properly type fields of pipe_resource.usage
This gets rid of most of the pointless bitfields and also moves away from
unsigned, which we really should stop using :)

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29720>
2024-06-14 13:56:34 +00:00
Karol Herbst
40785d9a52 gallium: properly type pipe_resource.usage with the enum
This allows for a more strongly typed field on the Rust side.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29720>
2024-06-14 13:56:34 +00:00
Karol Herbst
f58247882a gallium: reduce pipe_resource.usage to 4 bits
This works around a bindgen bug, but also moves the value into a single
byte as per the addition of compression_rate it spanned over two bytes.

Fixes: 5db7398672 ("gallium: add interface for fixed-rate surface/texture compression")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29720>
2024-06-14 13:56:34 +00:00
Pierre-Eric Pelloux-Prayer
c44b20e8d6 radeonsi/sqtt: add AMD_THREAD_TRACE_INSTRUCTION_TIMING
To control if instruction timing should be enabled (on by default).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25397>
2024-06-14 10:32:10 +02:00
Pierre-Eric Pelloux-Prayer
365fda834e radeonsi: use the common SQTT implementation
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25397>
2024-06-14 10:32:04 +02:00
David Rosca
39fdd2aec0 radeonsi: Make si_compute_clear_image work with 422 subsampled formats
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29598>
2024-06-14 03:19:24 +00:00
Qiang Yu
4a18809a56 radeonsi: add missing nir_intrinsic_bindless_image_descriptor_amd
Otherwise we get shader compilation error when imageSize().

Fixes: d4fdeaa820 ("radeonsi: replace llvm resource code with nir lower")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29690>
2024-06-14 02:52:52 +00:00
Heinrich Fink
222fbcbfd5 zink: remove workaround of FB modifiers forcing present state
Remove a legacy workaround where presence of modifiers in framebuffer
state results in `needs_present` to be set without a good reason.

This prevents hitting an assertion for framebuffers that use DRM
modifiers, e.g. via GBM BO alloc -> EGLImage import -> GL FBO bind.

Co-authored-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Heinrich Fink <hfink@snap.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29715>
2024-06-13 20:44:28 +02:00
Timothy Arceri
b26ef8f153 nir: correctly track current loop in nir_opt_loop()
We were not restoring an outer loop as the current loop after we had
finished processing a nested loop.

Fixes: 9995f336e6 ("nir: add merge loop terminators optimisation")

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29686>
2024-06-13 15:00:35 +00:00
Eric Engestrom
ea97397296 turnip+zink/ci: mark dEQP-GLES3.functional.fbo.depth.depth_test_clamp.* tests as fixed
Fixes: 96ed275a53 ("turnip: Implement VK_EXT_depth_clamp_zero_one")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29717>
2024-06-13 14:20:18 +00:00
Eric Engestrom
f1fdba2432 lavapipe/ci: document regression while it's being worked on
Regression caused by !28998

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29712>
2024-06-13 13:47:43 +00:00
Lionel Landwerlin
86813c60a4 mi-builder: add read/write memory fencing support on Gfx20+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29571>
2024-06-13 11:04:31 +00:00
Eric Engestrom
1ee158df14 lavapipe/ci: update trace checksum following nir change
The change looks reasonable to me:
https://mesa.pages.freedesktop.org/-/mesa/-/jobs/59729004/artifacts/results/summary/results/trace@vk-lvp@unigine@sanctuary-d3d9.trace-dxgi.html

And that commit was already updating another trace hash so let's just assume this is all expected.

Fixes: 9995f336e6 ("nir: add merge loop terminators optimisation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29710>
2024-06-13 10:01:51 +00:00
Louis-Francis Ratté-Boulianne
e34ce71792 mesa: implement EXT_texture_storage_compression extension
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109>
2024-06-12 21:20:06 +00:00
Louis-Francis Ratté-Boulianne
a6d099bcad st/dri2: add support for fixed-rate compression interface
Needed for EGL_EXT_surface_compression

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109>
2024-06-12 21:20:06 +00:00
Louis-Francis Ratté-Boulianne
5db7398672 gallium: add interface for fixed-rate surface/texture compression
Add methods needed to implement EGL_EXT_surface_compression and
GL_EXT_texture_storage_compression.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27109>
2024-06-12 21:20:06 +00:00
Christian Gmeiner
59218cdf07 gallium: Add vkms entrypoint
Makes it possible to use Virtual Kernel Mode-Setting (VKMS) in combination
with a render-only GPU. Is quite helpful to test the GPU when no kms driver
is ready.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29042>
2024-06-12 17:35:26 +00:00
Sil Vilerino
eee0b9b0e8 d3d12: Add missing case for CQP in d3d12_video_encoder_disable_rc_qualitylevels
Fixes: 58ca4cee9e ("d3d12: Video Encode - Fix inputs for older OS support query cap")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29697>
2024-06-12 15:45:36 +00:00
Dave Airlie
fd9f114d5a draw/texture: handle mip_offset[0] being != 0 for layered textures.
When llvmpipe adds on a layer it uses mip_offset[0] for it, so it
should still be respected even for multisample.

Fixes KHR-GL45.texture_view.view_sampling

Fixes: 839045bcc8 ("gallivm/lp: merge sample info into normal info")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29685>
2024-06-12 16:13:59 +10:00
David Heidelberg
f467a89523 rusticl: add -cl-std only when it's not defined
This fixes piglit "Invalid CL Version Declaration" test.

Fixes: fc30fe2c11 ("rusticl/kernel: add missing preprocessor definitions")

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29638>
2024-06-11 12:41:39 -07:00
Leo Liu
3260d6c877 radeon/vcn: enable dpb to use pipe video buffer with swizzle mode
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541>
2024-06-11 12:29:11 -04:00
Leo Liu
bc696783bb radeon/vcn: use pipe video buffers for dpb
gfx12 surface info can be used to fill up the dpb message buffer

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541>
2024-06-11 12:29:11 -04:00
Patrick Lerda
301a3bacce radeonsi: fix assert triggered on gfx6 after the tessellation update
This change updates the affected calls to the proper function
which is radeon_set_config_reg().

For instance, this issue is triggered with
"piglit/bin/textureSize tes isampler2DMSArray -auto -fbo":
vertex-program-two-side: ../src/gallium/drivers/radeonsi/si_state_shaders.cpp:4981: void si_emit_spi_ge_ring_state(si_context*, unsigned int): Assertion `(0x008988) >= CIK_UCONFIG_REG_OFFSET && (0x008988) < CIK_UCONFIG_REG_END' failed.

Fixes: bd71d62b8f ("radeonsi: program tessellation rings right before draws")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29645>
2024-06-11 14:01:21 +00:00