Commit graph

47667 commits

Author SHA1 Message Date
Kenneth Graunke
4a42bd3931 i965: Split brw_wm_surfaces state into renderbuffer and texture atoms.
First, the texturing setup code is relevant for all pipeline stages,
while renderbuffer surfaces are only used by the WM.

Secondly, renderbuffer and texture setup depends on a different set of
dirty bits.  There's no reason to walk the array of textures when
changing draw buffers, or vice-versa.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2011-11-10 22:51:19 -08:00
Kenneth Graunke
a7d0fa209b i965: Combine the two WM pull constant tracked state atoms.
These were only split for historical reasons: brw_wm_constants used to
be the "prepare" step, while brw_wm_constant_surface was "emit".  Now
that both happen at emit time, it makes sense to combine them.

Call the newly combined state atom "brw_wm_pull_constants" to indicate
help distinguish it from the Gen6+ atoms that handle push constants.

Finally, remove the BRW_NEW_WM_CONSTBUF dirty bit entirely now that it's
never flagged nor used.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2011-11-10 22:51:19 -08:00
Kenneth Graunke
f3e9ccb3bc i965: Rename gen6_*_constants tracked state atoms to "push_constants".
When reading the "brw_wm_constants" and "gen6_wm_constants" atoms
side-by-side, I initially failed to notice the crucial difference:
the Gen6 atoms are for Push Constants, while brw_wm_constants handles
Pull Constants.  (Gen4/5 Push Constants are handled by "brw_curbe.")

Renaming these should clarify the code and save me from constant
confusion over the fact that "gen6_wm_constants" isn't just a newer
version of "brw_wm_constants."

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2011-11-10 22:51:19 -08:00
Kenneth Graunke
e4b1c9b4be i965: Remove nr_surfaces computation from brw_update_wm_surfaces.
This code is fairly fragile, as it depends on the ordering of the
entries in the binding table, which will change soon.

Also, stop listening on the BRW_NEW_WM_CONSTBUF dirty bit as it's no
longer required.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2011-11-10 22:51:19 -08:00
Kenneth Graunke
6ba9090ea0 i965: Use 0 for the number of binding table entries in 3DSTATE_(VS|WM).
These fields control how many entries the hardware prefetches into the
state cache, so they only impact performance, not correctness.  However,
it's not clear how to use this in a way that's beneficial.

According to the documentation, kernels "using a large number" of
entries may wish to program this to zero to avoid thrashing the cache;
it's unclear how many is too many.  Also, Ironlake's WM was missing this
feature entirely---the count had to be zero.

The dirty bit tracking to handle this complicates the surface state
and binding table setup; removing it should simplify things and make
future refactoring easier.  So just set 0 for the number of entries
rather than trying to compute and track it.

Appears to have no impact on Nexuiz and OpenArena on Sandybridge.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2011-11-10 22:51:19 -08:00
Kenneth Graunke
0983c6869b i965: Remove outdated comment about CACHE_NEW_SURF_BIND dirty bit.
The comment states that brw_update_vs_constant_surface produces a
CACHE_NEW_SURF_BIND dirty bit, but it doesn't.   In fact, that bit
no longer even exists.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2011-11-10 22:51:19 -08:00
Kenneth Graunke
d1d86dc55c i965: Remove BRW_NEW_NR_VS_SURFACES dirty bit from brw_vs_surfaces.
brw_vs_surfaces _produces_ the BRW_NEW_NR_VS_SURFACES dirty bit, so it
makes no sense for it to subscribe to it.

Fixes an assertion failure in many piglit tests when INTEL_DEBUG is set:
  brw_state_upload.c:484: void brw_upload_state(struct brw_context *):
  Assertion `!check_state(&examined, &generated)' failed.

One such piglit test is vs-uniform-array-mat2-col-rd.shader_test.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2011-11-10 22:51:19 -08:00
Kenneth Graunke
7c057f2360 i965: Add missing CACHE_NEW_WM_PROG dirty bit to WM pull constants.
Comparing brw_upload_vs_pull_constants and brw_upload_wm_pull_constants,
it became evident that something was amiss: the VS code had both
CACHE_NEW_VS_PROG and BRW_NEW_VERTEX_PROGRAM, while the WM code was
missing the CACHE_NEW_WM_PROG flag.

Not observed to fix anything, but likely necessary.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2011-11-10 22:51:18 -08:00
Kenneth Graunke
c3e3903a90 i965: Use new vtable entries for surface state updating functions.
Now that we have vtable entries in place, we should use them.  This
allows us to drop the cut and pasted Gen7 brw_tracked_state atoms as
they now do exactly the same thing as their brw_wm_surface_state
counterparts.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-11-10 22:51:18 -08:00
Kenneth Graunke
5d448b42b7 i965: Add new vtable entries for surface state updating functions.
Gen7+ SURFACE_STATE is different from Gen4-6, so we need separate
per-generation functions for creating and updating it.  However, the
usage is the same, and callers just want to utilize the appropriate
functions with minimal pain.  So, put them in the vtable.

Since these take a brw_context pointer and are only used on Gen4, just
add a forward declaration.  This is the simplest (if not cleanest)
solution.  It would be nicer to have a i965-specific vtable, but that's
a refactor for another day.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-11-10 22:51:18 -08:00
Marek Olšák
b8428e6335 r600g: don't set the query result to 0 after a call to get_query_result
get_query_result doesn't reset the result. Only begin_query does.
2011-11-11 00:08:01 +01:00
Marek Olšák
72c1658554 r600g: the type of OCCLUSION_PREDICATE result should be boolean 2011-11-11 00:03:52 +01:00
Brian Paul
3800fe800b mesa: silence uninitialized var warning 2011-11-10 16:00:46 -07:00
Brian Paul
3da5196263 radeon: silence initializer warnings 2011-11-10 16:00:46 -07:00
Brian Paul
1462114475 draw/llvm: silence uninitialized variable warnings 2011-11-10 16:00:46 -07:00
Brian Paul
fe5ba5da7e radeon: silence unused var warnings 2011-11-10 16:00:46 -07:00
Brian Paul
2e15f0c860 egl: silence unused var warning 2011-11-10 16:00:46 -07:00
Wayne E. Robertz
beef101eb3 mklib: fix static lib building by filtering out -L, -l options
Signed-off-by: Brian Paul <brianp@vmware.com>
2011-11-10 16:00:46 -07:00
Marek Olšák
b999be8374 r600g: implement PIPE_QUERY_OCCLUSION_PREDICATE 2011-11-10 23:11:57 +01:00
Marek Olšák
083482d493 r300g: fix query result of GPU_FINISHED 2011-11-10 22:58:34 +01:00
Marek Olšák
c5ae81652d r300g: implement PIPE_QUERY_GPU_FINISHED 2011-11-10 22:53:54 +01:00
Marek Olšák
014b3aa07d r300g: implement PIPE_QUERY_OCCLUSION_PREDICATE 2011-11-10 22:53:54 +01:00
Dave Airlie
4fd485666a llvmpipe/u_format: add support for EXT_texture_shared_exponent + EXT_packed_float
These two are fairly unique types so add specific cases for decoding them.

Passes piglit fbo-clear-format and fbo-generatemipmap-format tests for these
two extensions.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-10 20:37:55 +00:00
Dave Airlie
ab14915dce llvmpipe: add NV_conditional_render support.
This ports the softpipe NV_conditional_render support to llvmpipe.

This passes the nv_conditional_render-* piglit tests.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-10 20:32:13 +00:00
Marek Olšák
dbd24b5df6 r600g: remove useless texture barrier 2011-11-10 18:49:26 +01:00
Marek Olšák
ec3d2c7f08 r600g: flush the whole context when CS is full, not just hw_context
Because we disable render condition in r600_flush, but not in r600_context_flush.
2011-11-10 18:48:23 +01:00
Marek Olšák
6a490149d9 r600g: turn some CS overflow checks into assertions
They're not really exhaustive and not so useful either.
2011-11-10 18:09:10 +01:00
Marek Olšák
5222e16e2b r600g: put the rest of CS overflow checks in r600_need_cs_space 2011-11-10 18:09:10 +01:00
Marek Olšák
30a570e450 r600g: flush caches regardless of render condition
What if somebody enables render condition just before we flush...
2011-11-10 18:09:10 +01:00
Marek Olšák
578b211be6 r600g: disable render condition at the end of CS, re-enable at the beginning 2011-11-10 18:09:10 +01:00
Marek Olšák
9564185b0a r600g: don't suspend queries if they have already been suspended by blitter
And add some assertions.
2011-11-10 18:09:10 +01:00
Marek Olšák
cb7c6c30d0 r600g: properly reserve CS space for queries_suspend 2011-11-10 18:09:10 +01:00
Marek Olšák
1d09831253 r600g: reserve CS space for a draw command in begin_query and render_condition
There's no point in emitting those if you can't emit a draw command too.
2011-11-10 18:09:10 +01:00
Marek Olšák
11bdd28796 r600g: consolidate checking whether CS is full
This adds a new function r600_need_cs_space. Currently, it's easy to overflow
the CS - queries are not counted in. I guess that's not the only case where
the driver may crap out.
2011-11-10 18:09:09 +01:00
Dave Airlie
216be4120d radeon: fix tex1d-border2d
Fixes pigit test with T wrap usage.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-10 15:49:40 +00:00
Dave Airlie
c8fb700f2b radeon: fix 3-coordinate swtcl emission
This fixes mipmap generation on swtcl rv100.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-11-10 15:49:40 +00:00
Eric Anholt
11a90af1ef swrast: Add support for glReadPixels() to integer types.
With this change, i965 passes
GL_EXT_texture_integer/fbo_integer_precision_clear

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-11-09 12:59:20 -08:00
Eric Anholt
e34c9edcda mesa: Add support for unpacking 32-bit integer formats to int spans.
This is the inverse operation to _mesa_pack_rgba_span_int.  The 16-bit
code isn't done because of lack of testing and not being sure how sign
extension/clamping should be handled between, say, 16-bit int and
32-bit int or uint.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-11-09 12:59:20 -08:00
Eric Anholt
84277cb7d3 meta: Add support for glClear() to integer color buffers.
This requires using a new fragment shader to get the integer color
output, and a new vertex shader because #version has to match between
the two.

v2: Clarify that there's no need for BindFragDataLocation.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
2011-11-09 12:59:20 -08:00
Eric Anholt
42c5552b0e i965: Claim to support rendering to integer FBOs.
We're missing support for the software paths still, but basic
rendering is working.

v2: Override RGB_INT32/UINT32 to not be renderable, since the hardware
    can't do it but we do allow texturing from it now.  Drop the
    DataType override, since the _mesa_problem() isn't in that path
    any more.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
2011-11-09 12:59:20 -08:00
Eric Anholt
6d874d0ee1 i965/fs: Add support for user-defined out variables.
Before, I was tracking the ir_variable * found for gl_FragColor or
gl_FragData[].  Instead, when visiting those variables, set up an
array of per-render-target fs_regs to copy the output data from.  This
cleans up the color emit path, while making handling of multiple
user-defined out variables easier.

v2: incorporate idr's feedback about ir->location (changes by Kenneth Graunke)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-11-09 12:59:20 -08:00
Eric Anholt
e988d816e1 i965/fs: Preserve the source register type when doing color writes.
When rendering to integer color buffers, we need to be careful to use
MRFs of the correct type when emitting color writes.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-11-09 12:59:20 -08:00
Eric Anholt
e19dfc75b6 i965: Make brw_type_for_base_type return the element type for arrays.
Previously, brw_type_for_base_type returned UD for array variables,
similar to structures.  For structures, each field may have a different
type, so every field access must explicitly override the register's type
with that field's type.  We chose to return UD in this case since it was
the least common, so errors would be more obvious.

For arrays, it makes far more sense to return the type corresponding to
an element of the array.  This allows normal array access to work
without the hassle of explicitly overriding the register's type.

This should obsolete a bunch of type overrides throughout the code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-11-09 12:59:19 -08:00
Eric Anholt
a00c5a71cd i965: Enable ChooseTexFormat for supported GL_EXT_texture_integer formats.
v2: s/GL_TRUE/true/, and re-enable RGB_INT32 based on discussion
    yesterday about required RB formats vs texture formats.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
2011-11-09 12:59:19 -08:00
Eric Anholt
35be4ae77e i965: Add mapping from MESA_FORMAT to BRW_SURFACEFORMAT for integer.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-11-09 12:59:09 -08:00
Eric Anholt
704b7551e8 intel: Expose GL_EXT_texture_integer when GL 3.0 override is set.
This will let the feature be incrementally developed, hidden behind
the flag we're all using as we work on GL 3.0 support.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-11-09 12:38:58 -08:00
Eric Anholt
6e610a0485 docs: Note EXT_texture_array on i965.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-11-09 12:38:30 -08:00
Eric Anholt
e56aecf249 i965: Add support for 16-bit unorm L, A, and I textures.
While not required by any particular spec version, mplayer was asking
for L16 and hoping for actual L16 without checking.  The 8 bits
allocated led to 10-bit planar video data stored in the lower 10 bits
giving only 2 bits of precision in video.  While it was an amusing
effect, give them what they actually wanted instead.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41461

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-11-09 12:04:39 -08:00
Eric Anholt
b5444a6ebd intel: Don't _mesa_problem when asked for an RB of a texturing-only type.
We want to be able to support some formats for texturing that we can't
render to, which means that some choices for RenderbufferStorage end
up being incomplete (for example, L8 currently).  For these, where we
don't render to them, we don't want to have to make up an rb->DataType
that's only used for GetRow()/PutRow().
2011-11-09 12:04:39 -08:00
Paul Berry
01ccddbed6 r200: remove dangling radeon.h symlink.
Commit 1401b96b (radeon: cleanup radeon shared code after r300 and
r600 classic drivers removal) removed the file
src/mesa/drivers/dri/radeon/server/radeon.h, but it left behind the
symlink which was used to share that file into the
src/mesa/drivers/dri/r200/server directory.

This patch removes the dangling symlink.

Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
2011-11-09 11:26:27 -08:00