Commit graph

4814 commits

Author SHA1 Message Date
Bas Nieuwenhuizen
18e70edd8c radv: Only call remove_dead_variables once.
Port of 43e0b0d4b2
"anv/pipeline: Only call remove_dead_variables once"

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2017-01-12 21:39:41 +01:00
Emil Velikov
d1dc22eb46 ac: automake: rework sid_tables.h generation
Drop $(srcdir)/ prefix analogous to before the file (and rule) movement
and move it outside of the NEED_RADEON_LLVM conditional.

Otherwise the build may fail as below.

make[3]: *** No rule to make target 'common/sid_tables.h', needed by 'distdir'.  Stop.

Fixes: b838f64237 "ac/debug: Move sid_tables.h generation to common
code."
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-01-12 19:29:28 +00:00
Chad Versace
c085bfcec9 vulkan: Add new cast macros for VkIcd types
We can't import the latest vk_icd.h because the new header breaks the
Mesa build. This patch defines new casting macros,
ICD_DEFINE_NONDISP_HANDLE_CASTS() and ICD_FROM_HANDLE(), which can
handle both the old and new vk_icd.h, and will prevent the build from
breaking when we update the header.

In the old vk_icd.h, types were defined as:

  typedef struct _VkIcdFoo {
    ...
  } VkIcdFoo;

Commit 6ebba1f6 in the Vulkan loader changed the above to

  typedef {
    ...
  } VkIcdFoo;

because the old definitions violated the C and C++ specs. According to
the specs, identifiers that begins with an underscore followed by an
uppercase letter are reserved. (It's pedantic, I know), See the Github
issue referenced below.

References: https://github.com/KhronosGroup/Vulkan-LoaderAndValidationLayers/issues/7
References: 6ebba1f630
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: mesa-stable@lists.freedesktop.org
2017-01-12 09:42:32 -08:00
Dave Airlie
e9d3cbca31 radv: fix multi-viewport emission
This set context req seq was in the wrong place.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-01-11 09:08:51 +01:00
Dave Airlie
ada66480b2 radv/ac: add support for multi sample image coords
This just adds the nir->llvm support, enabling
the extension causes some failures on llvm 3.9 at least,
but this code seems fine.

NIR passes the sampler in src[1].x, and we LLVM/SI requires
it as the last parameters in the coords (coord[2] for 2D,
coord[3] for 2DArray).

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-01-10 12:59:31 +10:00
Bas Nieuwenhuizen
8bc39e251b radv: Create single RADV_DEBUG env var.
Also changed RADV_SHOW_QUEUES to a no compute queue option. That
would make more sense later when the compute queue is established,
but the transfer queue still experimental.

v2: Don't include the trace flag.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-01-09 21:44:14 +01:00
Bas Nieuwenhuizen
8cb60c7dd3 ac/debug: Dump indirect buffers.
This is for handling chained command buffers and secondary command
buffers. It doesn't handle the trace id for secondary command buffers
yet, but I don't think that is possible in general with just writes,
as we could call a secondary command buffer multiple times.

I think this is good enough for now, as the most useful case is the
chaining when we grow an IB.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-01-09 21:44:08 +01:00
Bas Nieuwenhuizen
97dfff5410 radv: Dump command buffer on hang.
v2:
  - Now use the filename specified by RADV_TRACE_FILE env var.
  - Use the same var to enable tracing.

I thought we could as well always set the filename explicitly
instead of having some arbitrary defaults, and at that point
we don't need a separate feature enable.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-01-09 21:44:03 +01:00
Bas Nieuwenhuizen
0ef1b4d5b1 ac/debug: Move IB decode to common code.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-01-09 21:43:59 +01:00
Bas Nieuwenhuizen
b838f64237 ac/debug: Move sid_tables.h generation to common code.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-01-09 21:43:54 +01:00
Samuel Iglesias Gonsálvez
cc4ff6c2a0 spirv: add support for doubles to OpSpecConstant
v2 (Jason):
- Fix indent in radv change
- Add vtn_u64_literal() helper to take 64 bits (Jason)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-09 09:10:13 +01:00
Dave Airlie
41969f0d06 radv: drop unused fields in physical device.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-01-09 16:48:14 +10:00
Pierre-Loup A. Griffais
f6d3af2af6 radv: fix depth transitions with layerCount = VK_REMAINING_ARRAY_LAYERS
Interpreting layerCount literally would try to create billions of image
views in radv_process_depth_image_inplace().

Signed-off-by: Pierre-Loup A. Griffais <pgriffais@valvesoftware.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-01-07 01:26:08 +01:00
Marek Olšák
29d6a367a6 radeonsi: do all math in bytes in SI DMA code
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-05 18:43:24 +01:00
Ilia Mirkin
1f13cb8b15 anv,radv: disable StorageImageWriteWithoutFormat for now
The SPIR-V capability isn't even marked as enabled, and there are no
tests in Vulkan-CTS. Per Jason Ekstrand, this won't work in anv as such
write-only surfaces require additional setup which is currently not
performed.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-12-31 16:38:00 -05:00
Ilia Mirkin
36c648b894 spirv: always expose SpvCapabilityStorageImageExtendedFormats
I forgot to do this in commit 76b97d544e ("anv: enable storage image
extended formats"). Since both drivers support this now, no need for the
conditional enable.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-29 22:09:58 -05:00
Dave Airlie
80bafc0c11 radv: only allow cmask/dcc in color optimal.
I had this on transfers due to the clear color cmd, but
it seems like that path shouldn't get fast clears.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-30 00:04:16 +00:00
Dave Airlie
1814df7ea7 radv: only allow cmask/dcc on exclusive or concurrent with graphics queue.
Otherwise we don't get the barriers to flush dcc etc.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-30 00:04:01 +00:00
Dave Airlie
44f833ab18 radv: denote support for extended storage image formats.
I'm sure anv has support for these as well, but this is just
a first use of the interface to allow different supported spir-v
features.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-28 22:44:40 +00:00
Dave Airlie
d8423772ca radv: add some asserts for operations on general queue
These might be useful in the future, or not.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-27 03:27:14 +00:00
Bas Nieuwenhuizen
059af2515a radv: Also skip DCC clear flushes for compute.
(airlied: fixes DOOM hang with compute queue enabled)
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
2016-12-27 03:27:13 +00:00
Dave Airlie
3fd306b423 radv: handle queue present directly to winsys
Don't call the QueueSubmit interface, just call direct to the
winsys, so we can pass the wait semaphores.

Noticed while debugging doom, doesn't fix anything.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-26 22:20:35 +00:00
Dave Airlie
b5bb8b54cf radv: fix rendering to b10g11r11_ufloat_pack32
doom was causing a printf about an illegal color, it was due the
non-void returning -1, and the other function checking for 4,
align these.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-26 10:31:20 +10:00
Dave Airlie
4813c9ade7 radv: handle multi-component shared load/stores.
This was seen in doom shaders, so handle it properly.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave AIrlie <airlied@redhat.com>
2016-12-26 10:31:20 +10:00
Damien Grassart
3a30b1a556 radv: return count of queue families written
The Vulkan spec indicates that
vkGetPhysicalDeviceQueueFamilyProperties() should overwrite
pQueueFamilyPropertyCount with the number of structures actually
written to pQueueFamilyProperties.

Signed-off-by: Damien Grassart <damien@grassart.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-12-25 02:25:02 +01:00
Dave Airlie
e7279f16a0 radv: set some proper values for interp offset limits.
These are taken from the amdgpu-pro driver, and cause no
CTS change.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-23 14:36:54 +10:00
Dave Airlie
14737bcdd5 radv: bump texel offsets to align with radeonsi
it appears from the amdgpu-pro results the hw can do more,
but let's just align with radeonsi for now.

No CTS regressions.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-23 14:36:50 +10:00
Fredrik Höglund
27a8aab882 radv: fix dual source blending
Add the index to the location when assigning driver locations for
output variables.

Otherwise two fragment shader outputs declared as:

   layout (location = 0, index = 0) out vec4 output1;
   layout (location = 0, index = 1) out vec4 output2;

will end up aliasing one another.

Note that this patch will make the second output variable in the above
example alias a possible third output variable with location = 1 and
index = 0. But this shouldn't be a problem in practice since only one
color attachment is supported when dual-source blending is used.

Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-12-22 02:07:17 +01:00
Dave Airlie
877202b6dc radv: enable shaderStorageImageExtendedFormats
This passes all the CTS tests that get enabled for this.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-22 10:29:15 +10:00
Dave Airlie
a3ca2a9b7b radv: enable shaderGatherImageExtended
Thanks to Ilia's patch this works fine on radv.

No regressions in CTS, all enabled tests pass.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-22 09:48:18 +10:00
Dave Airlie
56020c7a7c radv/image: only touch queue family info for concurrent images.
The spec says to ignore these fields for exclusive images.

Fixes crashes in:
dEQP-VK.clipping.*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-21 23:33:04 +00:00
Dave Airlie
9d23b8a18e radv: flush smem for uniform buffer bit.
(cc'ing stable as I'd like to backport the ubo speedup as well)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-21 22:31:14 +00:00
Junwei Zhang
018ead4266 radeonsi: add Polaris12 support (v3)
v2: use gfxip names for llvm 4.0+
v3: use tonga for llvm <= 3.8, drop gfxip name,
we can just change that we change the other asics.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2016-12-21 15:10:03 -05:00
Bas Nieuwenhuizen
1d529cba02 radv: Use correct workgroup size limits.
Not sure where the 16k comes from, but pretty sure 2k is the max.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-18 22:18:14 +01:00
Dave Airlie
6229994ab7 radv: expose the compute queue
v2: Don't expose the SDMA queue and use the CIK check also in the
    second if. (Bas)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-12-18 20:52:55 +01:00
Bas Nieuwenhuizen
442735d35d radv: Only emit PFP ME syncs for DMA on the GFX queue.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-18 20:52:51 +01:00
Bas Nieuwenhuizen
f2523ebf52 radv: Create an empty CS per ring type.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-18 20:52:47 +01:00
Bas Nieuwenhuizen
accc5fc026 radv: Don't enable CMASK on compute queues.
We can't fast clear on compute queues.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-18 20:52:41 +01:00
Bas Nieuwenhuizen
bfee9866ea radv: Use RELEASE_MEM packet for MEC timestamp query.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-18 20:52:37 +01:00
Bas Nieuwenhuizen
9b0efc98ba radv: Implement indirect dispatch for the MEC.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-18 20:52:33 +01:00
Bas Nieuwenhuizen
3a559029e2 radv: update vkCmdUpdateBuffer for the MEC.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-18 20:52:29 +01:00
Bas Nieuwenhuizen
b3499557a2 radv: Implement cache flushing for the MEC.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-18 20:52:26 +01:00
Dave Airlie
72aaa83f4b radv: add semaphore support
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-12-18 20:52:26 +01:00
Dave Airlie
d270b5fac3 radv: pass queue index into winsys submission
This is so we can submit on separate queues if needed

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-12-18 20:52:26 +01:00
Dave Airlie
d0e6fb0574 radv: init compute queue and avoid initing transfer queues
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-12-18 20:52:26 +01:00
Bas Nieuwenhuizen
71dabe1c16 radv/winsys: Make WaitIdle queue aware.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-12-18 20:52:20 +01:00
Dave Airlie
d028bd7b55 radv/meta: update header info
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-12-18 20:52:20 +01:00
Dave Airlie
4bd666a319 radv: hook compute clears into clear image api.
These aren't used yet but we will want to use them when we
implement a separate compute queue.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-12-18 20:52:20 +01:00
Dave Airlie
f11ea8779d radv: clear image implementation for compute queue
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-12-18 20:52:20 +01:00
Dave Airlie
9839ce282b radv/meta: split clear image out into a separate layer clear function
This will make it easier to add support for clears on compute queues.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2016-12-18 20:52:20 +01:00