Commit graph

22 commits

Author SHA1 Message Date
Emil Velikov
44978a91ff genxml: ship all the files needed in the tarball
v2: The xml files are not called "gen*_pack.xml" (Jason)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-01 08:38:03 +01:00
Emil Velikov
3f23a0f8c1 anv: remove description about GENX_FUNC macro
The macro has been gone since commit 1f1cf6fcb0 "anv: Get rid of
GENX_FUNC"

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-01 08:37:25 +01:00
Jonathan Gray
147a2d25ad genxml: use PYTHON3
Allows the build to work when the python3 binary is not "python3".

v2: remove x bit from the script at Emil's suggestion

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-04-23 16:45:05 -07:00
Jason Ekstrand
1275c7c744 genxml: Fix the name of a 3DSTATE_SF/SBE field on gen6-7.5 2016-04-09 17:02:21 -07:00
Jason Ekstrand
aa6f9a4e1e genxml: Break output detail of 3DSTATE_SF on gen7 into a struct
This makes it work like 3DSTATE_SBE[_SWIZ] on gen7+
2016-04-09 17:00:22 -07:00
Jason Ekstrand
ddae342618 genxml: Fix up MOCS in RENDER_SURFACE_STATE on gen6 to match gen7 2016-04-09 16:59:04 -07:00
Kristian Høgsberg Kristensen
068935844c genxml: Add GEN6 genxml
Not used yet, but let's put it here for now.
2016-04-06 21:08:34 -07:00
Jordan Justen
7a03fb9ccb genxml: Add L3 Cache Control register definitions
Based on intel_reg.h (5912da45a6)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-24 23:49:53 -07:00
Jordan Justen
b332013a56 genxml: Add register support
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-24 23:46:59 -07:00
Jason Ekstrand
8c819b8c2b genxml/gen75: Add the clear color bits to RENDER_SURFACE_STATE 2016-03-10 10:41:52 -08:00
Jason Ekstrand
e941fd8470 genxml: Make the border color pointer consistent across gens 2016-03-01 14:43:05 -08:00
Jason Ekstrand
3f8df795c1 genxml: Break output detail of 3DSTATE_SBE on gen7 into a struct
This makes it work like 3DSTATE_SBE_SWIZ on gen8+ which is much more
convenient.
2016-02-29 16:47:42 -08:00
Jason Ekstrand
82d2db80bb genxml: Add MOCS fields to RENDER_SURFACE_STATE
This allows us to set MOCS as a single uint32_t on all platforms.
2016-02-27 10:26:13 -08:00
Jason Ekstrand
452782f68b gen/genX_pack: Add genxml to the pack header path
If you have an out-of-tree build, gen8_pack.h and friends will not be in
the same folder as genX_pack.h so this will be a problem.  We fixed
out-of-tree earlier by adding the genxml folder to the includes for the
vulkan driver.  However, this is not a good long-term solution because we
want to use it in ISL as well.
2016-02-27 10:26:13 -08:00
Jason Ekstrand
64e1c84059 intel/genxml: Update macro documentation 2016-02-22 21:20:04 -08:00
Kristian Høgsberg Kristensen
f843aabdd4 intel/genxml: Add README
I've had people ask about the design of the pack functions, for example,
why aren't we using bitfields. I wrote up a bit of background on why and
how we ended up with the current design and we might as well keep that
with the code.
2016-02-22 09:14:25 -08:00
Jason Ekstrand
853fc3e431 genxml: Add mote includes in the generated headers 2016-02-20 09:33:20 -08:00
Jason Ekstrand
1f1cf6fcb0 anv: Get rid of GENX_FUNC
It was a bad idea.
2016-02-20 09:12:38 -08:00
Jason Ekstrand
0d76aa9485 intel/genxml: Add a couple of helper headers 2016-02-20 08:35:36 -08:00
Jason Ekstrand
2b85807458 genxml: Stop using unicode in the pack generator
This causes python problems and problems when people don't have a locale
set properly in their shell.
2016-02-19 08:05:35 -08:00
Dave Airlie
1375cb3c27 anv: fix warning about unused width variable.
We don't use width outside the debug clause here.
2016-02-19 08:01:54 -08:00
Jason Ekstrand
f6d9587688 vulkan: Move XML and generator into src/intel/genxml 2016-02-18 10:30:29 -08:00