This requirement is for ARB_texture_buffer_object_rgb32, which obviously
needs the UNIFORM_TEXEL_BUFFER bit, not SAMPLED_IMAGE.
Fixes: c3d7de47cd ("docs/zink: add GL 4.0 requirements")
Fixes: 6b38907b7f ("zink: fix feature requirement")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17024>
debian/i386 needs cross compile of `DirectX-Headers`, so just enable spirv-to-dxil on debian/x64
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16671>
Fixes following errors:
../src/microsoft/spirv_to_dxil/dxil_spirv_nir.c
In file included from ../src/compiler/nir/nir_builder.h:365,
from ../src/microsoft/compiler/dxil_nir.h:29,
from ../src/microsoft/spirv_to_dxil/dxil_spirv_nir.c:28:
../src/microsoft/spirv_to_dxil/dxil_spirv_nir.c: In function 'dxil_spirv_nir_passes':
src/compiler/nir/nir_builder_opcodes.h:1321:11: error: 'dyn_yz_flip_mask' may be used uninitialized in this function [-Werror=maybe-uninitialized]
1321 | return nir_build_alu2(build, nir_op_iand, src0, src1);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../src/microsoft/spirv_to_dxil/dxil_spirv_nir.c:290:59: note: 'dyn_yz_flip_mask' was declared here
290 | nir_ssa_def *y_flip_mask = NULL, *z_flip_mask = NULL, *dyn_yz_flip_mask;
| ^~~~~~~~~~~~~~~~
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16671>
Add STATIC_ASSERT to guard `dxil_spirv_shader_stage` and `gl_shader_stage`
to be same for each enum value.
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16671>
This context needs to be locked before usage, and flushed after.
If it's forgotten, radeonsi may crash (eg #6666).
To avoid this kind of error, introduce 2 helpers.
cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17032>
If this environment variable is set, then a detected compute engine
will be used as described in docs/envvars.rst.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
This is now needed following Ken's 8831cb38aa.
Ref: 8831cb38aa ("anv: Stop updating STATE_BASE_ADDRESS on XeHP")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
zink-anv-tgl wasn't using Zink at all because this variable was missing
and then not passed to the runners...
This introduces a list of failures for Zink/Anv and also few tests
are skipped because they take too long (> 60s).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17031>
piglit select tests fail, so add a gallium cap to disable
for crocus explicitly.
crocus may choose to enable hardware select only for GPU
SKU which tested to be OK again.
Fixes: 6489af145c ("mesa: enable HardwareAcceleratedSelect")
Closes: #6644
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16955>
This set of changes:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15649
caused a regression in Xorg when using swrast_kms:
(EE) AIGLX error: Calling driver entry point failed
This commit changes the swrast_kms driver to use a dedicated screen init function
(which I believe was overlooked); I also took the opportunity to rename the
associated plumbling to have swrast-specific names.
Signed-off-by: Alexander Kanavin <alex@linutronix.de>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16942>
.wideLines = false, which forbids the user to set the line width
to something different than 1. We're thus safe to claim support
for dynamic line width and do nothing in CmdSetLineWidth() other
than checking the value passed is 1.0f.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16971>
Now that we have support for pipeline variants, we can take the dynamic
depth testing parameters into account and create a new pipeline state
using those dynamic parameters.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16971>
We were completely ignoring the primitive-restart case in the
index-rewrite logic used to emulate triangle fans. Unfortunately, this
case is way more complicated than a regular index rewrite:
- we need to skip all primitive-restart entries when turning the triangle
fan into a triangle list, which implies serializing the index buffer
rewrite procedure (at least I didn't find any clever way to parallelize
things)
- the number of triangles can no longer be extrapolated from the number
of indices in the original index buffer, thus forcing us to lower
direct indexed draws into indirect draws and patching the indexCount
value when the new index buffer is forged
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16971>
We can't hardcode the strip cut value to 0xffffffff, otherwise we break
support for 16-bit index buffers. Let's use the pipeline variant
infrastructure to deal with that case.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16971>
