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dzn: Support dynamic depth testing parameters properly
Now that we have support for pipeline variants, we can take the dynamic depth testing parameters into account and create a new pipeline state using those dynamic parameters. Reviewed-by: Jesse Natalie <jenatali@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16971>
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4 changed files with 115 additions and 11 deletions
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@ -4462,7 +4462,12 @@ dzn_CmdSetDepthBias(VkCommandBuffer commandBuffer,
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float depthBiasClamp,
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float depthBiasSlopeFactor)
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{
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dzn_stub();
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VK_FROM_HANDLE(dzn_cmd_buffer, cmdbuf, commandBuffer);
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cmdbuf->state.pipeline_variant.depth_bias.constant_factor = depthBiasConstantFactor;
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cmdbuf->state.pipeline_variant.depth_bias.clamp = depthBiasClamp;
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cmdbuf->state.pipeline_variant.depth_bias.slope_factor = depthBiasSlopeFactor;
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cmdbuf->state.bindpoint[VK_PIPELINE_BIND_POINT_GRAPHICS].dirty |= DZN_CMD_BINDPOINT_DIRTY_PIPELINE;
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}
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VKAPI_ATTR void VKAPI_CALL
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@ -4482,10 +4487,15 @@ dzn_CmdSetDepthBounds(VkCommandBuffer commandBuffer,
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float maxDepthBounds)
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{
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VK_FROM_HANDLE(dzn_cmd_buffer, cmdbuf, commandBuffer);
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struct dzn_device *device = container_of(cmdbuf->vk.base.device, struct dzn_device, vk);
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struct dzn_physical_device *pdev =
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container_of(device->vk.physical, struct dzn_physical_device, vk);
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cmdbuf->state.zsa.depth_bounds.min = minDepthBounds;
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cmdbuf->state.zsa.depth_bounds.max = maxDepthBounds;
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cmdbuf->state.dirty |= DZN_CMD_DIRTY_DEPTH_BOUNDS;
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if (pdev->options2.DepthBoundsTestSupported) {
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cmdbuf->state.zsa.depth_bounds.min = minDepthBounds;
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cmdbuf->state.zsa.depth_bounds.max = maxDepthBounds;
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cmdbuf->state.dirty |= DZN_CMD_DIRTY_DEPTH_BOUNDS;
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}
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}
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VKAPI_ATTR void VKAPI_CALL
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@ -4495,13 +4505,18 @@ dzn_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer,
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{
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VK_FROM_HANDLE(dzn_cmd_buffer, cmdbuf, commandBuffer);
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if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
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if (faceMask & VK_STENCIL_FACE_FRONT_BIT) {
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cmdbuf->state.zsa.stencil_test.front.compare_mask = compareMask;
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cmdbuf->state.pipeline_variant.stencil_test.front.compare_mask = compareMask;
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}
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if (faceMask & VK_STENCIL_FACE_BACK_BIT)
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if (faceMask & VK_STENCIL_FACE_BACK_BIT) {
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cmdbuf->state.zsa.stencil_test.back.compare_mask = compareMask;
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cmdbuf->state.pipeline_variant.stencil_test.back.compare_mask = compareMask;
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}
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cmdbuf->state.dirty |= DZN_CMD_DIRTY_STENCIL_COMPARE_MASK;
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cmdbuf->state.bindpoint[VK_PIPELINE_BIND_POINT_GRAPHICS].dirty |= DZN_CMD_BINDPOINT_DIRTY_PIPELINE;
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}
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VKAPI_ATTR void VKAPI_CALL
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@ -4511,13 +4526,18 @@ dzn_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer,
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{
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VK_FROM_HANDLE(dzn_cmd_buffer, cmdbuf, commandBuffer);
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if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
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if (faceMask & VK_STENCIL_FACE_FRONT_BIT) {
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cmdbuf->state.zsa.stencil_test.front.write_mask = writeMask;
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cmdbuf->state.pipeline_variant.stencil_test.front.write_mask = writeMask;
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}
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if (faceMask & VK_STENCIL_FACE_BACK_BIT)
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if (faceMask & VK_STENCIL_FACE_BACK_BIT) {
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cmdbuf->state.zsa.stencil_test.back.write_mask = writeMask;
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cmdbuf->state.pipeline_variant.stencil_test.back.write_mask = writeMask;
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}
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cmdbuf->state.dirty |= DZN_CMD_DIRTY_STENCIL_WRITE_MASK;
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cmdbuf->state.bindpoint[VK_PIPELINE_BIND_POINT_GRAPHICS].dirty |= DZN_CMD_BINDPOINT_DIRTY_PIPELINE;
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}
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VKAPI_ATTR void VKAPI_CALL
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@ -1069,7 +1069,7 @@ dzn_GetPhysicalDeviceFeatures2(VkPhysicalDevice physicalDevice,
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.multiDrawIndirect = true,
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.drawIndirectFirstInstance = true,
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.depthClamp = false,
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.depthBiasClamp = false,
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.depthBiasClamp = true,
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.fillModeNonSolid = false,
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.depthBounds = dzn_physical_device_supports_depth_bounds(pdev),
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.wideLines = false,
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@ -661,6 +661,8 @@ dzn_graphics_pipeline_translate_rast(struct dzn_graphics_pipeline *pipeline,
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}
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d3d12_gfx_pipeline_state_stream_new_desc(out, RASTERIZER, D3D12_RASTERIZER_DESC, desc);
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pipeline->templates.desc_offsets.rast =
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(uintptr_t)desc - (uintptr_t)out->pPipelineStateSubobjectStream;
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desc->DepthClipEnable = !in_rast->depthClampEnable;
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desc->FillMode = translate_polygon_mode(in_rast->polygonMode);
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desc->CullMode = translate_cull_mode(in_rast->cullMode);
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@ -841,13 +843,18 @@ dzn_graphics_pipeline_translate_zsa(struct dzn_graphics_pipeline *pipeline,
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return;
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d3d12_gfx_pipeline_state_stream_new_desc(out, DEPTH_STENCIL1, D3D12_DEPTH_STENCIL_DESC1, desc);
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pipeline->templates.desc_offsets.ds =
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(uintptr_t)desc - (uintptr_t)out->pPipelineStateSubobjectStream;
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desc->DepthEnable = in_zsa->depthTestEnable;
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desc->DepthEnable =
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in_zsa->depthTestEnable || in_zsa->depthBoundsTestEnable;
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desc->DepthWriteMask =
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in_zsa->depthWriteEnable ?
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D3D12_DEPTH_WRITE_MASK_ALL : D3D12_DEPTH_WRITE_MASK_ZERO;
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desc->DepthFunc =
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dzn_translate_compare_op(in_zsa->depthCompareOp);
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in_zsa->depthTestEnable ?
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dzn_translate_compare_op(in_zsa->depthCompareOp) :
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D3D12_COMPARISON_FUNC_ALWAYS;
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pipeline->zsa.depth_bounds.enable = in_zsa->depthBoundsTestEnable;
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pipeline->zsa.depth_bounds.min = in_zsa->minDepthBounds;
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pipeline->zsa.depth_bounds.max = in_zsa->maxDepthBounds;
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@ -1155,6 +1162,12 @@ dzn_graphics_pipeline_create(struct dzn_device *device,
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case VK_DYNAMIC_STATE_DEPTH_BOUNDS:
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pipeline->zsa.depth_bounds.dynamic = true;
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break;
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case VK_DYNAMIC_STATE_DEPTH_BIAS:
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pipeline->zsa.dynamic_depth_bias = true;
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ret = dzn_graphics_pipeline_prepare_for_variants(device, pipeline);
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if (ret)
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goto out;
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break;
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default: unreachable("Unsupported dynamic state");
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}
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}
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@ -1266,6 +1279,25 @@ dzn_graphics_pipeline_get_state(struct dzn_graphics_pipeline *pipeline,
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if (dzn_graphics_pipeline_get_desc_template(pipeline, ib_strip_cut))
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masked_key.ib_strip_cut = key->ib_strip_cut;
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if (dzn_graphics_pipeline_get_desc_template(pipeline, rast) &&
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pipeline->zsa.dynamic_depth_bias)
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masked_key.depth_bias = key->depth_bias;
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const D3D12_DEPTH_STENCIL_DESC1 *ds_templ =
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dzn_graphics_pipeline_get_desc_template(pipeline, ds);
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if (ds_templ && ds_templ->StencilEnable) {
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if (ds_templ->FrontFace.StencilFunc != D3D12_COMPARISON_FUNC_NEVER &&
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ds_templ->FrontFace.StencilFunc != D3D12_COMPARISON_FUNC_ALWAYS)
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masked_key.stencil_test.front.compare_mask = key->stencil_test.front.compare_mask;
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if (ds_templ->BackFace.StencilFunc != D3D12_COMPARISON_FUNC_NEVER &&
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ds_templ->BackFace.StencilFunc != D3D12_COMPARISON_FUNC_ALWAYS)
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masked_key.stencil_test.back.compare_mask = key->stencil_test.back.compare_mask;
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if (pipeline->zsa.stencil_test.dynamic_write_mask) {
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masked_key.stencil_test.front.write_mask = key->stencil_test.front.write_mask;
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masked_key.stencil_test.back.write_mask = key->stencil_test.back.write_mask;
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}
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}
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struct dzn_device *device =
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container_of(pipeline->base.base.device, struct dzn_device, vk);
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struct hash_entry *he =
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@ -1290,6 +1322,45 @@ dzn_graphics_pipeline_get_state(struct dzn_graphics_pipeline *pipeline,
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if (ib_strip_cut)
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*ib_strip_cut = masked_key.ib_strip_cut;
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D3D12_RASTERIZER_DESC *rast =
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dzn_graphics_pipeline_get_desc(pipeline, stream_buf, rast);
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if (rast && pipeline->zsa.dynamic_depth_bias) {
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rast->DepthBias = masked_key.depth_bias.constant_factor;
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rast->DepthBiasClamp = masked_key.depth_bias.clamp;
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rast->SlopeScaledDepthBias = masked_key.depth_bias.slope_factor;
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}
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D3D12_DEPTH_STENCIL_DESC1 *ds =
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dzn_graphics_pipeline_get_desc(pipeline, stream_buf, ds);
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if (ds && ds->StencilEnable) {
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if (pipeline->zsa.stencil_test.dynamic_compare_mask) {
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if (ds->FrontFace.StencilFunc != D3D12_COMPARISON_FUNC_NEVER &&
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ds->FrontFace.StencilFunc != D3D12_COMPARISON_FUNC_ALWAYS) {
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ds->StencilReadMask = masked_key.stencil_test.front.compare_mask;
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}
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if (ds->BackFace.StencilFunc != D3D12_COMPARISON_FUNC_NEVER &&
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ds->BackFace.StencilFunc != D3D12_COMPARISON_FUNC_ALWAYS) {
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ds->StencilReadMask = masked_key.stencil_test.back.compare_mask;
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}
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if (ds->FrontFace.StencilFunc != D3D12_COMPARISON_FUNC_NEVER &&
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ds->FrontFace.StencilFunc != D3D12_COMPARISON_FUNC_ALWAYS &&
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ds->BackFace.StencilFunc != D3D12_COMPARISON_FUNC_NEVER &&
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ds->BackFace.StencilFunc != D3D12_COMPARISON_FUNC_ALWAYS)
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assert(masked_key.stencil_test.front.compare_mask == masked_key.stencil_test.back.compare_mask);
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}
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if (pipeline->zsa.stencil_test.dynamic_write_mask) {
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assert(!masked_key.stencil_test.front.write_mask ||
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!masked_key.stencil_test.back.write_mask ||
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masked_key.stencil_test.front.write_mask == masked_key.stencil_test.back.write_mask);
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ds->StencilWriteMask =
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masked_key.stencil_test.front.write_mask |
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masked_key.stencil_test.back.write_mask;
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}
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}
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HRESULT hres = ID3D12Device2_CreatePipelineState(device->dev, &stream_desc,
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&IID_ID3D12PipelineState,
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&variant->state);
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@ -458,6 +458,16 @@ struct dzn_rendering_attachment {
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struct dzn_graphics_pipeline_variant_key {
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D3D12_INDEX_BUFFER_STRIP_CUT_VALUE ib_strip_cut;
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struct {
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int constant_factor;
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float slope_factor;
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float clamp;
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} depth_bias;
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struct {
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struct {
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uint32_t ref, compare_mask, write_mask;
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} front, back;
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} stencil_test;
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};
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struct dzn_graphics_pipeline_variant {
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@ -791,6 +801,7 @@ struct dzn_graphics_pipeline {
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bool dynamic;
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float min, max;
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} depth_bounds;
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bool dynamic_depth_bias;
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} zsa;
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struct {
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@ -803,6 +814,8 @@ struct dzn_graphics_pipeline {
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D3D12_PIPELINE_STATE_STREAM_DESC stream_desc;
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struct {
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uint32_t ib_strip_cut;
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uint32_t rast;
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uint32_t ds;
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} desc_offsets;
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D3D12_INPUT_ELEMENT_DESC inputs[D3D12_VS_INPUT_REGISTER_COUNT];
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struct {
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