Commit graph

141245 commits

Author SHA1 Message Date
Adam Jackson
5a613c55eb dri: Try harder to infer the drawable fbconfig if needed
This code would work for GLXWindows but not for bare Windows, which I
guess you could argue is a server bug but which we can fix on the client
side with a little effort. We change __glXGetDrawableAttribute to
additionally return false if we failed to find the requested attribute
(which is safe, all the other callers discard the return value). Then
when inferring the fbconfig, if the attribute wasn't found, we ask for
the window attributes to find the visual ID and use that to find the
fbconfig.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10381>
2021-04-22 18:11:52 +00:00
Jason Ekstrand
134af5ada2 intel/compiler: Don't insert barriers for NULL sources
Normally, we never see NULL in a source.  However, starting with
eab1c55590, we can with a SHADER_OPCODE_SEND if it only has the first
payload.  We were inserting barriers which adds unnecessary scheduling
dependencies and takes a lot of compile time because inserting a single
barrier is an O(n) operation.

All the extra O(n) can have a surprisingly large effect.  This cuts the
runtime of dEQP-VK.binding_model.buffer_device_address.set3.depth3.
basessbo.convertcheckuv2.store.single.std140.frag by a factor of 20x for
a debug build.

Shader-db results on ICL:

    total instructions in shared programs: 19918983 -> 19921610 (0.01%)
    instructions in affected programs: 884074 -> 886701 (0.30%)
    helped: 1688
    HURT: 817
    helped stats (abs) min: 1 max: 163 x̄: 4.23 x̃: 1
    helped stats (rel) min: 0.02% max: 12.50% x̄: 1.08% x̃: 0.61%
    HURT stats (abs)   min: 1 max: 2674 x̄: 11.95 x̃: 2
    HURT stats (rel)   min: 0.11% max: 70.22% x̄: 1.71% x̃: 1.03%
    95% mean confidence interval for instructions value: -1.97 4.06
    95% mean confidence interval for instructions %-change: -0.28% -0.06%
    Inconclusive result (value mean confidence interval includes 0).

    total cycles in shared programs: 976503324 -> 975884809 (-0.06%)
    cycles in affected programs: 82581703 -> 81963188 (-0.75%)
    helped: 4144
    HURT: 5010
    helped stats (abs) min: 1 max: 79294 x̄: 311.31 x̃: 8
    helped stats (rel) min: <.01% max: 53.69% x̄: 2.00% x̃: 0.51%
    HURT stats (abs)   min: 1 max: 92266 x̄: 134.04 x̃: 8
    HURT stats (rel)   min: <.01% max: 218.09% x̄: 3.25% x̃: 0.53%
    95% mean confidence interval for cycles value: -119.85 -15.29
    95% mean confidence interval for cycles %-change: 0.68% 1.07%
    Inconclusive result (value mean confidence interval and %-change mean confidence interval disagree).

    total spills in shared programs: 10659 -> 12014 (12.71%)
    spills in affected programs: 441 -> 1796 (307.26%)
    helped: 7
    HURT: 12

    total fills in shared programs: 11551 -> 14429 (24.92%)
    fills in affected programs: 993 -> 3871 (289.83%)
    helped: 8
    HURT: 11

    total sends in shared programs: 1025832 -> 1025353 (-0.05%)
    sends in affected programs: 2241 -> 1762 (-21.37%)
    helped: 105
    HURT: 1
    helped stats (abs) min: 1 max: 87 x̄: 4.57 x̃: 2
    helped stats (rel) min: 5.56% max: 54.72% x̄: 11.37% x̃: 10.00%
    HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
    HURT stats (rel)   min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
    95% mean confidence interval for sends value: -7.39 -1.65
    95% mean confidence interval for sends %-change: -12.95% -7.70%
    Sends are helped.

    LOST:   93
    GAINED: 109

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4648
Fixes: eab1c55590 "intel/fs: Support SENDS in SHADER_OPCODE_SEND"
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10412>
2021-04-22 18:00:16 +00:00
Erik Faye-Lund
a6a198da21 zink: do not read outside of array
We need to bounds-check *before* we index the array, otherwise we peek
beyond the end of it.

Caught by Valgrind.

Fixes: dd29a7e5b0 ("zink: move descriptor barrier handling to main update function")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10367>
2021-04-22 17:47:30 +00:00
Boris Brezillon
5006167061 panfrost: Hook-up indirect dispatch support
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10332>
2021-04-22 16:59:18 +00:00
Boris Brezillon
9b22cda364 panfrost: Add helpers to emit indirect dispatch jobs
Indirect dispatch is implemented using an extra compute job patching
the compute job header to apply the final num_workgroup values. Add
helpers to simplify emission of the such jobs.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10332>
2021-04-22 16:59:18 +00:00
Boris Brezillon
7d14a0cb99 panfrost: Make sure pack_work_groups_compute() is passed valid dimensions
Make sure size_{x,y,z} and num_{x,y,s} are positive, otherwise we end
up with an integer underflow.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10332>
2021-04-22 16:59:18 +00:00
Boris Brezillon
54a4e75223 pan/midg: Make sure the constant offset is in range in mir_match_iadd()
The offset field is an 18-bit signed integer, if the offset is bigger
than that we can get rid of the intermediate iadd.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10332>
2021-04-22 16:59:18 +00:00
Boris Brezillon
c09439721c pan/midg: Fix midgard_pack_common_store_mask()
st_u64() gets an invalid mask when component Y is written.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10332>
2021-04-22 16:59:18 +00:00
Boris Brezillon
51836a2be9 pan/bi: Expand pseudo instructions when nosched is set
Pseudo instruction might expend to 2 instructions (one in the FMA slot
and one in the ADD slot), we need to expand those even if nosched is
set.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10332>
2021-04-22 16:59:18 +00:00
Adam Jackson
62f3507aea gallium: Fix PIPE_BIND_SAMPLER_REDUCTION_MINMAX definition to be unique
This accidentally collided with PIPE_BIND_SCANOUT.

Fixes: 59ad872458 gallium: add PIPE_BIND_SAMPLER_REDUCTION_MINMAX
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10397>
2021-04-22 16:35:06 +00:00
Adam Jackson
fca09eb8f3 zink: Fix format query for minmax reduction support
All the rest of the filters here are written as "if asking for this
feature and it's not there, return false", with an implicit fallthrough
to the next test. There's no good reason to treat minmax differently.

Fixes: 22e1ed5722 zink: support format queries for VK_EXT_sampler_filter_minmax
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10397>
2021-04-22 16:35:06 +00:00
Simon Ser
4a6b87ceab radeonsi: implement pipe_context.create_video_buffer_with_modifiers
Just pass down the modifier list to vl_video_buffer_create_as_resource,
filtering out DCC modifiers because we don't support these for now.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10237>
2021-04-22 15:57:29 +00:00
Simon Ser
5f101e8096 gallium, va: add support for VASurfaceAttribDRMFormatModifiers
This new surface attribute can be supplied by the client to indicate
a list of modifiers that the driver can choose from for buffer
allocation. This is useful to make sure the buffers allocated via libva
are compatible with the intended usage (e.g. can be scanned out via KMS
or can be imported to EGL).

Introduce a new Gallium pipe_context.create_video_buffer_with_modifiers
hook that drivers can implement if they are modifiers-aware. Add a
modifiers argument to vlVaHandleSurfaceAllocate so that the
user-supplied list of modifiers can be passed down from vaCreateSurfaces
to the Gallium driver.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10237>
2021-04-22 15:57:29 +00:00
Lionel Landwerlin
74685c8136 anv: reuse define for number of render target assert
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10206>
2021-04-22 15:34:52 +00:00
Lionel Landwerlin
b15bfe92f7 anv: implement VK_EXT_color_write_enable
v2: Add missing gfx 7/7.5 dynamic state emission

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10206>
2021-04-22 15:34:52 +00:00
Lionel Landwerlin
82eb7c04e7 anv: prepare pipeline for delayed emission of color writes
Namely we want to be able to emit the following dynamically :

  * On Gfx 7/7.5 : 3DSTATE_VM, 3DSTATE_BLEND_STATE_POINTERS

  * On Gfx 8+ : 3DSTATE_VM, 3DSTATE_BLEND_STATE_POINTERS,
    3DSTATE_PS_BLEND

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10206>
2021-04-22 15:34:52 +00:00
Lionel Landwerlin
fab08d65cb anv: drop extension check for dynamic state
Following 505d176a8e ("anv: disable baked in pipeline bits from
dynamic emission path") dynamic bits of extensions that are not
enabled should not be there.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10206>
2021-04-22 15:34:52 +00:00
Lionel Landwerlin
2b49d5d193 vulkan: bump headers/registry to version 1.2.175
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10206>
2021-04-22 15:34:52 +00:00
Boris Brezillon
51a4bca3c3 pan/midg: Fix 2 memory leaks
The ssa_constants hash table and its elements are leaked. Pass the
context to the allocator to avoid that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10408>
2021-04-22 16:25:40 +02:00
Timur Kristóf
74c467d988 aco: Mark VCC clobbered for iadd8 and iadd16 reductions on GFX6-7.
On GFX6-7, the 8 and 16-bit integer add reductions use the 32-bit v_add
instruction, which clobbers the VCC register.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10346>
2021-04-22 11:29:49 +00:00
Marcin Ślusarz
59bbf885e9 gallium/u_threaded: offload begin/end_intel_perf_query
Fixes: 206495cac4 ("iris: Enable u_threaded_context")
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9922>
2021-04-22 10:59:12 +00:00
Marcin Ślusarz
e6aa5b96a8 gallium/u_threaded: implement INTEL_performance_query hooks
Fixes: 206495cac4 ("iris: Enable u_threaded_context")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4528

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9922>
2021-04-22 10:59:12 +00:00
Marcin Ślusarz
a53d5753fd intel/perf: move calculation of period_exponent to perf ctx init
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9922>
2021-04-22 10:59:12 +00:00
Marcin Ślusarz
111d89eb7c iris: fully populate perf_config before using it to initialize perf_context
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9922>
2021-04-22 10:59:12 +00:00
Marcin Ślusarz
0e32939654 i965: fully populate perf_config before using it to initialize perf_context
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9922>
2021-04-22 10:59:12 +00:00
James Park
e189839002 meson: Disable MSVC warning 5105
Older versions of the Windows SDK are not compliant when the new
preprocessor is active, which is the default when C17 is enabled.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10202>
2021-04-22 10:29:02 +00:00
James Park
e29f4a19a8 meson: Disable libdrm for RADV on Windows
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10202>
2021-04-22 10:29:02 +00:00
James Park
e9254699a7 meson: Add wrap for libelf on Windows
Uses release from Lag Free Games GitHub, which applies Windows build
fixes to FreeBSD libelf.

The amd_common library uses libelf.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10202>
2021-04-22 10:29:02 +00:00
Juan A. Suarez Romero
c93bd731f8 v3dv/pipeline_cache: bail out in case of error
Currently, in GetPipelineCacheData() function, in several cases if
there is an error the blob is finished and cache unlocked, but code
continues executing, which can lead to multiple
`pthread_mutex_unlock()` calls.

Instead, if there's an error just bail out to finish the blob and unlock
the cache directly.

Fixes CID#1468147 "Double unlock (LOCK)".

v2:
 - Rename "bail_out" by "done" (apinheiro)

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10404>
2021-04-22 11:40:40 +02:00
James Park
dc736a1740 radv: Use ac_drm_fourcc.h
Allows compilation on Windows.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9709>
2021-04-22 08:16:11 +00:00
James Park
a64b36ecaf ac/surface: Move drm_fourcc.h to common header
Useful for including from RADV without copy/paste.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9709>
2021-04-22 08:16:11 +00:00
Juan A. Suarez Romero
84c64a0713 ci/v3d: execute all piglit tests
Most of the regressions we found are with the piglit testsuite. The
difference between executing all tests versus quick_gl + quick_shader
are minimal, in the sense that we would need the same number of jobs to
execute and be in the 10 minutes budget.

Hence replace "quick_gl" + "quick_shader" by "all".

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10378>
2021-04-22 07:53:39 +00:00
Juan A. Suarez Romero
796cb1e9d5 v3dv: check returned values
Check if v3dv_ioctl() or v3dv_bo_map() fail, and print a proper error
message.

This check happens in the rest of the code, so it makes sense to apply
here too.

Fixes CID#1468162 "Unchecked return value (CHECKED_RETURN)".

v2:
 - Fix message error (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10380>
2021-04-22 07:39:24 +00:00
Dave Airlie
32a2978949 lavapipe: fix mipmapped resolves.
I updated CTS and found
EQP-VK.renderpass.suballocation.multisample_resolve.b8g8r8a8_unorm.samples_4_resolve_level_*
was failing.

Fixes: b38879f8c5 ("vallium: initial import of the vulkan frontend")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10400>
2021-04-22 03:01:33 +00:00
Jesse Natalie
53c97f92cd microsoft/compiler: For Vulkan environment, don't create resource handles upfront
Creating resource handles upfront works well while we have fixed-size resource
counts, but once we start talking about bindless, having arrays or even sets
of handles becomes prohibitive. It also precludes dynamic indexing for textures.

Instead, rely on the load_vulkan_descriptor instruction for UBO/SSBO, and undo
nir_lower_samplers so we continue to have deref chains for image/sampler accesses.
Then, emit handles at the end of a deref chain - the chain should only have
array offsets, so once we get to a type that's not an array anymore, we can
emit the handle.

Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10288>
2021-04-22 02:43:30 +00:00
Jesse Natalie
f6667b13f2 microsoft/compiler: Remove assert-only resource size or usage tracking
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10288>
2021-04-22 02:43:30 +00:00
Jesse Natalie
86e443d0cc microsoft/compiler: Remove hardcoded limits on numbers of resource arrays
While GL and CL might have limits here, Vulkan doesn't, and can declare
tons of individual variables.

Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10288>
2021-04-22 02:43:30 +00:00
Alyssa Rosenzweig
0f4ba349e9 nir/lower_fragcolor: Handle fp16 outputs
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10391>
2021-04-21 22:17:28 +00:00
Alyssa Rosenzweig
49c6157b15 nir/lower_fragcolor: Use shader_instructions_pass
While I was in the area.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10391>
2021-04-21 22:17:28 +00:00
Lionel Landwerlin
0bb29c07a4 spirv: fixup pointer_to/from_ssa with acceleration structures
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ed907e5d84 ("spirv: Add support for OpTypeAccelerationStructureKHR")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10357>
2021-04-21 21:51:51 +00:00
Yiwei Zhang
e91c95dba8 venus: force a roundtrip after vn_renderer_bo_create_dmabuf
This is to ensure the kernel operations and the later ring operations
are in the right order.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10390>
2021-04-21 21:40:32 +00:00
Yiwei Zhang
8bbe55533f venus: close the import memory fd on success
VkImportMemoryFdInfoKHR takes fd ownership on a successful import.
Internally, vn_renderer_bo_create_dmabuf doesn't rely on the fd to
extend the life cycle of the bo or the host resource, and it won't
close the fd. Thus, we shall close the fd when the import succeeds.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10390>
2021-04-21 21:40:32 +00:00
Italo Nicola
9703ca5699 pan/mdg: fix midgard writemask encoding for stores
This commits fixes a regression caused by commit
616394cf31.

Fixes dEQP-GLES31.functional.compute.shared_var.atomic.min.*,
dEQP-GLES31.functional.ssbo.atomic.min.*,
dEQP-GLES31.functional.compute.shared_var.atomic.max.* and
dEQP-GLES31.functional.ssbo.atomic.max.*.

Midgard's non-image and non-varying store operations have a unique
behavior for the load/store writemask, with each bit being responsible
for 1/4th of the size of the total write operation. This means that we
have to pack the writemask differently since we stopped using st_u128
for everything.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10067>
2021-04-21 21:22:42 +00:00
Rhys Perry
5760386654 radv: only set robust_modes if robustBufferAccess2 is enabled
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10384>
2021-04-21 20:26:58 +00:00
Rhys Perry
8408d0312f radv: improve vectorization callback for small bit sizes
More accurately reflect the hardware's capabilities for byte and short
aligned VMEM operations.

fossil-db (GFX10.3):
Totals from 65 (0.05% of 139391) affected shaders:
SGPRs: 4296 -> 4200 (-2.23%)
CodeSize: 1000984 -> 1000368 (-0.06%); split: -0.13%, +0.07%
Instrs: 177504 -> 177380 (-0.07%); split: -0.17%, +0.10%
Cycles: 36820596 -> 36812792 (-0.02%); split: -0.15%, +0.13%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10384>
2021-04-21 20:26:58 +00:00
Rhys Perry
89b759c4f9 nir/opt_load_store_vectorize: loop internally
To vectorize to vec8/16 or vec4 (without vec3), we can't incrementally add
components to a load/store. This patch loops vectorization so that two new
vec2/4/8 operations can be combined into a larger operation.

fossil-db (GFX10.3):
Totals from 22 (0.02% of 139391) affected shaders:
SpillVGPRs: 1749 -> 1771 (+1.26%)
CodeSize: 901212 -> 892532 (-0.96%); split: -1.19%, +0.22%
Scratch: 178176 -> 184320 (+3.45%)
Instrs: 159358 -> 158027 (-0.84%); split: -0.99%, +0.16%
Cycles: 37046772 -> 36738544 (-0.83%); split: -1.00%, +0.17%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10384>
2021-04-21 20:26:58 +00:00
Rhys Perry
447820d003 nir/opt_load_store_vectorize: ignore load_vulkan_descriptor
These mess with alignment calculation.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10384>
2021-04-21 20:26:58 +00:00
Rhys Perry
6ca11b4a66 nir/opt_load_store_vectorize: improve handling of swizzles
Previously (for simplicity), it could have skipped vectorization if
swizzles were involved.

fossil-db (GFX10.3):
Totals from 498 (0.36% of 139391) affected shaders:
SGPRs: 25328 -> 26608 (+5.05%); split: -1.36%, +6.41%
VGPRs: 9988 -> 9996 (+0.08%)
SpillSGPRs: 40 -> 65 (+62.50%)
CodeSize: 1410188 -> 1385584 (-1.74%); split: -1.76%, +0.02%
Instrs: 257149 -> 250579 (-2.55%); split: -2.57%, +0.01%
Cycles: 1096892 -> 1070600 (-2.40%); split: -2.41%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10384>
2021-04-21 20:26:58 +00:00
Rhys Perry
4df3654c79 nir/load_store_vectorize: assume CAN_REORDER ops don't alias with stores
fossil-db (GFX10.3):
Totals from 20 (0.01% of 139391) affected shaders:
SGPRs: 688 -> 712 (+3.49%); split: -1.16%, +4.65%
CodeSize: 35488 -> 34424 (-3.00%); split: -3.04%, +0.05%
Instrs: 6405 -> 6259 (-2.28%); split: -2.44%, +0.16%
Cycles: 51768 -> 51268 (-0.97%); split: -1.21%, +0.24%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10384>
2021-04-21 20:26:58 +00:00
Eric Anholt
839af6545b mesa: Replace _mesa_pack_ubyte_rgba_row() with pack_ubyte_rgba_8unorm().
The major thing that the codegen had was support for expanding integers
from byte-per-channel to the target format's channel size.  However, the
format_utils.c caller never did that for integers, and swrast doesn't have
support for integers, so that appears to be dead code.  With this done,
format_pack.py goes away entirely.

I slightly changed the prototype of _mesa_pack_ubyte_rgba_row() to match
up with the new function, which involved (mostly) dropping some manual
casts from the callers to make their data match the old prototype.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10336>
2021-04-21 19:59:10 +00:00