Commit graph

141245 commits

Author SHA1 Message Date
Rhys Perry
8e0c6e196e aco: disallow literals with some instruction formats
Because isVOPn() is true for many VOP3, SDWA and DPP instructions, this
would often not complain.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:43 +00:00
Rhys Perry
cf22eabc68 aco: make validate_ir() output usable in tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:43 +00:00
Rhys Perry
54292e99c7 aco: optimize 32-bit extracts and inserts using SDWA
Still need to use dst_u=preserve field to optimize packs

fossil-db (Sienna Cichlid):
Totals from 15974 (10.66% of 149839) affected shaders:
VGPRs: 1009064 -> 1008968 (-0.01%); split: -0.03%, +0.02%
SpillSGPRs: 7959 -> 7964 (+0.06%)
CodeSize: 101716436 -> 101159568 (-0.55%); split: -0.55%, +0.01%
MaxWaves: 284464 -> 284490 (+0.01%); split: +0.02%, -0.01%
Instrs: 19334216 -> 19224241 (-0.57%); split: -0.57%, +0.00%
Latency: 375465295 -> 375230478 (-0.06%); split: -0.14%, +0.08%
InvThroughput: 79006105 -> 78860705 (-0.18%); split: -0.25%, +0.07%

fossil-db (Polaris):
Totals from 11369 (7.51% of 151365) affected shaders:
SGPRs: 787920 -> 787680 (-0.03%); split: -0.04%, +0.01%
VGPRs: 681056 -> 681040 (-0.00%); split: -0.01%, +0.00%
CodeSize: 68127288 -> 67664120 (-0.68%); split: -0.69%, +0.01%
MaxWaves: 54370 -> 54371 (+0.00%)
Instrs: 13294638 -> 13214109 (-0.61%); split: -0.62%, +0.01%
Latency: 373515759 -> 373214571 (-0.08%); split: -0.11%, +0.03%
InvThroughput: 166529524 -> 166275291 (-0.15%); split: -0.20%, +0.05%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:43 +00:00
Rhys Perry
63659fc15c radv: use byte/word extract/insert instructions
ACO doesn't yet combine extract/insert into instructions, but it seems to
already generate less instructions because NIR optimizes shift+and to
these instructions. Code size is worse in some cases though because we
have to always use a literal when masking.

fossil-db (Sienna Cichlid):
Totals from 14361 (9.58% of 149839) affected shaders:
VGPRs: 850152 -> 850304 (+0.02%); split: -0.02%, +0.04%
SpillSGPRs: 7979 -> 7989 (+0.13%); split: -0.03%, +0.15%
CodeSize: 88031216 -> 88162520 (+0.15%); split: -0.01%, +0.16%
MaxWaves: 269414 -> 269426 (+0.00%)
Instrs: 16695182 -> 16662852 (-0.19%); split: -0.21%, +0.01%
Latency: 375592693 -> 375544364 (-0.01%); split: -0.04%, +0.03%
InvThroughput: 75627700 -> 75607720 (-0.03%); split: -0.07%, +0.04%

fossil-db (Polaris):
Totals from 13816 (9.13% of 151365) affected shaders:
SGPRs: 984896 -> 982512 (-0.24%); split: -0.29%, +0.05%
VGPRs: 809220 -> 809112 (-0.01%); split: -0.02%, +0.01%
SpillSGPRs: 9181 -> 9185 (+0.04%); split: -0.04%, +0.09%
CodeSize: 82017952 -> 82123484 (+0.13%); split: -0.01%, +0.14%
MaxWaves: 65721 -> 65723 (+0.00%)
Instrs: 16008744 -> 15988007 (-0.13%); split: -0.18%, +0.05%
Latency: 439911623 -> 439869622 (-0.01%); split: -0.04%, +0.03%
InvThroughput: 185898770 -> 185841742 (-0.03%); split: -0.08%, +0.05%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:43 +00:00
Rhys Perry
7d76b07d6b ac/llvm: implement byte/word extract/insert instructions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:43 +00:00
Rhys Perry
daa329f664 aco: use byte/word extract pseudo-instructions
fossil-db (Sienna Cichild):
Totals from 1890 (1.26% of 149839) affected shaders:
CodeSize: 5104196 -> 5104300 (+0.00%); split: -0.00%, +0.01%
Latency: 11572943 -> 11572880 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 4876941 -> 4876982 (+0.00%); split: -0.00%, +0.00%
SClause: 26774 -> 26775 (+0.00%)
Copies: 125778 -> 125813 (+0.03%)
PreSGPRs: 56452 -> 56451 (-0.00%)

fossil-db (Polaris):
Totals from 1884 (1.24% of 151365) affected shaders:
CodeSize: 3849340 -> 3849312 (-0.00%); split: -0.00%, +0.00%
Instrs: 741391 -> 741382 (-0.00%)
Latency: 13533815 -> 13533439 (-0.00%)
InvThroughput: 12058777 -> 12058500 (-0.00%)
Copies: 120890 -> 120891 (+0.00%)
PreSGPRs: 48940 -> 48939 (-0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:43 +00:00
Rhys Perry
1f2518ef9f aco: implement nir_op_extract/nir_op_insert
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:43 +00:00
Rhys Perry
2f94353735 aco: add p_extract/p_insert
These will let us make the SDWA optimizer much simpler than if we were to
recognize combinations of shift/and/bfe.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:42 +00:00
Rhys Perry
e9d1643288 aco: disallow SDWA for instructions with 64-bit definitions/operands
For example, v_cvt_f64_i32. LLVM doesn't seem to allow this either and it
doesn't seem to work correctly.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:42 +00:00
Rhys Perry
1cbcfb8b38 nir, nir/algebraic: add byte/word insertion instructions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:42 +00:00
Rhys Perry
edae3e5623 nir/algebraic: optimize extract of extract
Found in some sottr shaders (originally iand(ishr(a, 16), 0xffff))

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
2021-06-08 08:57:42 +00:00
Samuel Pitoiset
736893060f radv: emit PA_SC_CONSERVATIVE_RASTERIZATION_CNTL only on GFX9+
This context register doesn't exist on older generations.

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11210>
2021-06-08 05:58:01 +00:00
Dave Airlie
c04f20e7e0 intel/isl: add blend enable flag to gen4/5
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10655>
2021-06-08 12:35:52 +10:00
Dave Airlie
c25a5a832a intel/isl: add levels and minimum array element to null fill
gen4/5 needs these to avoid gpu hangs around matching depth/null
surfaces

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10655>
2021-06-08 12:35:43 +10:00
Dave Airlie
cb152e79f2 intel/isl: convert null surface fill to a struct.
Suggested by Jason, pre-convert this to a struct so it can
be expanded for gen4/5 crocus support

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10655>
2021-06-08 12:35:40 +10:00
Dave Airlie
6989afea58 intel/isl: decrease isl_format_layouts size by 36k
This drops
-0000000000011e90 R isl_format_layouts
+0000000000008f48 R isl_format_layouts

I think that's about 36k.

Thanks to Jason for suggesting PACKED

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11232>
2021-06-08 11:52:25 +10:00
Yiwei Zhang
93f67055c4 venus: forward the host renderer hardware info
Some game engines rely on the real hardware info to adjust default
graphics quality and other attributes.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11175>
2021-06-07 23:54:52 +00:00
Caio Marcelo de Oliveira Filho
c8a7bd0dc8 nir: Rename WORK_GROUP (and similar) to WORKGROUP
Be consistent with other usages in Vulkan and SPIR-V, and the recently
added workgroup_size field.

Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho
a71a780598 nir: Rename nir_intrinsic_load_local_group_size to nir_intrinsic_load_workgroup_size
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho
43a6a2151b compiler: Rename SYSTEM_VALUE_LOCAL_GROUP_SIZE to SYSTEM_VALUE_WORKGROUP_SIZE
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho
430d2206da compiler: Rename local_size to workgroup_size
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Emma Anholt
4b9e52e818 i915g: Make sure we don't try to texture from the const file.
It's an invalid value for the texture coordinate source, and this becomes
more common if we enable nir-to-tgsi.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11227>
2021-06-07 22:24:11 +00:00
Emma Anholt
1945c1f526 ci/i915g: Fix incorrect expectation.
I think this was an edit failure on my part when fixing up the
expectations for merge.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11227>
2021-06-07 22:24:11 +00:00
Timur Kristóf
18d48c01c2 radv: Assert that there is no GS copy shader when the pipeline has NGG.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11092>
2021-06-07 22:05:42 +00:00
Timur Kristóf
7e664a5383 radv: Don't generate GS copy shader when the pipeline has NGG.
Previously the code used radv_pipeline_has_ngg but that always
returned false because the pipeline->shaders was all NULL at the
time when the GS copy shader was created.

Fixes: ca783612e7
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11092>
2021-06-07 22:05:42 +00:00
Timur Kristóf
93b1089d19 radv: Remove duplicate code for getting GS info.
This was my mistake for forgetting to delete this code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11092>
2021-06-07 22:05:42 +00:00
Alejandro Piñeiro
50907105f9 v3d/simulator: get rid of has_gca wrapper
We can assume that it is always present on 3.3 and below. In fact,
recent updates of the simulator will remove it, so this change would
be needed soon.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11040>
2021-06-07 21:52:20 +00:00
Alejandro Piñeiro
646a8338b1 v3d/simulator: hw mem is now an v3d_size_t, typedef to uint32_t
It would be really awesome to be able to write this so it would work
with old and new versions of the simulator, but I was not able to do
that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11040>
2021-06-07 21:52:20 +00:00
Jason Ekstrand
c9bbf75195 ttn: Stop manually managing system_values_read
There's no point in duplicating all the ops here.  The caller should run
nir_gather_info if they want system_values_read.  Hand-rolling it all in
tgsi_to_nir is just asking for bugs.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11222>
2021-06-07 21:04:35 +00:00
Andres Gomez
996a6564cf ci: update some radv trace checksums
After 7d23ea20a0 ("radv: don't allocate DCC predicate if the image doesn't use DCC")
some checksums for the radv driver remained to be updated.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11223>
2021-06-07 20:45:55 +00:00
Rob Clark
da4bd551a3 frontend/dri: Fix fence-fd logic
We can't ask for a fence fd if we don't pass PIPE_FLUSH_FENCE_FD.  Also
don't leak fences.

Fixes: abec42c9a3 ("gallium/dri: implement EGL_KHR_mutable_render_buffer")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11202>
2021-06-07 20:14:25 +00:00
Rob Clark
964efdfba9 egl+libsync: Add check for valid fence-fd
Debugging fd mix-ups (ie. where, possibly via close()ing the original
fd, etc, you end up with something that is a valid fd but not a valid
*fence* fd) can be difficult.  Fortunately we can use the FILE_INFO
ioctl, which will return an error if the fd is not a fence fd.

For android, we instead use the libsync API, which does a similar thing
on modern kernels, but has a fallback path for older android kernels.

Note that the FILE_INFO ioctl has existed upstream since at least prior
to destaging of sync_file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11202>
2021-06-07 20:14:25 +00:00
Rob Clark
bfeff2c687 egl: zero is a valid fd
We shouldn't be using RETURN_EGL_EVAL() for eglDupNativeFenceFDANDROID()
return, as (while perhaps unlikely) zero is a valid fd.  The error case
for EGL_NO_NATIVE_FENCE_FD_ANDROID is already handled in egl_dri2.c
(dri2_dup_native_fence_fd()) so just use RETURN_EGL_SUCCESS() instead.

Also fix ret type.

Fixes: 0201f01dc4 ("egl: add EGL_ANDROID_native_fence_sync")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11202>
2021-06-07 20:14:25 +00:00
Kenneth Graunke
a588cda75a iris: Add a BO_ALLOC_SMEM flag for allocating from system memory
Most allocations will want to be in device local memory (if it exists),
so we default to LMEM in the absence of a flag.  However, some buffers
are expected to be read/written from the CPU multiple times, and we may
want to explicitly place those buffers in system memory.

This patch adds the infrastructure for deciding on the allocation,
and sets the flags, but does not actually hook up the flag to do
anything, as the kernel infrastructure for LMEM support hasn't landed.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Kenneth Graunke
ab49063f44 iris: Only use SET/GET_TILING when exporting/importing BOs
In the past, we tracked bo->tiling_mode and bo->stride, and used
GEM_{GET,SET}_TILING on all buffers we allocated.  This made more sense
in the old days (long before iris even existed) when we used GTT maps to
detile resources.  However, that support is now gone, and we never used
it in iris anyway.  We don't need to do this in most cases anymore.

We are trying to deprecate these kernel APIs.  They have many issues.
One is having a global tiling mode for a buffer when userspace may
want to suballocate multiple resources with different tiling modes
from the same object.  Another is...what if processes want to interpret
the data differently, and hot-swap the tiling mode out from under
another process?  Another is the fundamental race conditions.  There
are many reasons not to use these APIs.

Unfortunately, there is still one case where it's used: when importing
and exporting DMABUFs, we have to communicate the tiling somehow.  The
right way to do that is using modifiers, but those didn't always exist,
and aren't always enabled (maybe aren't even commonly enabled).  So we
use GET/SET_TILING as a poor-man's IPC mechanism of sorts.

This patch stops calling those APIs in general but continues doing so
for imported/exported objects when we don't have modifiers.

We eliminate iris_bo_alloc_tiled entirely.  There is now only one!

One small behavioral change snuck in: iris_memobj_create_from_handle
now aligns the virtual address to 64K rather than 1B when modifiers
aren't present.  This should be harmless, and lets us delete a whole
bunch of code.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Kenneth Graunke
32c5d6d1dc iris: Add an alignment parameter to iris_bo_alloc()
This is rarely useful, but after the next patch removes tiling tracking,
this would literally be the only difference between iris_bo_alloc and
iris_bo_alloc_tiled, so we may as well add it.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Kenneth Graunke
539494e767 iris: Add a flags argument to iris_bo_alloc()
Based on a patch by Rafael Antognolli.

We already had a flags parameter, but omitted it from the simple alloc
interface because most callers were passing 0.  However, we'll want to
use it for selecting between device local memory and system memory, and
possibly mmap cacheability modes, in the future.  At that point, many
more callers will want to specify, so I think we should include flags
in iris_bo_alloc() as well.

A few places used the iris_bo_alloc_tiled() function simply to pass
flags, so this patch converts them to use iris_bo_alloc() instead now
it does everything they want.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Jason Ekstrand
9e0fd49858 intel/fs/ra: Fix payload node setup for SIMD16 on Gen4-5
Since 40e1d798c6, we are now using physical register numbers for
everything which makes it all simpler.  In particular, we no longer need
the special case for setting up the payload for SIMD16 on Gen4-5.  This
fixes a pile of piglit tests on ILK and similar.

Fixes: 40e1d798c6 "intel/fs: Use ra_alloc_contig_reg_class()..."
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11221>
2021-06-07 16:52:19 +00:00
Roman Stratiienko
8621bd8d5e android: Add scripts to build using meson
How to use:
- For GALLIUM drivers:
1. Add gallium drivers into your board.mk file:
board.mk:
    BOARD_MESA3D_USES_MESON_BUILD := true
    BOARD_MESA3D_GALLIUM_DRIVERS := lima panfrost v3d

2. Add the following packages into your device.mk file:
device.mk:
    PRODUCT_PACKAGES += \
        libEGL_mesa \
        libGLESv1_CM_mesa \
        libGLESv2_mesa \
        libgallium_dri \
        libglapi

- For VULKAN drivers:
1. Add single vulkan driver into your board.mk file:
board.mk:
    BOARD_MESA3D_USES_MESON_BUILD := true
    BOARD_MESA3D_VULKAN_DRIVERS := freedreno broadcom

2. Add the following package configuration into your device.mk file:
device.mk:
    PRODUCT_PACKAGES += \
       vulkan.freedreno
    PRODUCT_PROPERTY_OVERRIDES += \
       ro.hardware.vulkan=freedreno

- To build 'libgbm' set definition in the board.mk:
    BOARD_MESA3D_BUILD_LIBGBM := true
  And add a package to the device.mk:
    PRODUCT_PACKAGES += libgbm

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10183>
2021-06-07 16:04:15 +00:00
Roman Stratiienko
016e932cda meson: egl: Do not build platform_drm for Android
'platform_android' wasn't designed to coexist with 'platform_drm' within
single build, therefore a lot of conflicts appears during compile-time.

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Mauro Rossi <issor.oruam@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10183>
2021-06-07 16:04:15 +00:00
Erik Faye-Lund
45814b58c1 docs: update master -> main in edit-links
Since the move from master to main, our "Edit on GitLab" links on
docs.mesa3d.org has been pointing to the wrong branch.

Let's fix this, so we don't confuse users who want to contribute
changes.

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11160>
2021-06-07 14:45:39 +00:00
Erik Faye-Lund
eea4c98f6d st/pbo: use correct type for images and textures
Not all hardware can treat float, uint and sint samplers and images the
same way, so we need to respect the format-types here.

This has the added benefit of making sure sint and uint data doesn't
get copied through a float, which might mess with signaling nan
encodings.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11164>
2021-06-07 12:13:32 +00:00
Erik Faye-Lund
baf4b05aad zink: use a macro for spir-v versions
Instead of repeating constants over and over, let's use a macro for the
SPIR-V version definition instead.

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>
2021-06-07 12:00:15 +00:00
Erik Faye-Lund
263ec2fd2a zink: only enable vote if we can support it
We can only support subgroup vote if we have support for SPIR-V 1.3 or
later.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>
2021-06-07 12:00:15 +00:00
Erik Faye-Lund
990ed280d0 zink: calculate spir-v version based on vk version
This moves the previous check up to the screen-creation, making it
possible to enable features based on the SPIR-V version.

The reason we want to be able to do this, is so we can force specific
SPIR-V versions, in order to work around bugs in tools.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>
2021-06-07 12:00:15 +00:00
Erik Faye-Lund
cae50a52e2 zink: allow to specify any spir-v version to nir_to_spirv
This will hopefully helps making it easier to override the SPIR-V
version we emit, in case some drivers or tools have issues with too
recent SPIR-V versions.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>
2021-06-07 12:00:15 +00:00
Erik Faye-Lund
fb83477a58 zink: rename spirv_15 bool to spirv_1_4_interfaces
To make it a bit easier to follow what's going on here, rename the
"spirv_15" boolean to "spirv_1_4_interfaces", and add a comment about
what it's all about.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11044>
2021-06-07 12:00:15 +00:00
Erik Faye-Lund
28c842e4b7 zink: limit images we mark as cube-compatible
The Vulkan spec says the following:

> If imageType is VK_IMAGE_TYPE_2D and flags contains
> VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT, extent.width and extent.height
> must be equal and arrayLayers must be greater than or equal to 6

This makes a lot of sense, as these are also requirements for being able
to create cubemaps from them in the first place.

Let's thread a bit more careful, and only set this bit in these cases.
This matters in the new case of setting this flag on 2D array textures.
In the other cases, this should already be the case.

I haven't seen this trigger any issues, I just realized this while
reading the Vulkan-spec.

Fixes: 1887ff2ebb ("zink: mark 2d-arrays as cube-compatible")
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11081>
2021-06-07 11:47:17 +00:00
Iago Toral Quiroga
6f504b5fc6 v3dv: fix incorrect render area setup
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4875
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11158>
2021-06-07 11:25:22 +00:00
Iago Toral Quiroga
4886773fc0 v3dv: implement VK_KHR_descriptor_update_template
Relevant tests:
dEQP-VK.binding_model.*.with_template.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11213>
2021-06-07 11:10:49 +00:00