Commit graph

20094 commits

Author SHA1 Message Date
Rhys Perry
7de3552f3f radv: don't mask PS epilog spi_shader_col_format with dual source blending
In case the FS only writes one output.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40005>
2026-03-05 09:38:24 +00:00
Rhys Perry
b4dc39f632 ac/nir: fix when both dual source outputs are unwritten
When this is the case. we shouldn't hang or crash.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40005>
2026-03-05 09:38:23 +00:00
Rhys Perry
82420ebc2c aco: fix PS epilog dual-source blending with only one color output
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40005>
2026-03-05 09:38:23 +00:00
Samuel Pitoiset
783c065f3b radv: always fast-clear non-MSAA color image with comp-to-single on GFX10-10.3
Some checks are pending
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This should enable fast-clear for color images with the GENERAL layout
on GFX10-10.3. This seems important because DXVK tends to use that
layout more often now.

There are still issues with MSAA images, so it's only enabled for
single-sampled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40145>
2026-03-05 08:34:43 +00:00
Samuel Pitoiset
9de465da81 radv: remove radv_disable_depth_storage drirc
This was only for TW3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40214>
2026-03-05 07:55:27 +00:00
Samuel Pitoiset
74defc5f24 radv: disable STORAGE for depth-only formats
This is actually not needed because nobody is using storage with
depth-only formats and compression doesn't work at all anyways.

PAL and native don't allow this either.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40214>
2026-03-05 07:55:26 +00:00
Marek Olšák
f421eecebe radv,radeonsi: PA_SC_BINNER changes for gfx12
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40022>
2026-03-04 21:14:56 +00:00
Marek Olšák
22f3761579 radv: make radv_postprocess_binary_config more correct and more readable
- don't set fields that don't exist on some generations
- add gfx_level checks for MEM_ORDERED even when it's technically not needed

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40022>
2026-03-04 21:14:56 +00:00
Marek Olšák
fd6941650c ac: add ac_cu_info::has_fmask, adjust FMASK checks
Some of these should check has_fmask, others should check < GFX11.

v2: move to ac_cu_info

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40022>
2026-03-04 21:14:56 +00:00
Marek Olšák
4cfe08e583 ac: set the correct number of Z planes for ALLOW_EXPCLEAR
This is an old driver bug that could cause Z corruption on gfx8-11.5.

v2: handle allow_expclear differently

Cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> (v1)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v2)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40022>
2026-03-04 21:14:56 +00:00
Marek Olšák
fae7aef5ca ac: tidy up ac_hw_cache_flags
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40022>
2026-03-04 21:14:56 +00:00
Marek Olšák
18bcfbe1b3 ac/llvm: encode LLVM cache flags manually
so that ac_hw_cache_flags doesn't have to match LLVM

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40022>
2026-03-04 21:14:56 +00:00
Marek Olšák
ed131f6347 ac/gpu_info: handle more VRAM types
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40022>
2026-03-04 21:14:56 +00:00
Samuel Pitoiset
37ba573877 radv/meta: set the depth/stencil resolve region depth to 1
Some checks are pending
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No 3D.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40135>
2026-03-04 15:12:54 +00:00
Samuel Pitoiset
4d3549d372 radv/meta: rework the barrier for depth/stencil resolves
Yes, COLOR_ATTACHMENT_WRITE_BIT can be used to synchronize ds resolves.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40135>
2026-03-04 15:12:54 +00:00
Samuel Pitoiset
e7d135ae51 radv/meta: optimize synchronization with compute resolves
It's only required to synchronize at the end, so that all compute
resolves can run in parallel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40135>
2026-03-04 15:12:53 +00:00
Samuel Pitoiset
fc0c3f6d84 radv/meta: remove an useless barrier before color resolves with graphics
No reason to require a barrier either because there is already one
before doing resolves and decompressions should already be correctly
synchronized.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40135>
2026-03-04 15:12:53 +00:00
Samuel Pitoiset
c9c16d62dd radv/meta: remove an useless barrier after color resolves with graphics
The app must synchronize with
VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40135>
2026-03-04 15:12:52 +00:00
Samuel Pitoiset
421b15cd3a radv/meta: remove redundant barriers in vkCmdResolveImage2()
The source image layout must be either TRANSFER_SRC or GENERAL and the
application must emit the image layout transition. There is no reason
the source image wouldn't be readable by shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40135>
2026-03-04 15:12:52 +00:00
Kovac, Krunoslav
ed6a576533 amd/vpelib: Apply external CSC
Some checks are pending
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[WHY]
3x4 matrix passed in as part of 3DLUT compound.
Due to HW limitations of coeffs, hdr_mult may need to be used.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40210>
2026-03-04 13:17:26 +08:00
Agate, Jesse
852b85ed48 amd/vpelib: Visual Confirm Fix
[WHY]
VPE Visual confirm hanging with color format output due to misalignment.
VPE Visual confirm hanging with performance mode.

[HOW]
Adjust bg segment generation
Adjust per op programming and reset second pipe mux.

Signed-off-by: Roy Chan <roy.chan@amd.com>
Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40210>
2026-03-04 13:16:57 +08:00
Leder, Brendan Steve (Brendan)
4f93449774 amd/vpelib: Add missing JFIF enum
[WHY & HOW]
Currently missing RGB JFIF enum for switch case - add it in
Also updated unit test to pass

Signed-off-by: Brendan Steve Leder <BrendanSteve.Leder@amd.com>
Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40210>
2026-03-04 13:16:57 +08:00
Shih, Jude
3b86244d2e amd/vpelib: Gate assertion on debug flag
add debug flag assert_when_not_support condition for
assert

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Jude Shih <Jude.Shih@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40210>
2026-03-04 13:16:57 +08:00
Ali, Nawwar
264ee40149 amd/vpelib: Move shaper and 3D LUT updates to vpe_color_update_movable_cm
Refactor shaper normalization and 3D LUT initialization logic from
vpe_calculate_shaper() to vpe_color_update_movable_cm() for proper
sequencing. Remove unused vpe_shaper_generator() declaration.

Signed-off-by: Nawwar Ali <nawwar.ali@amd.com>
Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40210>
2026-03-04 13:16:57 +08:00
Hsieh, Mike
db51152100 amd/vpelib: Move feature skip after buffer size return
[WHY]
Feature skip should not perform in buffer size return case.

[HOW]
Move feature skip call after checking for none buffer size return case.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40210>
2026-03-04 13:16:57 +08:00
Agate, Jesse
e270075d50 amd/vpelib: Predication fix
Cmd buffer size and original start adress should be restored after
predication command has been added

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Jesse Agate <Jesse.Agate@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40210>
2026-03-04 13:16:57 +08:00
Zhao, Jiali
e130e430b7 amd/vpelib: Re-enable new feature support check
[WHY]
Re-enable new feature support check and fix test-item crash bug

[HOW]
move blending support check into num_streams loop, test-item in
num_streams is 0 so that to fix the crash bug.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Jiali Zhao <Jiali.Zhao@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40210>
2026-03-04 13:16:57 +08:00
Chan, Roy
f1ff697dbe amd/vpelib: add a new cap to differentiate scaler coeff handling
[Why]
Issue found when playing video with GDS.
The caller doesn't know if external coefficient should be generated or
not.
To match mm shader handling, it was using external coefficients.

New policy is to follow shared scaler handling with DCN.

[How]
- Introduce a new cap to tell if it is preferred to have external
coefficients.
- For Scaling limit, as supporting 6:1 was not conclusive with GDS,
It is going to have the same behavior as before - 4:1

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Roy Chan <roy.chan@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40210>
2026-03-04 13:16:57 +08:00
Chuanyu Tseng
7d5aeda5ff Revert "amd/vpelib: Adding new wrapper for register profiling"
This reverts commit d42268f3e5.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40210>
2026-03-04 13:15:39 +08:00
Timothy Arceri
73bc604128 glsl: relax precision matching on unused uniforms ES
Some checks are pending
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0886be09 ("glsl: Allow precision mismatch on dead data with GLSL ES 1.00")
allowed precision mismatches on uniforms, however if you lower precision on
16-bit consts, then this error triggers instead.

So here we relax the type matching and just make sure we match int vs
float.

Fixes: 0886be09 ("glsl: Allow precision mismatch on dead data with GLSL ES 1.00")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5337
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40107>
2026-03-03 22:03:18 +00:00
Karol Herbst
db6394babc ac/llvm: handle int8 inside ac_build_optimization_barrier
Rusticl wants to support more subgroup operations and with CL they use
8bit integer sources as well.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37169>
2026-03-03 16:31:31 +00:00
Rhys Perry
a5f63424c7 ac/gpu_info: print most of ac_compiler_info
Some checks are pending
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Excluding fields which are copied in ac_gpu_info.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:12 +00:00
Rhys Perry
5c3b5688a1 amd: rename ac_cu_info to ac_compiler_info
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:12 +00:00
Rhys Perry
ab4b3b7737 ac/nir/ngg: add ac_cu_info shortcut
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:12 +00:00
Rhys Perry
a65089dfce ac/nir: pass ac_cu_info to ac_nir_compute_tess_wg_info
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:11 +00:00
Rhys Perry
8801ca188d ac/nir: don't pass radeon_info to ac_nir_set_options
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:10 +00:00
Rhys Perry
5a8a7dbb22 ac/nir: don't pass radeon_info to NGG lowering
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:09 +00:00
Rhys Perry
36feec61c8 ac/nir: use ac_nir_lower_ngg_options for ac_nir_lower_ngg_mesh
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:09 +00:00
Rhys Perry
2c7b8e6786 ac/gpu_info: move some NGG flags to ac_cu_info
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40042>
2026-03-03 08:50:09 +00:00
Georg Lehmann
9f1a446107 ci: update expectations
Some checks are pending
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40138>
2026-03-02 15:24:36 +00:00
Samuel Pitoiset
27b6ad994a radv: fix computing pitch/slice_pitch for compressed block formats
Also there is no need to multiply for dividing later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
a4d0249a57 ac/sdma: rework and fix metadata for SDMA7
It depends whether the src or dst are compressed or not.

This fixes a bunch of VKCTS failures on RADV/GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
67c985d754 radv: mark linear images for SDMA as potentially compressed on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
e6e305988c ac,radv,radeonsi: merge tiled/linear surfaces into one struct
This will be used to rework/fix metadata config on SDMA7.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
f351a3582a ac/parse_ib: fix parsing some packets on SDMA7
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
1a695d50b2 radv: tidy up determining 3D alignment for SDMA
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
afc261d43a radv: remove redundant radv_sdma_surf::micro_tile_mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
cc21e61e43 radv: fix copying images with different swizzle modes on SDMA7
Swizzle modes must match on SDMA7 (GFX12), and the micro tile mode
doesn't exist.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Samuel Pitoiset
cba085cbe5 ac/sdma: fix pitch assertion for SDMA7
Pitch is 16-bit on SDMA7.

This fixes a couple of VKCTS tests when the transfer granularity is
forced to be 1,1,1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40121>
2026-03-02 14:44:14 +00:00
Rhys Perry
17b18496f6 aco: perform dce for blocks skipped for process_block()
We might need to DCE users of dead instructions removed by
process_block().

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 9e8ba10447 ("aco/vn: remove dead instructions early")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40091>
2026-03-02 13:38:16 +00:00