Corbin Simpson
e23e93b7b4
r300-gallium: Actually do framebuffer setup.
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Can't believe this wasn't wired up.
2009-03-06 19:07:53 -08:00
Corbin Simpson
fc96ac3c04
r300-gallium: Make sure registers are inside BEGIN/END CS.
2009-03-06 19:07:53 -08:00
Corbin Simpson
7e45d68d4d
r300-gallium: Separate out fog block.
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We'll never actually use fog block. (I hope.)
2009-03-06 19:07:53 -08:00
Brian Paul
0945b78244
glsl: call the program optimizer
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This still needs more testing bug glean and Mesa GLSL tests seem OK.
2009-03-06 16:21:21 -07:00
Brian Paul
e60b3067d8
i965: check if we run out of GRF/temp registers
...
Before this change we would up emitting instructions with invalid register
numbers. This typically (but not always) hung the GPU. For now, just
prevent emitting bad instructions to avoid hangs. Still need to do some
kind of proper error recovery.
2009-03-06 16:21:21 -07:00
Brian Paul
d42cfa6e6e
mesa: added _mesa_read_shader() function to read shaders from files
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Useful for debugging to override an application's shader.
2009-03-06 16:21:21 -07:00
Brian Paul
2eacc4aafa
i965: bump up BRW_EU_MAX_INSN
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This is the size of the intermediate instruction buffer.
2009-03-06 16:21:20 -07:00
Brian Paul
82f1c0be13
mesa: add new program optimizer code
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This is pretty simplistic for now, but helps with certain shaders.
2009-03-06 16:21:20 -07:00
Brian Paul
faae1994c9
i965: comments
2009-03-06 16:21:20 -07:00
Brian Paul
f874dc6395
i965: comments and minor clean-ups
2009-03-06 16:21:20 -07:00
Brian Paul
5cbd1170da
i965: avoid unnecessary calls to brw_wm_is_glsl()
...
This function scans the shader to see if it has any GLSL features like
conditionals and loops. Calling this during state validation is expensive.
Just call it when the shader is given to the driver and save the result.
There's some new/temporary assertions to be sure we don't get out of sync
on this.
2009-03-06 16:21:20 -07:00
Maciej Cencora
99e4809f5d
r300: fix depth write regression (found by Nicolai Haehnle)
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Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06 22:19:44 +01:00
Maciej Cencora
0828bfaa45
r300: enable EXT_fog_coord extension
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Remove fixed function fog setup.
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06 22:19:44 +01:00
Maciej Cencora
7ad7abc4cd
r300: route fog coord and W pos correctly
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Also cleanup sw tcl vertex buffer setup
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06 22:19:43 +01:00
Maciej Cencora
d8b8fb6895
r300: rewrite and hopefully simplify RS setup
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Testing and regression fixes by Markus Amsler
Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06 22:19:43 +01:00
Maciej Cencora
25dfbb03f8
r300: add few macros for RS setup
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Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06 22:19:43 +01:00
Maciej Cencora
ee56c5e73b
r300: silence valgrind
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Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06 22:19:43 +01:00
Maciej Cencora
3fa6a6df75
r300: Print reg address when debugging is enabled
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Signed-off-by: Nicolai Haehnle <nhaehnle@gmail.com>
2009-03-06 22:19:43 +01:00
Keith Whitwell
185ff38895
fp: add some more texture, position and kill tests
2009-03-06 21:15:19 +00:00
Keith Whitwell
2dd9a0197c
fp: new kill + position test
2009-03-06 21:00:18 +00:00
Keith Whitwell
52a68b9078
fp: dont reference fragment.position.zw
2009-03-06 21:00:18 +00:00
Keith Whitwell
b258320dbd
engine: also print fps data to stdout
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Useful for figuring out how much of a perf impact the glBitmap fps
display has on a given driver.
2009-03-06 21:00:18 +00:00
Maciej Cencora
005ad1a71d
r300: don't crash on sw tcl hw if point size vertex attrib is sent
2009-03-06 21:55:12 +01:00
Corbin Simpson
9c3796417f
r300-gallium: GA enhancements.
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Basically an errata fixup register.
2009-03-06 11:28:08 -08:00
Corbin Simpson
17331a77f6
r300-gallium: Flat/smooth shading state.
2009-03-06 11:17:55 -08:00
Corbin Simpson
d965c15777
r300-gallium: Pick up a few more bits of rs_state.
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Including two registers that already should have been covered...huh...
2009-03-06 10:30:15 -08:00
José Fonseca
0bbcb47901
wgl: Check support for all other depth/stencil formats.
2009-03-06 18:04:25 +00:00
José Fonseca
78071fe767
wgl: Choose a supported S8Z24/Z24S8/X8Z24/Z24X8.
2009-03-06 18:04:25 +00:00
Jeremy Huddleston
7817fea0b6
Updated darwin config for when X11 is not in the same location as we're installing to
2009-03-06 11:21:45 -05:00
José Fonseca
8bbb6b352a
mesa: Reads must also be done with lock held.
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Otherwise two threads might think each made the refcount go zero.
2009-03-06 14:03:04 +00:00
José Fonseca
f6159ba4d5
mesa: Fix typo.
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Windows threads block if one over-unlocks them.
2009-03-06 14:03:04 +00:00
Eric Anholt
19e134051c
intel: Fix bpp setting of blits to 8bpp targets.
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This was causing hangs in cairogears, as we would blit to the 8bpp target
(A8 texture) as 16bpp, and stomp over state objects.
2009-03-05 23:43:43 -08:00
Eric Anholt
d0ec7c109c
i965: fix 3DPRIMITIVE batch decode of the vertex count field.
2009-03-05 19:42:19 -08:00
Eric Anholt
cade74e3f4
i965: Stop dumping programs after the first all-zeroes entry.
2009-03-05 19:42:18 -08:00
Eric Anholt
40bc2748c2
intel: Add always_flush_batch driconf option for making small batchbuffers.
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This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller
batchbuffers.
2009-03-05 19:42:18 -08:00
Eric Anholt
f3687284c1
intel: Add always_flush_cache driconf option for debugging cache flush failure.
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I keep wanting to hack this knob in as a one-time thing, so it seemed useful
to have all the time.
2009-03-05 19:42:17 -08:00
Eric Anholt
9882695052
i965: Add a note about why the _NEW_STENCIL is required in draw_buffers.
2009-03-05 19:42:17 -08:00
Eric Anholt
f085147258
intel: Remove a gratuitous MI_FLUSH after clearing with a blit.
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The 3D destination shares the same cache so we don't have any trouble with
the later commands needing the writes flushed inside of the same batchbuffer.
2009-03-05 19:42:16 -08:00
Eric Anholt
0d31e340f8
i965: Remove dead flushing code.
2009-03-05 19:42:16 -08:00
Joel Bosveld
8acca48cd5
st/xorg: Install to XORG_DRIVER_INSTALL_DIR
2009-03-06 01:31:49 +01:00
Brian Paul
9ffc1784b4
i965: comments and formatting fixes
2009-03-05 17:25:25 -07:00
Brian Paul
3485801978
i965: fix emit_math1() function used for scalar instructions
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Instructions such as RCP, RSQ, LOG must smear the result of the function
across the dest register's X, Y, Z and W channels (subject to write masking).
Before this change, only the X component was getting written.
Among other things, this fixes cube map texture sampling in GLSL shaders
(since cube lookups involve normalizing the texcoord).
2009-03-05 17:25:25 -07:00
Brian Paul
be8c0b25ea
mesa: added some assertions
2009-03-05 17:25:25 -07:00
Brian Paul
f787baff80
mesa: when printing src regs, use |reg| for absolute value
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And check opcode number to avoid crashing on driver-private opcodes.
2009-03-05 17:25:25 -07:00
Brian Paul
ee41bb2ed0
i965: fix screen depth test in intel_validate_framebuffer)_
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front_region may be null.
2009-03-05 17:25:25 -07:00
Brian Paul
20f49252e1
i965: init dest reg CondMask = COND_TR (the proper default)
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Plus fix up a debug printf.
2009-03-05 17:25:25 -07:00
Corbin Simpson
0b723b8b89
r300-gallium: Move RS block setup to CSO.
2009-03-05 12:41:54 -08:00
Corbin Simpson
ac2acda036
r300-gallium: Move scissor state.
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Keep it grouped with all the other parameterized state.
2009-03-05 12:41:54 -08:00
Corbin Simpson
626ac95335
r300-gallium: Fix up vertex count.
2009-03-05 12:41:53 -08:00
Corbin Simpson
a3b168df48
r300-gallium: Use only one CS section for vertex_format.
2009-03-05 12:41:53 -08:00