Commit graph

139082 commits

Author SHA1 Message Date
Connor Abbott
3c8a5d7e17 ir3: Rework outputs
Instead of using a separate outputs array, make the "end" instruction
(or chmask) take the outputs as sources. This works better for the new
RA, because it better models the fact that outputs are consumed all at
the same time. With the old model, each output collect would be assumed
dead after it was processed and subsequent collects could use it when
inserting shuffle code, which wouldn't work, and the new RA also deletes
collect instructions after lowering them to moves so the information
would be gone after RA.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10591>
2021-05-03 19:52:31 +00:00
Connor Abbott
dd55bd8f68 ir3: Make predecessors an array
We need a stable order in order to create phi instructions. In the
future we can make this more sophisticated in order to make manipulating
the CFG easier, but for now that only happens after RA, so we won't have
to worry about it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10591>
2021-05-03 19:52:31 +00:00
Connor Abbott
0bd68b8386 ir3: Refactor nir->ir3 block handling
Originally I wrote this to support multiple ir3 blocks per NIR block,
but this turned out to be more useful for creating a stable ordering to
the predecessors. We compute the predecessors ourselves, rather than
relying on NIR, so that the array of predecessors we create in the next
commit has a stable order we can rely on when creating phi nodes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10591>
2021-05-03 19:52:31 +00:00
Connor Abbott
d28b22374c ir3/cp_postsched: Fixup SSA use pointer for direct reads
There's an optimization here to sink direct (i.e. not relative) reads of
an array past unrelated direct writes. However, since each write
actually reads, modifies, and then writes again to the array, this means
that we need to read the latest updated array. The old RA used the array
id instead of the SSA information, so it didn't care, but the new RA
uses ->instr instead and ignores the array id because arrays are now SSA
so it needs to be correct.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10591>
2021-05-03 19:52:31 +00:00
Connor Abbott
40a1c4ba2d ir3/postsched: Fix ir3_postsched_node::delay calculation
This wasn't using the same calculation that add_reg_dep() was using to
get the index into state->regs, so it was using the wrong register. Fix
this by folding it into add_reg_dep().

This shouldn't fix anything, because it's just used for scheduler
priorities, but it should reduce nop's and syncs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10591>
2021-05-03 19:52:31 +00:00
Connor Abbott
4b41ffc231 ir3/delay: Remove special case for array deps
The case it was trying to handle (array read-after-write depedendencies)
is already handled by the normal SSA source handling, so this is just
useless.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10591>
2021-05-03 19:52:31 +00:00
Connor Abbott
873e21f4e9 ir3/postsched: Use correct src index
Match what ir3_delay_calc() does. Caught by an assert later.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10591>
2021-05-03 19:52:31 +00:00
Connor Abbott
af7f29a78e ir3/sched: Use correct src index
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10591>
2021-05-03 19:52:31 +00:00
Connor Abbott
7df7bab03b ir3/cp: Clone registers for compare-folding optimization
Sharing the same register between instructions happened to work with the
old RA, but not with the new RA because they may get different register
assignments.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10591>
2021-05-03 19:52:31 +00:00
Connor Abbott
e597f8b122 ir3/postsched: Fix dependencies for a0.x/p0.x
a0.x is written as a half-reg, but just interpreting it as "hr61.x" will
result in it overlapping with r30.z in merged mode, which is not what
the hardware does at all. This introduced a spurious dependency on
a write to r30.z which resulted in an assert tripping. Just pretend it's
a full reg instead.

This fixes
spec@arb_tessellation_shader@execution@variable-indexing@vs-output-array-vec3-index-wr-before-tcs
with the new RA.

Fixes: 0f78c32 ("freedreno/ir3: post-RA sched pass")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10591>
2021-05-03 19:52:31 +00:00
Alyssa Rosenzweig
3ddc7c0e15 panfrost: Remove old dEQP workaround
Nobody else needs it.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10589>
2021-05-03 19:29:30 +00:00
Adam Jackson
f5d6a1b916 Revert "glx: s/Display */struct glx_display */ over internal API"
This broke texture-from-pixmap in OBS Studio so I must have done
something wrong and also we need better tfp testing.

This reverts commit b02b26b87c.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4718
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10593>
2021-05-03 15:00:41 -04:00
Danylo Piliaiev
ea72be8b7c ir3: do not fold cmps from different blocks with non-null address
Scheduling don't like address being in the different block from
the instruction.

Fixes a crash in the trace of "War Thunder" (DX11)

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10355>
2021-05-03 17:25:05 +00:00
Mike Blumenkrantz
457a030b87 iris: fix indirect drawid
iteration needs to be added to the offset now

Fixes: dae3113c3d ("gallium: split drawid out of pipe_draw_info and as a separate draw_vbo param")

Tested-by: Mark Janes <markjanes@swizzler.org>

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10555>
2021-05-03 17:13:18 +00:00
Jason Ekstrand
94c1e65de9 intel/eu: Set message subtype properly for SIMD8 FB fetch
There were two bugs which crep in here as part of 64551610d1:
forgetting that exec sizes in HW are in log2 space and having the
exec_size condition for the subtype backwards.

Fixes: 64551610d1 "intel/compiler: rework message descriptors..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10588>
2021-05-03 15:30:41 +00:00
Alyssa Rosenzweig
0ec27d02e1 panfrost: Don't unroll loops in GLSL
GLSL loop analysis is trouble. Just use NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
8a4e735506 pan/bi: Workaround *V2F32_TO_V2F16 erratum
Exact conditions this workaround is needed unknown. Determined
experimentally.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
daeb3507c2 pan/bi: Don't schedule clamps to +FADD.v2f16
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
b88cb49e4b pan/bi: Add and use bi_negzero helper
-0.0 is the additive identity in IEEE 754 arithmetic, not +0.0!

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
2a0060e63d pan/bi: Lower swizzles on CLPER
Needed for vectorized FP16 derivatives.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
998cbe13d4 pan/bi: Fix loads and stores smaller than 32 bits
Spiritual successor to Icecream95's patch of the same name.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Icecream95
0ca7926bb6 pan/bi: Replace lane0 modifier with lane_dest for load instructions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Icecream95
b361a806bb pan/bi: Add "lane_dest" modifier
Similar to the "lane" modifier, but for the instruction destination
instead the sources.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
5fe4f245a5 pan/bi: Implement vectorized int downcasts
Just MKVEC but needs the usual special handling.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
caebca4aa7 pan/bi: Improve assert for vector size errors
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
2f4bb3d6b9 pan/bi: Fix 16-bit fsat
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
d43c0f35ff pan/bi: Implement vectorized f32_to_f16
f2f16 needs special treatment since it can access multiple 32-bit words.
Corresponds to the two-op instruction V2F32_TO_V2F16.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
1fb681e51d pan/bi: Emit int CSEL instead of float by default
Will be needed when we use 1-bit booleans.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
cf2d575d63 pan/bi: Support 16-bit load_interpolated_input
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
d35075a7be pan/bi: Union modifiers from across variants
itertools.groupby depends on sorting, so this code was quietly broken on
cases like FADD.v2f16.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
394f3f8b74 pan/bi: Simplify Python expression
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
68c4a30434 pan/bi: Don't reference nir_lower_mediump_outputs
Nonexistant.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
1cb11969be pan/bi: Add simple constant folding pass
Cleans up swizzle lowering, and will be used for other cleanup as
well (fancy texturing tends to create a lot of foldable code).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
84756b980c pan/bi: Don't reference uninit source in ATOM_C1
Causes it to be live throughout the shader, causing register allocation
failures on some dEQP-GLES31 shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Alyssa Rosenzweig
f9070f937f pan/bi: Add missing sr_count to pseudo-atomics
Fixes missing prints for these.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
2021-05-03 15:10:20 +00:00
Rhys Perry
d918a59d15 radv,ac/llvm: use a dword alignment for descriptor loads
RADV doesn't try to keep anything 16 or 32 byte aligned. RADV also seems
to create better code for some reason.

fossil-db (Sienna Cichlid):
Totals from 37693 (30.93% of 121873) affected shaders:
SGPRs: 1762792 -> 1785504 (+1.29%); split: -1.01%, +2.30%
VGPRs: 1761032 -> 1760808 (-0.01%); split: -0.09%, +0.07%
SpillSGPRs: 55793 -> 56011 (+0.39%); split: -3.49%, +3.88%
SpillVGPRs: 16766 -> 16387 (-2.26%); split: -3.99%, +1.73%
CodeSize: 82902228 -> 82781608 (-0.15%); split: -0.29%, +0.14%
Scratch: 3024896 -> 2987008 (-1.25%); split: -3.08%, +1.83%
MaxWaves: 919794 -> 920302 (+0.06%); split: +0.09%, -0.03%

shader-db (Sienna Cichlid):
Totals from affected shaders:
SGPRS: 3976 -> 3976 (0.00 %)
VGPRS: 3392 -> 3392 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 178792 -> 178980 (0.11 %) bytes
Max Waves: 1389 -> 1389 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4715
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10543>
2021-05-03 14:52:40 +00:00
Connor Abbott
3d5c1c4989 tu: Fix SP_GS_PRIM_SIZE for large sizes
Based on the previous commit.

Fixes: 012773b ("turnip: Configure VPC for geometry shaders")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
2021-05-03 14:06:24 +00:00
Connor Abbott
e7b7908f87 freedreno/a6xx: Fix SP_GS_PRIM_SIZE for large sizes
This fixes a few piglit hangs.

Fixes: 0eebedb ("freedreno/a6xx: Emit program state for GS")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
2021-05-03 14:06:24 +00:00
Connor Abbott
0157076982 freedreno/a6xx: Better document SP_GS_PRIM_SIZE
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
2021-05-03 14:06:24 +00:00
Bas Nieuwenhuizen
edc600d025 radv: Only require DRM 3.23.
Turns out kernel 4.15 only goes up to amdgpu 3.23 . 3.35 is way
too new. Too new for e.g. ChromeOS.

Fixes: 1df4f11eb5 ("radv: require DRM 3.35+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4728
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10576>
2021-05-03 13:55:48 +00:00
Michel Zou
ff58ea7d91 vulkan/wsi: avoid wsi_x11_check_for_dri3 for sw device
Disabling the check allows swapchains to be created on a remote
X Server using the xlib backend, which in turn allows Vulkan apps,
such as swapchain_images in Vulkan Samples, to run.

Closes #4323

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10349>
2021-05-03 13:33:08 +00:00
Antonio Caggiano
a67ea63718 panfrost: Fix invalid conversions
When compiling with a C++ compiler, invalid conversions are treated as
errors unless the fpermissive flag is provided. These changes fix all
invalid conversions encountered while including libpanfrost in a C++
project.

Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10468>
2021-05-03 13:17:08 +00:00
Alyssa Rosenzweig
a976101da5 nir/opcodes: Reword confusing comment
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10578>
2021-05-03 12:51:47 +00:00
Samuel Pitoiset
12a00da800 radv/winsys: fix executing huge secondary command buffers on GFX6
If the secondary has a list of CS buffers, it should be copied to
the primary.

Fixes dEQP-VK.api.command_buffers.record_many_draws_secondary_2.

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10547>
2021-05-03 12:59:21 +02:00
Samuel Pitoiset
92f5ab55f4 radv/winsys: add GFX6_MAX_CS_SIZE instead of using a magic value
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10547>
2021-05-03 12:58:32 +02:00
Tony Wasserka
741e84f554 aco/spill: Fix improper handling of exec phis
The "continue" was placed in the wrong loop, leading to exec being
counted as a spilled register when it wasn't.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: a56ddca4e8 ('aco: make all exec accesses non-temporaries')
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4533
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10486>
2021-05-03 10:31:07 +00:00
Karol Herbst
0c591ace9e nvc0: fix implicit-fallthrough gcc warning
gcc warning:
../src/gallium/drivers/nouveau/nvc0/nvc0_screen.c: In function ‘nvc0_screen_get_compute_param’:
../src/gallium/drivers/nouveau/nvc0/nvc0_screen.c:623:7: warning: this statement may fall through [-Wimplicit-fallthrough=]
  623 |       switch (obj_class) {
      |       ^~~~~~
../src/gallium/drivers/nouveau/nvc0/nvc0_screen.c:634:4: note: here
  634 |    case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE: /* l[] */
      |    ^~~~

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10544>
2021-05-03 10:21:05 +00:00
Karol Herbst
99d4b13a32 nv50/query: fix stringop-overflow gcc warning
gcc warning:
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c: In function ‘nv50_hw_metric_get_query_result’:
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c:140:26: warning: ‘sm11_hw_metric_calc_result’ accessing 64 bytes in a region of size 32 [-Wstringop-overflow=]
  140 |    *(uint64_t *)result = sm11_hw_metric_calc_result(hq, res64);
      |                          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c:140:26: note: referencing argument 2 of type ‘uint64_t *’ {aka ‘long unsigned int *’}
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c:105:1: note: in a call to function ‘sm11_hw_metric_calc_result’
  105 | sm11_hw_metric_calc_result(struct nv50_hw_query *hq, uint64_t res64[8])
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10544>
2021-05-03 10:21:05 +00:00
Icecream95
64246c3ae4 panfrost: Split panfrost_batch_submit to prevent stack overflows
panfrost_batch_submit can recurse to hundreds of levels to submit
dependencies, so split the actual submit code from the dependency
recursion, saving over a kilobyte of stack space per recursion
level. Enforce this with ATTRIBUTE_NOINLINE.

Use ATTRIBUTE_NOINLINE on panfrost_batch_submit itself as well to
prevent GCC from inlining the function into itself, which would use a
few hundred bytes of stack.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10574>
2021-05-03 08:58:58 +00:00
Samuel Pitoiset
8b31092bcd radv: only keep concurrent MSAA images compressed if TC-compat CMASK
Otherwise, we need a FMASK_DECOMPRESS which is only supported
on the gfx queue.

Fixes rendering with Forza Horizon 4 on Polaris10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10482>
2021-05-03 08:38:31 +00:00