Commit graph

117584 commits

Author SHA1 Message Date
Samuel Pitoiset
3aa71a61dd amd/registers: add missing TBA registers on GFX6-GFX8
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
2020-08-24 11:08:24 +00:00
Erik Faye-Lund
5e841e8b4f nir: add iabs-lowering code
Microsoft's DXIL is based on LLVM, which doesn't have an integer ABS
opcode, but instead needs it lowered to NEG + MAX. We need to do this
with an option, to prevent an already existing optimization rule from
undoing this.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5211>
2020-08-24 10:02:47 +00:00
Eric Engestrom
9e5e3be412 egl: drop invalid shebang
This file exports a variable that is then used in a python script,
but it can never be executed by itself, so having a shebang here
makes no sense.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6166>
2020-08-22 11:47:42 +00:00
Jason Ekstrand
32dc71b23a clover: Call clang with -O0 for the SPIR-V path
SPIRV-LLVM-Translator isn't really built for handling optimized LLVM IR.
It tends to fall over when, for instance, an optimization generates an
i96 type which isn't legal in SPIR-V.  Pass -O0 to avoid these cases.
See https://github.com/KhronosGroup/SPIRV-LLVM-Translator/issues/203.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6432>
2020-08-22 00:27:07 +00:00
Jason Ekstrand
e3e45e2456 clover/spirv: Don't call llvm::regularizeLlvmForSpirv
writeSpirv() already takes care of that, and calling it twice seems to
duplicate functions and cause problems when processing execution modes.

Fixes: 2043c5f37c "clover/llvm: Add functions for compiling from..."
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6306>
2020-08-21 23:18:08 +00:00
Jason Ekstrand
c84e2784eb intel/nir: Allow splitting a single load into up to 32 loads
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
2020-08-21 22:49:54 +00:00
Jason Ekstrand
febe762246 intel/fs: Fix an assert in load_scratch
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
2020-08-21 22:49:54 +00:00
Jason Ekstrand
63dd1e980c iris: Always re-upload sysvals when we have kernel inputs
They can change on every dispatch and clover never gives us a heads up.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
2020-08-21 22:49:54 +00:00
Jason Ekstrand
b4b39b802b iris: Normalize all compute shaders to MESA_SHADER_COMPUTE
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
2020-08-21 22:49:54 +00:00
Jason Ekstrand
d0a8ad77e9 iris: ref/unref the GLSL type singleton in screen_create/destroy
Otherwise, we can run into trouble if the driver is dynamically loaded
via pipe-loader.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
2020-08-21 22:49:53 +00:00
Jason Ekstrand
b9678aa17d iris: Stop advertising clover-only caps
Both of these are clover-only caps.  We don't really support clover and,
even if we did, the number of address bits is wrong and we definitely
don't support the CL path for images.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
2020-08-21 22:49:53 +00:00
Jason Ekstrand
6ec286935a iris: Stop advertising PIPE_SHADER_IR_NIR_SERIALIZED
This prevents clover from trying to initialize and crashing.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6405>
2020-08-21 22:49:53 +00:00
Karol Herbst
4fd2a45267 clover/nir: add support for global invocation id offsets
v2: create variables only once

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Karol Herbst
47e52d84ea nir: fix nir_variable_create for kernels
We ended up with INTERP_MODE_SMOOTH but we really just want to have NONE.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Jesse Natalie
368e9a0b54 spirv: Use new global invocation offset system value
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Jesse Natalie
d3faac7a15 nir: Add options to nir_lower_compute_system_values to control compute ID base lowering
If no options are provided, existing intrinsics are used.
If the lowering pass indicates there should be offsets used for global
invocation ID or work group ID, then those instructions are lowered to
include the offset.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Jesse Natalie
2e1df6a17f nir: Move compute system value lowering to a separate pass
The actual variable -> intrinsic lowering stays where it is, but
ops which convert one intrinsic to be implemented in terms of
another have moved.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Erik Faye-Lund
58074143f5 compiler/nir: make lowering global-id to local-id optional
For D3D12, we don't want to lower this, as there's a dedicated global-id
system-value that might be faster to use, depending on the hardware.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Jesse Natalie
41e4eb9948 nir: Add new system values and intrinsics for dealing with CL work offsets
New intrinsics are added for global invocation IDs and work group IDs to
deal with offsets in both. The only one of these that needs a system value
is global invocation offset, for CL's get_global_offset().

Note that CL requires very large work group sizes, so these intrinsics
are modified to be able to use 64bit values, for 64bit SPIR-V.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Jesse Natalie
6b1515cb84 nir: Populate some places where existing system values were missing
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
Chia-I Wu
ca7d66e847 virgl: update protocol headers
Copied from virglrenderer.  Some in-development features are guarded by
VIRGL_RENDERER_UNSTABLE_APIS and they should not be used without knowing
the consequences.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6235>
2020-08-21 18:38:44 +00:00
Chia-I Wu
42e29feb8b virgl: move protocol headers to a common place
Tested with meson.  Android.mk changes are not tested.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6235>
2020-08-21 18:38:44 +00:00
Lepton Wu
a4c708dd24 util/ralloc: fix ralloc alignment.
On some malloc implementation, malloc doesn't always align to 16
bytes even on 64 bits system. To make sure ralloc_header always
starts at the wanted alignment, just force the size to be aligned at
the alignment of ralloc_header. This fixes crashed on instruction
like "movaps %xmm0,0x10(%rax)" which requires aligned memory access.

Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6314>
2020-08-21 18:22:21 +00:00
Charmaine Lee
fd7e1ed86d svga: fix draw elements with 8-bits indices
With commit 2122b902b8, u_index_translator can return U_TRANSLATE_MEMCPY
for 8-bits indices, and in this case we need to call the translation function
instead of a simple passthrough to the device.

Fixes piglit spec@nv_primitive_restart tests.

Fixes: 2122b902b8 "gallium/indices: don't expand prim-type for 8-bit indices"

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6414>
2020-08-21 18:14:06 +00:00
Charmaine Lee
f41848a9df winsys/svga: fix display corruption after surface_init
When we initialize the buffer surface, do not map the existing storage
with DONTBLOCK, leave it as a synchronized map.
This patch also sets the surface rebind flag after it is bound to a
new buffer and sets the surface buffer pointer accordingly.

This fixes display corruption issue seen with running steam.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6415>
2020-08-21 18:04:44 +00:00
Charmaine Lee
090239ea6b st/mesa: increase size of gl_register_file bitfields
Bump up the size of the bitfields for gl_register_file type for MSVC.
Also add ASSERT_BITFIELD_SIZE check where this bitfield is used.

Fixes spec@arb_shader_atomic_counter_ops tests in MSVC.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6417>
2020-08-21 17:44:47 +00:00
Karol Herbst
e5899c1e88 nir: rename nir_op_fne to nir_op_fneu
It was always fneu but naming it fne causes confusion from time to time. So
lets rename it. Later we also want to add other unordered and fne, this is
a smaller preparation for that.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6377>
2020-08-21 17:26:21 +00:00
Rhys Perry
85b7403909 bifrost: use nir_intrinsic_has_type
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6402>
2020-08-21 16:47:00 +00:00
Rhys Perry
2133e64203 aco: use nir_intrinsic_has_access
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6402>
2020-08-21 16:47:00 +00:00
Rhys Perry
7530f66c16 nir: add and use nir_intrinsic_has_ helpers
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6402>
2020-08-21 16:47:00 +00:00
Rhys Perry
9c1e0d86a8 aco: fix non-rtz pack_half_2x16
We were using the wrong conversion opcode. The high bits are also not
zero'd on GFX10, which can cause v_cvt_pk_u16_u32 to clamp.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: df645fa369 ('aco: implement VK_KHR_shader_float_controls')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6346>
2020-08-21 16:30:26 +00:00
Danylo Piliaiev
e802bff69e glsl: Eliminate out-of-bounds triop_vector_insert
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

 "In the subsections described above for array, vector, matrix and
  structure accesses, any out-of-bounds access produced undefined
  behavior.... Out-of-bounds writes may be discarded or overwrite
  other variables of the active program."

Fixes crashes when dereferencing gl_ClipDistance and gl_TessLevel*, e.g:

  int index = -1;
  gl_ClipDistance[index] = -1;

When LowerCombinedClipCullDistance is true.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6363>
2020-08-21 15:00:51 +00:00
Danylo Piliaiev
5922d57a18 glsl: Eliminate assigments to out-of-bounds elements of vector
Several optimization paths, including constant folding, can lead to
indexing vector with an out of bounds index.

Out-of-bounds writes could be eliminated per spec:

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

"In the subsections described above for array, vector, matrix and
 structure accesses, any out-of-bounds access produced undefined
 behavior.... Out-of-bounds writes may be discarded or overwrite
 other variables of the active program."

Fixes piglit tests:
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-1
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-6

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6363>
2020-08-21 15:00:51 +00:00
Danylo Piliaiev
e93979ba59 ir_constant: Return zero on out-of-bounds vector accesses
Several optimization paths, including constant folding, can lead to
accessing an ir_constant vector with an out of bounds index.

Return 0 since GL_ARB_robustness and GL_KHR_robustness encourage
us to do so.

Fixes piglit tests:
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-2
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-4
spec@glsl-1.20@execution@vector-out-of-bounds-access@fs-vec4-out-of-bounds-5

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2604
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6363>
2020-08-21 15:00:51 +00:00
Ricardo Quesada
b243a74768 anv: support fd==-1 in ImportSemaphoreFdKHR
If fd==-1 is passed in ImportSemaphoreFdKHR, instead of importing the
fd, in creates an already signaled syncobj.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6427>
2020-08-21 13:53:53 +00:00
Samuel Pitoiset
f153151730 aco: add ACO_DEBUG=force-waitcnt to emit wait-states
Sounds useful for debugging missing wait-states and for improving
detection of the faulty instruction in case of memory violations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6386>
2020-08-21 13:22:58 +02:00
Samuel Pitoiset
f811ddf5d1 radv: ignore BB labels when splitting the disassembly string
Ignore everything that is not an instruction. This should fix
the annotated UMR disassembly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6387>
2020-08-21 10:34:22 +02:00
Tapani Pälli
89b56f1941 anv: take depth in to account in anv_GetImageSubresourceLayout
Fixes dEQP-VK.image.subresource_layout.3d* tests on gen9.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6400>
2020-08-21 05:57:12 +00:00
Caleb Callaway
3dd1a81aa0 iris: Add missing newline to debug log message
Without this newline, log messages get lumped together on a single line,
making the debug log difficult to read.

Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6413>
2020-08-21 01:42:31 +00:00
Jesse Natalie
42d7bbfc22 nir: Use 'unsigned' instead of enum types in nir_variable::data
MSVC treats enums as signed, so storing values that use the topmost
bit of the explicitly sized field loads as a negative value instead.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6393>
2020-08-20 22:22:06 +00:00
Jason Ekstrand
1ccd681109 nir: Add an LOD parameter to image_*_size
The OpenCL image_width/height/depth functions have variants which can
take an LOD parameter.  More importantly, LLVM-SPIRV-Translator always
generates OpImageQuerySizeLod even if the LOD is guaranteed to be zero.
Given that over half the hardware out there has an LOD field for image
size queries (based on a rudimentary scan through their NIR -> whatever
code), we may as well just add the source to the NIR intrinsic.  If this
is ever a problem for anyone, the lowering is pretty trivial.

I've also added asserts to everyone's drivers that should alert them if
they ever see an LOD other than zero.  This will never happen with GL or
Vulkan so there's no need for panic.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6396>
2020-08-20 20:48:10 +00:00
Arcady Goldmints-Orlov
a104902590 broadcom/compiler: Enable PER_QUAD for UBO and SSBO loads.
Helper invocations need to be able to read from UBOs since those values
can be used for flow control, but writes from helper invocations need to
be dropped.

Fixes CTS tests:
  dEQP-VK.glsl.derivate.*.uniform_loop.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6356>
2020-08-20 20:14:14 +00:00
Arcady Goldmints-Orlov
c3258f927c broadcom/compiler: Add a constant folding pass after nir_lower_io
The nir_lower_io pass produces a bunch of constant arithmetic, and
assumes that constant folding will simplify it away.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6356>
2020-08-20 20:14:14 +00:00
Arcady Goldmints-Orlov
bd87cdad18 broadcom/compiler: support nir_intrinsic_load_sample_id
This adds support for the intrinsic as well as the vir_SAMPID
instruction that corresponds to it in vir.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6356>
2020-08-20 20:14:14 +00:00
Karol Herbst
adda97c98b clover/spirv: pass list of supported extensions to the translator
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5038>
2020-08-20 19:48:12 +00:00
Pierre Moreau
a624faeef9 clover/nir: Register callback for translation messages (v2)
This allows us to add SPIR-V to NIR translation failure messages to the
program’s compilation log, which can then be queried by the user.

v2: Replace the if-statement in `debug_function()` with an assert.

Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Serge Martin <edb@sigluy.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5038>
2020-08-20 19:48:12 +00:00
Pierre Moreau
2402466a08 clover/llvm: Use the highest supported SPIR-V version (v4)
v2:
   a) Move `supported_spirv_verssions()` to `spirv::` (Francisco Jerez)
   b) Introduce a `SPV_MAKE_VERSION` macro to avoid making mistakes and
     making it more readable than its uint representation.
v3: Replaced an if-statement with a `std::min()` in
    `spirv::get_spirv_translator_options()` (Karol Herbst)
v4: Turn `SPV_MAKE_VERSION()` into a function (Francisco Jerez)

Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5038>
2020-08-20 19:48:12 +00:00
Pierre Moreau
ec6bad140b clover/spirv: Print linked SPIR-V module if asked
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Serge Martin <edb@sigluy.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5038>
2020-08-20 19:48:12 +00:00
Pierre Moreau
a9ca73730e clover/spirv: Remove unused tuple header
Fixes: 2147386505 ("clover/spirv: Add functions for parsing arguments, linking programs, etc.")
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Serge Martin <edb@sigluy.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5038>
2020-08-20 19:48:12 +00:00
Karol Herbst
e9ddb9b2ae clover/spirv: rework handling of spirv extensions
What extensions we support depends on spirv_to_nir but it doesn't give us a
list. So hardcode one and add extensions we know we support and hit in the
wild.

v2: move into spirv lib

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5038>
2020-08-20 19:48:12 +00:00