Commit graph

224415 commits

Author SHA1 Message Date
Lionel Landwerlin
373ec78bc8 anv: add missing condition to update 3DSTATE_RASTER
update_clip_raster() checks the rasterization sample count.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42249>
2026-06-16 08:21:35 +00:00
Lorenzo Rossi
1a7ee324e4 kraid: Add Foldable and initial tests for OpShiftLop
Add a Foldable trait similar to what is already used in NAK for software
emulation of opcodes, since Mali has many variations like V4I8 that run
the same exact operation independently on each component of the vector,
this commit also adds a FoldableComp trait that lets the implementor
only focus on a single component and automatically implements Foldable.

We also add tests on OpShiftLop as an initial subject, we'll add most of
the arithmetic opcodes as time goes on to have a tight description of
the hardware.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
15d6595a62 kraid: Add basic hw_tests
Add the generic infrastructure to load/store the test data and compile
the shader, along simple tests that use the hw_runner.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
1d171a4174 kraid: Add hw_runner
This is a very small driver that just sends compute jobs to the graphics
card without any of the Vulkan or OpenGL indirections.  For now it only
supports v10-v13 since it's what Kraid is targeting.  Lots of the
low-level code that handles CSF encoding and descriptor handling is in C
foir semplicity (and because there is no genxml equivalent for rust yet).

device.rs also implements a barebone memory-safe Rust abstraction for
mali GPUs, as a treat.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
a3d39ec727 kraid/model: Ensure dyn Model is Send + Sync
We'll need the extra ensurance if we want to share the model across
threads.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
b4b8604fd0 kraid: Add OpIMul
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
83c26dd3a6 kraid/ops: Add a small crate documentation for conventions
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
838ee00c7d kraid: Fix FauRef Display bug
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
cbf450c7ff kraid: Add alloc_vec utility
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
18b425ede5 kraid/ir: Add FauRef UserPage creation utilities
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
fab6bd5a8a kraid/ir: Add SrcMod::fold_u64
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
5f61d83766 kraid/swizzle: Add fold_u64
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
b83297c9a1 compiler/rust/lower_bounded: Add FromIterator impl
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
de432135b4 panfrost: Reorder meson definitions
The compiler will also implement a very small driver that depends
on genxml and libpanfrost, so it needs to be defined after them, but
before clc.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
323d32bb00 panfrost: Separate the compiler from libpanfrost
Previously libpanfrost depended on the panfrost compiler, that was just
used for the pan_disassemble function used to disassemble and print
shaders. We'll need to add a dependency from kraid tests to libpanfrost
and this made things harder due to meson shenanigans.

This commit splits the dependency between libpanfrost and the compiler by
adding the disassembler as a callback, so that the user can provide its
own disassembler.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
7634b2da20 kraid/tests: Edit meson to help rust-analyzer provide IDE suggetsions
If tests are enabled with the same name as the original crate two entries
are placed in rust-project.json with identical name, rust-analyzer does
not like that, rename tests to "kraid_test" to fix it.

Also, meson rust tests are weird as they directly call rustc --test flag
directly, and rust-project.json does not see any test cfg option.
To have proper code analysis in #[cfg(test)] we need to specify that
option directly in meson (this will mean that rustc will see --test and
--cfg test at the same time, it doesn't seem to mind though)

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Faith Ekstrand
b4e58c2bdb panfrost: Set the rustfmt edition to 2024
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Lorenzo Rossi
0675ce49c5 kraid: Fix out-of-tree build issue
Rust bindgen creates include dependencies that are relative to the
project root, that works perfectly if the build root is inside of the
project root, but breaks when it's a separate directory

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42189>
2026-06-16 07:32:12 +00:00
Valentine Burley
40d4cf7a70 intel/gen: Explicitly declare gen_opcodes_private.h dependency
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
The gen_opcodes custom target generates gen_opcodes.h,
gen_opcodes_private.h, and gen_opcodes.cpp, but idep_gen_opcodes_h only
declared gen_opcodes.h.

Declare gen_opcodes_private.h as well so that generated-header
dependencies are exported correctly to downstream hermetic build systems.

Fixes ninja-to-soong build failures due to missing gen_opcodes_private.h.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42248>
2026-06-16 06:36:04 +00:00
squidbus
a7575d7e98 kk: Respect precomp-compiler options when setting up kk_clc
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42221>
2026-06-15 20:39:44 -07:00
Sagar Ghuge
0b7dd78814 intel: Add debug hook to dump out BVH after update
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
INTEL_DEBUG=bvh_update_as will dump out AS after update pass.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39617>
2026-06-15 18:27:03 -07:00
Sagar Ghuge
5003ddb0a8 anv: Implement update BVH
Felix:
   - Fix typo in the end debug marker for update

Thanks to Kevron, He tested couple of workloads on BMG:

   - Hitman +50.3%
   - F122   +26.8%
   - SOTR   +18%

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39617>
2026-06-15 18:27:03 -07:00
Sagar Ghuge
b00f00a87a intel: Add debug option to dump out parent-child map
This commit adds new debug options to dump out parent-child relationship
map using INTEL_DEBUG=bvh_pcrel_map.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39617>
2026-06-15 18:27:03 -07:00
Sagar Ghuge
fc4458db9e anv: Track leaf block offset map
Track where is each leaf_id encoded in final BVH.
It's a map of leaf_id == final_bvh_offset. This will help us to navigate
the BVH layout in update pass.

Leaf block offset will give us : Leaf id -> bvh block
and parent-child map can be used for: bvh_block -> parent offset.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39617>
2026-06-15 18:27:03 -07:00
Sagar Ghuge
6ef5d17523 anv: Track parent-child map for BVH update
This map stores parent BVH offset for each of their children. This will
help us to walk the BVH layout later in the update pass.

Since we are tracking block indexes, even with 2^32 large BVH size, we
can have 2^26 max indices (each block 64B wide) that leaves us 6 bits in
which we can track child slot index occupancies in parent.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39617>
2026-06-15 18:27:03 -07:00
Sagar Ghuge
1f4b6f21ea anv/rt: Use constant BVH offset instead of pushing
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39617>
2026-06-15 18:27:03 -07:00
Sagar Ghuge
4c9a4abb65 anv/rt: Extract common code in separate header
Extract leaf encoding in encode.h and move some of the helper in
anv_build_helper.h

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39617>
2026-06-15 18:27:03 -07:00
Sagar Ghuge
86db940766 anv: Pass vk_acceleration_structure_build_state as param
Pass vk_acceleration_structure_build_state as parameter to
get_bvh_layout.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39617>
2026-06-15 18:27:03 -07:00
Sagar Ghuge
d9263b617c anv/rt: Skip invalid node in child block count
Previously, we were accounting invalid nodes as well in child block
count which insert holes in the BVH memory.

These holes in the memory would trigger the HW traversal hangs.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40858>
2026-06-16 01:00:55 +00:00
Kenneth Graunke
392ccf3517 intel/nir: Turn load_global_constant into load_global_intel too
This allows us to use immediate offsets for these as well.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42237>
2026-06-16 00:00:02 +00:00
Kenneth Graunke
dde67bbaca intel/nir: Improve address reuse in brw_nir_lower_immediate_offsets
When a base is larger than the supported [min, max] bounds, we were
clamping the base to that range, and adding the rest.  This works,
but it leaves us with a bunch of loads/stores with the same maximum
base, and different iadds for addresses.  This isn't ideal, because
it means that every access has a different iadd.

Instead, flip it around: now we calculate the largest multiple of
(max + 1) which is less than base, and iadd that.  Then the new base
becomes the remaining portion, which is guaranteed to be <= max.

With that, all loads/stores within a maximum-offset window share a
common iadd which can be CSE'd, and use the immediate offset field
for small deltas from there.

Note that this should work for negative offsets beyond the minimum
too; we do calculate a larger negative addition and then flip to
positive immediate offsets.

Cuts 11% of instructions from the first compute shader of
dEQP-VK.ray_query.builtin.rayqueryterminate.comp.aabbs.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42237>
2026-06-16 00:00:02 +00:00
Alyssa Rosenzweig
8f4d469a6a intel, nir: Add {load,store}_global_intel intrinsics
These take a base offset that we can plug into the LSC extended
descriptor immediate.  This is essentially the same improvement that we
made by switching to the ssbo_intel intrinsics.

eliminates spilling in dEQP-VK.ray_query.builtin.rayqueryterminate.comp.aabbs

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42237>
2026-06-16 00:00:02 +00:00
Paulo Zanoni
d3371e22d7 brw: don't preprocess software doubles if opts->softfp64 is not set
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
The Anv driver doesn't ever set opts->softfp64 for the preprocess
stage (anv_shader_preprocess_nir()). The Vulkan preprocess stage is a
"physical device" stage, and softfp64 requires the actual anv_device:
see the comments for the preprocess_nir function pointer inside the
definition of struct vk_device_shader_ops, and the definition of
anv_ensure_fp64_shader().

It is only during anv_shader_compile() that we call
anv_ensure_fp64_shader(), where we actually build and store the
nir_shader we name fp64_nir. Then we have everything ready and we can
call the nir_lower_doubles pass.

To account for all that, just have brw check if opts->softfp64 is
actually set, and disable the full_software lowering if we don't have
it: otherwise we'll either segfault or hit the assert(softfp64) that
is in lower_doubles_instr_to_soft() in nir_lower_double_ops.c.

This prevents a segfault (or an assertion failure when in debug mode)
when running DIRT 5 on Tiger Lake.

Fixes: 7d3b62e13d ("anv: only load fp64 software shader when needed")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42105>
2026-06-15 23:34:04 +00:00
Georg Lehmann
5134104c9c nir/skip_helpers: don't require helpers for non uniform descriptors
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
If the descriptor is allowed to be non uniform, we don't have to
force helpers to keep it uniform.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42232>
2026-06-15 19:23:06 +00:00
Georg Lehmann
78206c06fe nir/skip_helpers: keep descriptors uniform even for stores that skip helpers
Before we only did this for loads, but the same logic applied here too.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42232>
2026-06-15 19:23:06 +00:00
Georg Lehmann
7516487df3 nir/skip_helpers: handle vendored store_scratch
We might as well make sure that those backends don't break on
future use. At least jay will probably use this pass.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42232>
2026-06-15 19:23:06 +00:00
Georg Lehmann
8b53692614 nir/skip_helpers: fix stores with ACCESS_INCLUDE_HELPERS
These need all sources, including the data, to not skip helpers.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42232>
2026-06-15 19:23:06 +00:00
José Roberto de Souza
d3c50442f9 anv: Replace anv_descriptor_set_binding_layout::descriptor_data_sampler_size by a local variable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42023>
2026-06-15 18:33:32 +00:00
José Roberto de Souza
ef26f1a592 anv: Support sampler state of different sizes
A future GPU will have a larger size for the sampler state in GPU, so here
doing the necessary adjustment to support sampler state of any size in run-time.

For now ANV_SAMPLER_STATE_GPU_SIZE is doing a dumb check because without it
compiler will complain that device is not used.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42023>
2026-06-15 18:33:32 +00:00
José Roberto de Souza
0e41204af2 anv: Fix memcpy overflows around sampler state
This issue happens in a couple of places but here main problem:
ANV_SAMPLER_STATE_SIZE is 32 bytes long(no idea why), but SAMPLER_STATE in GPU
is 16 bytes long.

anv_sampler_state::state and anv_sampler_state::state_no_bc has 16 bytes of
storage but in some places we do a mempcy of ANV_SAMPLER_STATE_SIZE bytes, like
in anv_GetDescriptorEXT():
	memcpy(pDescriptor, sampler->state.state[0], ANV_SAMPLER_STATE_SIZE);

So lets replace the magic numbers by macros, have CPU data with ANV_SAMPLER_STATE_SIZE
size and only when copying to GPU copy the exacly size that GPU expects with
ANV_SAMPLER_STATE_GPU_SIZE.

Cc: stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42023>
2026-06-15 18:33:32 +00:00
Alyssa Rosenzweig
2e169746ec nir/opt_dead_cf: delete redundant returns/halts
Cleans up the final halt in
dEQP-VK.rasterization.frag_side_effects.color_at_beginning.terminate_invocation
with the terminate lowering.

O(1) for the function so that's pretty good.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42219>
2026-06-15 18:00:43 +00:00
Alyssa Rosenzweig
9cc686ac72 jay: rewrite demote/terminate/helper/halt handling
* implement terminate
* fix HALT brokenness on all shader stages (we need a real end block)
* optimize demote codegen a ton
* optimize gl_HelperInvocation/gl_SampleMask
* optimize "all lanes demoted" via HALT.any
* optimize scheduling of stores/atomics/demotes in FS
* optimize some texturing with helper invocations

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42097>
2026-06-15 17:29:16 +00:00
Alyssa Rosenzweig
52d4d47edc jay: track skip_helpers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42097>
2026-06-15 17:29:15 +00:00
Alyssa Rosenzweig
483999e954 jay: clang-format
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42097>
2026-06-15 17:29:15 +00:00
Alyssa Rosenzweig
ec29c05907 jay: manually format jay_type_for_glsl_base_type
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42097>
2026-06-15 17:29:15 +00:00
Alyssa Rosenzweig
86ac591a5c jay: autopep8
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42097>
2026-06-15 17:29:15 +00:00
Kenneth Graunke
00aa817892 jay: Implement load_subgroup_size
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42097>
2026-06-15 17:29:15 +00:00
Alyssa Rosenzweig
7e0027444c jay: forbid 8-bit immediate prop
dEQP-VK.renderpasses.renderpass1.depth_stencil_write_conditions.stencil_terminate_initialize_d24unorm_s8ui

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42097>
2026-06-15 17:29:15 +00:00
Alyssa Rosenzweig
7dc69f747f jay: cache message headers locally
this is a little spicier than CSE, but well, the stats speak for themselves.

SIMD16:
   Totals from 1150 (43.45% of 2647) affected shaders:
   Instrs: 1752063 -> 1671121 (-4.62%); split: -4.62%, +0.00%
   CodeSize: 24366528 -> 23326992 (-4.27%); split: -4.28%, +0.01%

SIMD32:
   Totals from 1152 (43.52% of 2647) affected shaders:
   Instrs: 2008124 -> 1922714 (-4.25%); split: -4.27%, +0.02%
   CodeSize: 28563184 -> 27442624 (-3.92%); split: -3.95%, +0.02%
   Number of spill instructions: 12562 -> 12600 (+0.30%); split: -0.02%, +0.32%
   Number of fill instructions: 31496 -> 31545 (+0.16%); split: -0.01%, +0.16%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42097>
2026-06-15 17:29:15 +00:00
Alyssa Rosenzweig
592022f989 jay: remove #include
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/42097>
2026-06-15 17:29:15 +00:00