This hint tells KMD and firmware to turn into low latency but high
power usage mode.
i915 already had it now it was implemented in Xe KMD.
Reviewed-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33214>
This also makes all the paths a bit more clear because we only ever
clflushopt on the clflusopt paths and only ever clflush on the clflush
paths. It's really not much more code or logic duplication.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37803>
The x86 implementation was shamelessly stolen from intel_mem.c and the
aarch64 implementaiton was based on the code in Turnip.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37803>
This was something that came up in the slop MR. Not sure it's actually a
good idea or not but kind of curious what people think, given we have a
sound tool (Coccinelle) to do the transform. Saves a redundant branch
but means extra noninlined function calls.. likely no actual perf impact
but saves some code.
Via Coccinelle patches:
@@
expression ptr;
@@
-if (ptr) {
-free(ptr);
-}
+free(ptr);
@@
expression ptr;
@@
-if (ptr) {
-FREE(ptr);
-}
+FREE(ptr);
@@
expression ptr;
@@
-if (ptr) {
-ralloc_free(ptr);
-}
+ralloc_free(ptr);
@@
expression ptr;
@@
-if (ptr != NULL) {
-free(ptr);
-}
-
+free(ptr);
@@
expression ptr;
@@
-if (ptr != NULL) {
-FREE(ptr);
-}
-
+FREE(ptr);
@@
expression ptr;
@@
-if (ptr != NULL) {
-ralloc_free(ptr);
-}
-
+ralloc_free(ptr);
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [v3d]
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org> [venus]
Reviewed-by: Frank Binns <frank.binns@imgtec.com> [powervr]
Reviewed-by: Janne Grunau <j@jannau.net> [asahi]
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> [radv]
Reviewed-by: Job Noorman <jnoorman@igalia.com> [ir3]
Acked-by: Marek Olšák <maraeo@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Job Noorman <jnoorman@igalia.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37892>
F_DUPFD_QUERY has been introduced in 6.10 exactly for the purpose
of telling if 2 fd points at the same file description so use it
first.
If it's not supported, we'll get r=-1 and errno=EINVAL, and we can
fallback on KCMP or epoll.
Acked-by: Simona Vetter <simona.vetter@ffwll.ch>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34447>
Here we switch to using a sorted arrays for the binary search which
significantly speeds up the lookups. For a shader with ~8000
uniforms its up to 10x faster and the godot-tps-gles3-high.trace
in issue #13894 returns to its original runtime length before we
switched to using range remap in e052254066
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37754>
This creates an array of the linked list elements to be used for
faster binary searches in the following patch, and frees the old
linked list.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37754>
This will allow us to use the linked list for validation of inserts
during linking then switch to using an array for fast binary searches.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37754>
If the ptr value is NULL and we match an existing entry during an
insert call we now just return the existing value. This allows us
to drop an extra lookup, this will become important as the
following patches change `util_range_remap()` lookups to use a
sorted array that is not created until after we have added all
entries to our linked list.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37754>
WSL version 1 has a known limitation that the kernel does not support
the memfd_create() syscall, and it always returns -1 (see
https://github.com/microsoft/WSL/issues/3542). This results in
lavapipe/llvmpipe failing to create the anonymous file it needs for
allocations from the pipe_screen object, which in turn results in
results in failed application calls to Vulkan APIs (in the case I
observed, vkMapMemory returned an invalid (0xffffffff) pointer along
with VK_SUCCESS, leading to the application segfaulting).
This issue can be reproduced by simply running `vkcube` (or, presumably
any other simple Vulkan application) inside WSL 1, e.g.:
xvfb-run -s '-screen 0 1024x768x24' vkcube --c 300
This patch addresses the issue with several changes:
1. llvmpipe_create_screen() now checks for errors from the
os_create_anonymous_file function and errors out early, making it
easier to track down issues similar to this. Previously, the invalid
fd of -1 would be stored in the pipe_screen struct and the problems
would only appear later.
2. os_create_anonymous_file() now attempts to handle the case where
memfd_create() fails, by falling back to creating a file in a
temporary directory. This fallback is the same as is already done for
builds that don't have memfd_create available at build time - note
that the difference here is that this is a _runtime_ fallback, as is
needed for the case of WSL 1.
3. The fallback logic previously relied on the XDG_RUNTIME_DIR
environment variable, which might not be set when running inside WSL
because there is unlikely to be a desktop environment configured.
This patch adds a fallback of creating a new directory inside /tmp in
this case.
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37679>
Coercing the argument to a bool when we have __builtin_expect but
leaving it unmodified otherwise is a recipe for really subtle bugs. I
don't know if any bugs like that exist currently, but I almost
introduced one in panfrost.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37801>
Xwayland seems to mix implicit and explicit sync, depending on client
app. This trips up the heuristic that disables implicit sync once it
starts seeing app using explicit sync. This is not typical behavior,
so add a driconf override to disable the heuristic.
Fixes: 137cd3b0fa ("freedreno/drm: Move no_implicit_sync accounting")
Cc: mesa-stable
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37703>
Here we write the binary search to avoid looping over the list
by keeping track of the mid point entries and moving directly
from the last test point.
Fixes: bf946bcc ("util: add range remap util")
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37386>
I didn't bother switching either iris or elk/hasvk but one could.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37517>
to allow drivers to do more complex printing without needing a subclass
paradigm. To be used on Intel.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37517>
It defines a couple of helpers to deal with signed and unsigned
integers overflow.
If __builtin_add_overflow (and others) intrinics are available
they're used, otherwise overflow checks are done manually.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37331>
Implement retrieving color buffer info via gralloc0. This is a simpler
alternative to imapper4/5 which requires a dependency on libui that
would require a heavy effort to import headers and stub to be able to
build out of tree.
Since VNDK no longer releases headers since API Level 35 and they are
now only auto-generated, copy over the neccessary defines.
Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37185>
Wasn't 100% sure about some of these derivations so let's add tests.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37200>
Many instruction sets (Intel, Apple, NVIDIA) implement bitwise operations with a
single general instruction that takes a lookup table in sum-of-products
(minterms) form. Working with these tables manually is a bit gnarly, and
multiple backends need to do this. This adds common code for representing such
lookup tables with 2- or 3-sources, with a rich set of helpers for building,
inspecting, and manipulating the LUTs.
Eventually, we may want to introduce a nir_op_bitop3 instruction to NIR to build
common code for fusing boolean expression trees into lookup tables. That NIR
pass will presumably use the helpers here.
NAK already has this abstraction internally (in Rust). Possibly NAK will be able
to drop (or cut down) that code once we handle this in NIR.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37200>
We will use this to manipulate lookup tables, but it's a common algorithm.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37200>
Mali GPUs support Z24_UNORM stored on three bytes instead of four. Add
a new format for this case.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37158>
We are about to need new type converters for our AFBC mode selection
logic (AFBC is type agnostic, but we currently accept only UNORM
formats), so let's switch to an autogen solution for the existing ones,
and generate all missing type converters along the way.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37158>
The full workaround can hurt performance and there is no other known
solution. The only one is to select which HiZ WA works the best by
trial and error.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36174>
Introducing this iterator debug information breaks the usecase of removing
elements in the list other than the current element.
Fixes: 372e83b95f
Reviewed-by: Rob Clark <rob.clark@oss.qualcomm.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37061>
This is helpful for the driver to have the option to provide a custom
threshold for the PQ test performed by the graph coloring algorithm.
A threshold lower than the physical number of registers is helpful on
platforms where the number of registers used can impose a limit on the
thread parallelism of the program. In such platforms even though a
passing PQ test guarantees that the node can be pushed onto the stack
and neglected while coloring the remaining nodes, the ordering in
which this happen can have a dramatic effect in the register pressure
of the resulting shader and therefore also on the thread parallelism
of the program.
Setting a P value threshold lower than the real P value will cause
nodes with Q value above the threshold to use the existing optimistic
coloring heuristic that takes the effort of ordering nodes in the
stack by Q value, in order to do a better job at minimizing the total
register requirement of the program. Even though this causes us to
hit the optimistic codepaths for trivially colorable nodes the
interference graph is still guaranteed to be trivially colorable if it
was trivially colorable without the override.
The use of a threshold lower than the real P value will come at a
compile-time performance cost, the specific trade-off between
compile-time and run-time can be adjusted by the driver based on the
number of registers available to each thread without causing a hit to
thread parallelism.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36618>
This lets us control how much logging we want Mesa to do, which is
useful in CI where we don't want to collect lots of log spam that then
has to be saved somewhere.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37203>
