radv: replace RADV_GFX12_HIZ_WA by a drirc option

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36174>
This commit is contained in:
Samuel Pitoiset 2025-09-08 18:38:06 +02:00 committed by Marge Bot
parent 0a2ef363a8
commit 5f8f4686bf
5 changed files with 23 additions and 15 deletions

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@ -1619,19 +1619,6 @@ RADV driver environment variables
``peak``
force GPU clocks to their maximum level, this is the default value
.. envvar:: RADV_GFX12_HIZ_WA
choose the specific HiZ workaround to apply on GFX12 (RDNA4). The possible
values are:
``disabled``
no HiZ workaround is enabled, use at your own risk but optimal for performance
``partial``
mitigate the issue partially, potentially risky but performance should be
mostly optimal (default value)
``full``
mitigate the issue completely, no risk but performance might be decreased
.. envvar:: ACO_DEBUG
a comma-separated list of named flags, which do various things:
@ -1662,6 +1649,19 @@ RADV driver environment variables
``liveinfo``
print liveness and register demand information before scheduling
.. envvar:: radv_gfx12_hiz_wa
choose the specific HiZ workaround to apply on GFX12 (RDNA4). The possible
values are:
``disabled``
no HiZ workaround is enabled, use at your own risk but optimal for performance
``partial``
mitigate the issue partially, potentially risky but performance should be
mostly optimal (default value)
``full``
mitigate the issue completely, no risk but performance might be decreased
RadeonSI driver environment variables
-------------------------------------

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@ -165,6 +165,7 @@ static const driOptionDescription radv_dri_options[] = {
DRI_CONF_RADV_OVERRIDE_UNIFORM_OFFSET_ALIGNMENT(0)
DRI_CONF_RADV_CLEAR_LDS(false)
DRI_CONF_RADV_DISABLE_NGG_GS(false)
DRI_CONF_RADV_GFX12_HIZ_WA()
DRI_CONF_SECTION_END
DRI_CONF_SECTION_DEBUG
@ -258,6 +259,7 @@ radv_init_dri_performance_options(struct radv_instance *instance)
drirc->performance.enable_unified_heap_on_apu = driQueryOptionb(&drirc->options, "radv_enable_unified_heap_on_apu");
drirc->performance.report_llvm9_version_string =
driQueryOptionb(&drirc->options, "radv_report_llvm9_version_string");
drirc->performance.gfx12_hiz_wa = driQueryOptionstr(&drirc->options, "radv_gfx12_hiz_wa");
}
static void

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@ -66,6 +66,7 @@ struct radv_drirc {
bool disable_ngg_gs;
bool enable_unified_heap_on_apu;
bool report_llvm9_version_string;
char *gfx12_hiz_wa;
} performance;
struct {

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@ -2313,11 +2313,11 @@ radv_physical_device_try_create(struct radv_instance *instance, drmDevicePtr drm
pdev->use_hiz = false;
if (pdev->info.gfx_level == GFX12) {
const char *gfx12_hiz_wa_str = getenv("RADV_GFX12_HIZ_WA");
const char *gfx12_hiz_wa_str = instance->drirc.performance.gfx12_hiz_wa;
pdev->gfx12_hiz_wa = RADV_GFX12_HIZ_WA_PARTIAL; /* Default */
if (gfx12_hiz_wa_str) {
if (strlen(gfx12_hiz_wa_str) > 0) {
if (!strcmp(gfx12_hiz_wa_str, "disabled")) {
pdev->gfx12_hiz_wa = RADV_GFX12_HIZ_WA_DISABLED;
} else if (!strcmp(gfx12_hiz_wa_str, "partial")) {

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@ -796,6 +796,11 @@
DRI_CONF_OPT_B(radv_cooperative_matrix2_nv, def, \
"Expose VK_NV_cooperative_matrix2 on supported hardware.")
#define DRI_CONF_RADV_GFX12_HIZ_WA() \
DRI_CONF_OPT_S_NODEF(radv_gfx12_hiz_wa, \
"Choose the specific HiZ workaround to apply on GFX12 (RDNA4). " \
"Accepted values are: disabled, partial or full")
/**
* \brief ANV specific configuration options
*/