Commit graph

99092 commits

Author SHA1 Message Date
Eric Anholt
368bab43fd broadcom/vc5: Add support for loading varyings in V3D 4.1.
The LDVARY signal now writes an arbitrary register, so I took out the
magic src register file and replaced it with an instruction with LDVARY
set so we have somewhere to hang a QFILE_TEMP destination for register
allocation.
2018-01-12 21:57:21 -08:00
Eric Anholt
af9753e246 broadcom/vc5: Update state setup for V3D 4.1. 2018-01-12 21:57:09 -08:00
Eric Anholt
5aaea3c4a0 broadcom/vc5: Add compiler support for V3D 4.x texturing. 2018-01-12 21:56:57 -08:00
Eric Anholt
028f6b327c broadcom/vc5: Add the new TMU write addresses for V3D 4.x (and r5rep).
The V3D 3.x series of TMU writes with meaning depending on the texture
type is replaced with writes to specific registers for each texture
argument semantic.
2018-01-12 21:56:48 -08:00
Eric Anholt
42a35da96d broadcom/vc5: Move V3D 3.3 texturing to a separate file.
V3D 4.x texturing changes enough that #ifdefs would just make a mess of
it.
2018-01-12 21:56:37 -08:00
Eric Anholt
acf30e4916 broadcom/vc5: Move V3D 3.3 VPM write setup to a separate file.
For V4.1 texturing, I need the V4.1 XML, so the main compiler needs to
stop including V3.3 XML.
2018-01-12 21:56:24 -08:00
Eric Anholt
725d73981a broadcom/vc5: Set up depth formats for V3D 4.x.
We no longer have the small depth-specific output format enum, and instead
depth is just at the end of the output image format enum.
2018-01-12 21:56:17 -08:00
Eric Anholt
66f2f3ed97 broadcom/vc5: Always use the RGBA8 formats for RGBX8.
The RGBX8 formats were dropped from V3D 4.x, but we don't really need them
anyway (we already handle other non-alpha formats by forcing A to 1).
2018-01-12 21:56:10 -08:00
Eric Anholt
469bbd8387 broadcom/vc5: Move the formats table to per-V3D-version compile. 2018-01-12 21:56:00 -08:00
Eric Anholt
34898c8c45 broadcom/vc5: Add support for V3D 4.1 CLIF dumping. 2018-01-12 21:55:49 -08:00
Eric Anholt
409696b76e broadcom/vc5: Move the body of CLIF dumping to a per-version file.
I want the library's entrypoints to still be unversioned, but the actual
packet dumping needs to be per-version.
2018-01-12 21:55:38 -08:00
Eric Anholt
90269ba353 broadcom/vc5: Use THRSW to enable multi-threaded shaders.
This is a major performance boost on all of V3D, but is required on V3D
4.x where shaders are always either 2- or 4-threaded.
2018-01-12 21:55:30 -08:00
Eric Anholt
86a12b4d5a broadcom/vc5: Properly schedule the thread-end THRSW.
This fills in the delay slots of thread end as much as we can (other than
being cautious about potential TLBZ writes).

In the process, I moved the thread end THRSW instruction creation to the
scheduler.  Once we start emitting THRSWs in the shader, we need to
schedule the thread-end one differently from other THRSWs, so having it in
there makes that easy.
2018-01-12 21:55:23 -08:00
Eric Anholt
a075bb6726 broadcom/vc5: Implement GFXH-1684 workaround.
Apparently the VPM writes need to be flushed out before we end the shader.
2018-01-12 21:55:15 -08:00
Eric Anholt
57965755e2 broadcom/vc5: Port drawing commands to V3D 4.x.
This required extending the CL submit ioctl, because the tile alloc/state
buffer setup has moved from the BCL to register writes.
2018-01-12 21:55:04 -08:00
Eric Anholt
f50d39ab49 broadcom/vc5: Add a test for .ifb in ADD ops.
I had a .ifb being decoded weird in sampid, so this is to check that .ifb
is fine.
2018-01-12 21:54:57 -08:00
Eric Anholt
267f13dbee broadcom/vc5: Add the new tesselation opcodes in V3D 4.1. 2018-01-12 21:54:50 -08:00
Eric Anholt
edbd817c30 broadcom/vc5: Use a physical-reg-only register class for LDVPM.
This is needed for LDVPM on V3D 4.x, but will also be needed for keeping
values out of the accumulators across THRSW.
2018-01-12 21:54:42 -08:00
Eric Anholt
22a02f3e34 broadcom/vc5: Use the new LDVPM/STVPM opcodes on V3D 4.1.
Now, instead of a magic write register for VPM stores we have an
instruction to do them (which means no packing of other ALU ops into it),
with the ability to reorder the VPM stores due to the offset being baked
into the instruction.

VPM loads also gain the ability to be reordered by packing the row into
the A argument.  They also no longer write to the r3 accumulator, and
instead must be stored to a physical register.
2018-01-12 21:54:33 -08:00
Eric Anholt
55f8a01aca broadcom/vc5: Drop dead VC5_QPU_* defines from qpu_instr.c.
I had all the packing code in this file at one point, but these defines
now live in qpu_pack.c.
2018-01-12 21:54:27 -08:00
Eric Anholt
2bd378647b broadcom/vc5: Add support for QPU pack/unpack/disasm of small immediates. 2018-01-12 21:54:18 -08:00
Eric Anholt
5f227ac210 broadcom/vc5: Enable the driver on V3D 4.1 2018-01-12 21:54:12 -08:00
Eric Anholt
39ce1ab7ba broadcom/vc5: Port the simulator to support V3D 4.1
This required moving the register accesses to a separate v3dx file, since
the register definitions for each V3D version collide.  It seems that
initializing the v3d_hw from a file dictating 3.3
(v3d_simulator_wrapper.cpp) is safe, though.
2018-01-12 21:54:00 -08:00
Eric Anholt
c81cc767e4 broadcom/vc5: Drop signal bit #defines.
Signals are more complicated than that, and tables ended up being better.
2018-01-12 21:53:53 -08:00
Eric Anholt
dfee62eed3 broadcom/vc5: Add support for V3Dv4 signal bits.
The WRTMUC replaces the implicit uniform loads in the first two texture
instructions.  LDVPM disappears in favor of an ALU op.  LDVARY, LDTMU,
LDTLB, and LDUNIF*RF now write to arbitrary registers, which required
passing the devinfo through to a few more functions.
2018-01-12 21:53:45 -08:00
Eric Anholt
81ec2ba229 broadcom/vc5: Fix pack/unpack of vfmul input unpack flags. 2018-01-12 21:53:38 -08:00
Eric Anholt
954a704da3 broadcom/vc5: Port the RCL setup to V3D4.1.
The TLB load/store path is rebuilt in this version.  There is no longer a
single-byte resolved store or the 3-byte extended store.  Instead, you get
to always use general loads/stores (which, honestly, was tempting even in
previous versions).
2018-01-12 21:53:26 -08:00
Eric Anholt
80c84241af broadcom/vc5: Fix per-tile extra clear packet.
I accidentally emitted this into the RCL instead of the per-tile generic
list, so we wouldn't get tiles after the first cleared.
2018-01-12 21:52:02 -08:00
Eric Anholt
f13fe510d1 broadcom/vc5: Move the TLB loads and stores to helper functions.
This is going to get more complicated with V3D 4.1 support, which redoes
all the TLB packets.
2018-01-12 21:51:54 -08:00
Eric Anholt
2c48ce74f7 broadcom/vc5: Convert vc5_cl.h to use the V3DX() macros.
To conditionally compile cl_emit() macros per V3D version, we need it to
expand to whatever V3D we're building for.  This required emitting #define
V3D_VERSION 33 in all our currently 3.3-only code.
2018-01-12 21:51:47 -08:00
Eric Anholt
fb4face86a broadcom/vc5: Introduce v3dx_macros.h and v3dx_pack.h headers.
This will be used by vc5 for prefixing functions and including the pack
header in v3d-version-dependent code, following the model of anv.
2018-01-12 21:51:40 -08:00
Eric Anholt
7dedfd9660 broadcom/cle: Fix error path of missing a "type" in the XML.
We try to emit a #error and continue so that you can debug the missing
type at C compile time, but were missing a couple of definitions in that
path (sigh, python).
2018-01-12 21:51:34 -08:00
Eric Anholt
3d8ad50370 broadcom/vc5: Add XML for V3D v4.1 (BCM7278) 2018-01-12 21:48:07 -08:00
Samuel Pitoiset
0eb30d81c4 ac: add 'const' qualifiers to the shader info pass
For clarification purposes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-12 12:25:21 +01:00
Samuel Pitoiset
20f7f9a328 ac: remove unused ac_nir_compiler_options from gather_info_input_decl()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-12 12:25:19 +01:00
Samuel Pitoiset
d5e369ff8a nir: add a 'const' qualifier to nir_ssa_def_components_read()
To avoid compilation warnings and because this helper
shouldn't update anything.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-12 12:25:17 +01:00
Thomas Hellstrom
897c54d522 loader/dri3: Avoid freeing renderbuffers in use
Upon reception of an event that lowered the number of active back buffers,
the code would immediately try to free all back buffers with an id equal to or
higher than the new number of active back buffers.

However, that could lead to an active or to-be-active back buffer being freed,
since the old number of back buffers was used when obtaining an idle back
buffer for use.

This lead to crashes when lowering the number of active back buffers by
transitioning from page-flipping to non-page-flipping presents.

Fix this by computing the number of active back buffers only when trying to
obtain a new back buffer.

Fixes: 15e208c4cc ("loader/dri3: Don't accidently free buffer holding new back content")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104214
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
Tested-by: Andriy.Khulap <andriy.khulap@globallogic.com>
Tested-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2018-01-12 09:17:35 +01:00
Samuel Iglesias Gonsálvez
e63adf8b1e anv: VkDescriptorSetLayoutBinding can have descriptorCount == 0
From Vulkan spec:

"descriptorCount is the number of descriptors contained in the binding,
accessed in a shader as an array. If descriptorCount is zero this
binding entry is reserved and the resource must not be accessed from
any stage via this binding within any pipeline using the set layout."

Fixes:

dEQP-VK.binding_model.descriptor_update.empty_descriptor.uniform_buffer

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
2018-01-12 07:08:51 +01:00
Roland Scheidegger
734bef372d mesa: require at least 14 UBOs for GL 4.3
ARB_ubo requires 12 UBOs (per stage) at least, but this limit has been
raised by GL 4.3 to 14, so don't advertize GL 4.3 without it (only checking
the vertex stage since all drivers probably have the same limit anyway for
other stages). (piglit has minmax tests for that kind of thing, but they go
only up to 3.3, so this won't really be noticed.)
I think this currently should not affect any driver - r600 until very
recently only supported 12 but now advertizes 14 too.

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-01-12 02:52:10 +01:00
Roland Scheidegger
85377dc55c util: fix NORETURN for msvc, add HAVE_FUNC_ATTRIBUTE_NORETURN to c99_compat.h
We've seen some problems internally due to macro redefinition.
Fix this by adding HAVE_FUNC_ATTRIBUTE_NORETURN to c99_compat.h,
and defining it for msvc.
And avoid redefinition just in case.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2018-01-12 02:52:10 +01:00
Dave Airlie
ad11fc3571 radv: don't emit unneeded vertex state.
If the number of instances hasn't changed and we've already
emitted it, don't emit it again.

If the vertex shader is the same and the first_instance, vertex_offset
haven't changed don't emit them again.

This increases the fps in GL_vs_VK -t 1 -m -api vk from around 40
to around 60 here, it may not impact anything else.

Dieter also reported smoketest going from 1060->1200 fps.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-12 00:43:07 +00:00
Dave Airlie
e37db93246 radv: trim buffer load result (fixes dota2)
Running dota2 since the below commit crashes with an llvm assert.

Trim the vector like the other user. This possible could also be
avoided by not padding inside the load vec3->vec4.

Fixes: 41c36c4549 (amd/common: use ac_build_buffer_load() for emitting UBO loads)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-12 00:41:55 +00:00
Dylan Baker
aca3b647be meson: add variable for including include/GL/internal
Signed-off-by: <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-11 15:40:02 -08:00
Dylan Baker
5fcadaec80 meson: define inc_gbm as empty if not otherwise assigned
Otherwise this could be undefined in the egl directory.

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-11 15:40:02 -08:00
Dylan Baker
a0a764cde5 meson: move libsensors dependency to libgallium
This simplifies the build by removing the need to link targets against
libsensors.

Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-11 15:40:02 -08:00
Dylan Baker
2083a14179 meson: Use dependencies for nir
This creates two new internal dependencies, idep_nir_headers and
idep_nir. The former encapsulates the generation of nir_opcodes.h and
nir_builder_opcodes.h and adding src/compiler/nir as an include path.
This ensures that any target that needs nir headers will have the
includes and that the generated headers will be generated before the
target is build. The second, idep_nir, includes the first and
additionally links to libnir.

This is intended to make it easier to avoid race conditions in the build
when using nir, since the number of consumers for libnir and it's
headers are quite high.

Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-11 15:40:02 -08:00
Dylan Baker
60856a7b49 meson: don't use intermediate variables that are immediately discarded
For things like:
loop
    x = func()
    list += x
end

just do:
loop
    list += func()
end

Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-11 15:40:02 -08:00
Dylan Baker
4ccb981673 meson: Use consistent style for tests
Don't use intermediate variables, use consistent whitespace.

Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-11 15:40:02 -08:00
Dylan Baker
8e981eb2b7 meson: Use include variables
These were added after adderlib was mesonified, but it still good to use
them instead of open coding them.

Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-11 15:40:02 -08:00
Dylan Baker
fbf192a67e meson: Use consistent style
Currently the meosn build has a mix of two styles:
arg : [foo, ...
       bar],

and
arg : [
  foo, ...,
  bar,
]

For consistency let's pick one. I've picked the later style, which I
think is more readable, and is more common in the mesa code base.

v2: - fix commit message

Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-11 15:40:02 -08:00