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Author SHA1 Message Date
Timur Kristóf
3056279d09 radv/amdgpu: Use correct NOP packets when unchaining a CS 
GFX6 doesn't support single-dword PKT3 NOP packets,
so they shouldn't be used when unchaining a CS.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Timur Kristóf
132a61c6b7 radv/amdgpu: Fix crash with RADV_DEBUG=noibs 
After a refactor last year, the noibs option stopped working
because it hits an assertion when empty IBs are submitted.

Emit a single large NOP packet to avoid submitting empty IBs.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37121>
 2025-09-05 13:42:56 +00:00
Christoph Pillmayer
f81f3c85e2 nir/opt_algebraic: Convert a + b + a to b + 2a
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This allows fusing into one FMA later.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37113>
 2025-09-05 11:39:51 +00:00
Samuel Pitoiset
8233d9d571 radv: rename RADV_CMD_DIRTY_FS_STATE to RADV_CMD_DIRTY_PS_STATE
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It's called PS everywhere else.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37087>
 2025-09-05 10:16:20 +00:00
Samuel Pitoiset
f180682441 radv: add a new dirty bit for emitting a PS epilog 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37087>
 2025-09-05 10:16:19 +00:00
Samuel Pitoiset
211e0823ec radv: add a new dirty bit for compiling/binding a PS epilog 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37087>
 2025-09-05 10:16:18 +00:00
Samuel Pitoiset
11e5f86a94 radv: add a function to bind a PS epilog 
The idea would be to separate compiling and emitting PS epilog in
two separate states.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37087>
 2025-09-05 10:16:17 +00:00
Samuel Pitoiset
bc71787ea3 radv: remove unnecessary NULL check when creating PS epilogs 
It's already checked in the caller.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37087>
 2025-09-05 10:16:15 +00:00
Samuel Pitoiset
d771f2c462 radv: add small helper to dispatch RT 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:26 +00:00
Samuel Pitoiset
1b6aad9def radv/meta: use radv_CmdDispatchBase() directly for ASTC decode 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:25 +00:00
Samuel Pitoiset
8ddb06f6e0 radv: trigger VS related states in radv_bind_pre_rast_shader() 
No need to duplicate this.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:24 +00:00
Samuel Pitoiset
c589097999 radv: determine which shader is the last VGT shader using next stage 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:23 +00:00
Samuel Pitoiset
9a93c7c243 radv: simplify sample shading state tracking 
Sample shading can be enabled with PSO or with fragment shaders, but
only the PSO state is bound because it's still possible to access
the FS everywhere during cmdbuf recording.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:22 +00:00
Samuel Pitoiset
cb9c25cbea radv: rename radv_flush_occlusion_query_state() 
To match other emit functions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37141>
 2025-09-05 09:21:21 +00:00
Samuel Pitoiset
7f12f98741 radv: rework the optimal packet order for dispatches 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37013>
 2025-09-05 07:28:14 +00:00
Samuel Pitoiset
62c92a0516 radv: rework the optimal packet order for task/mesh draws 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37013>
 2025-09-05 07:28:13 +00:00
Samuel Pitoiset
f5bbe5228f radv: rework the optimal packet order for "normal" draws 
This idea comes from RadeonSI but RADV was already implementing
something similar. Except that it checked for wait-for-idle but this
shouldn't be necessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37013>
 2025-09-05 07:28:12 +00:00
Samuel Pitoiset
f289e8eddc radv: only expose permitted global queue priorities
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It's the responsability of the application to check for
VK_ERROR_NOT_PERMITTED, but filtering not permitted priorities seems
better.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13775
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37076>
 2025-09-05 06:34:36 +00:00
Samuel Pitoiset
43cba046e6 radv/amdgpu: add a function to query permitted context priorities 
The only way I know of is to create a context to verify if a priority
is permitted or not.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37076>
 2025-09-05 06:34:36 +00:00
Samuel Pitoiset
57deff5658 radv: fix vk_error in radv_update_preambles() 
This needs to be a vk object, otherwise it asserts or crashes.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37179>
 2025-09-05 06:14:49 +00:00
Samuel Pitoiset
44541e84e9 radv: move misc related drirc to radv_drirc::misc 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37145>
 2025-09-05 05:56:17 +00:00
Samuel Pitoiset
8e4d5743d2 radv: move debug related drirc to radv_drirc::debug 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37145>
 2025-09-05 05:56:17 +00:00
Samuel Pitoiset
f13b181791 radv: move performance related drirc to radv_drirc::performance 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37145>
 2025-09-05 05:56:16 +00:00
Samuel Pitoiset
d575b91b3a radv: move features related drirc to radv_drirc::features 
For better organization.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37145>
 2025-09-05 05:56:16 +00:00
Samuel Pitoiset
d915f24cb2 radv: move drirc options to a separate struct 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37145>
 2025-09-05 05:56:15 +00:00
Samuel Pitoiset
d98e31eab6 radv: mark RADV_DEBUG=nongg_gs as deprecated 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37145>
 2025-09-05 05:56:15 +00:00
Samuel Pitoiset
7304423b5c radv: mark RADV_DEBUG=splitfma as deprecated 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37145>
 2025-09-05 05:56:14 +00:00
Samuel Pitoiset
4748ecb238 radv: mark RADV_DEBUG=invariantgeom as deprecated 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37145>
 2025-09-05 05:56:13 +00:00
Samuel Pitoiset
a8a8bfee1f radv: mark RADV_DEBUG=nodynamicbounds as deprecated 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37145>
 2025-09-05 05:56:13 +00:00
Georg Lehmann
83326af899 nir/builder: add nir_inverse_ballot_imm 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
 2025-09-04 14:03:56 +00:00
Georg Lehmann
ef8c364d3d nir: make inverse_ballot 1bit only 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37178>
 2025-09-04 14:03:56 +00:00
Eric Engestrom
d698251e32 radv/ci: document whether ci-tron jobs runs on an APU or a dGPU 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37124>
 2025-09-04 09:47:21 +00:00
Eric Engestrom
1a1e21e725 radv/ci: deduplicate navi10 GPU_VERSION 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37124>
 2025-09-04 09:47:21 +00:00
Yiwei Zhang
94d8a4a465 radv: bind aliased wsi image at memory offset zero 
This aligns with common wsi, and also obeys dedicated alloc requirement.

Fixes: 825c05a7e8 ("radv: adopt wsi_common_get_memory")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37152>
 2025-09-03 16:29:34 +00:00
Rhys Perry
7f5c84d7ac radv: fix shift overflow in radv_pipeline_init_dynamic_state 
Fixes UBSan error with thewitness/005aa77325a11410:
runtime error: left shift of 15 by 28 places cannot be represented in type 'int'

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37055>
 2025-09-03 11:47:00 +00:00
Rhys Perry
1105f7b98f aco: fix signed integer overflow 
Fix UBSan error:
runtime error: signed integer overflow: 2147483647 + 32 cannot be represented in type 'int'

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37055>
 2025-09-03 11:47:00 +00:00
Samuel Pitoiset
6bc70a0e8f radv/ci: remove RADV_DEBUG=novideo for radv-gfx1201-vkcts
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37134>
 2025-09-03 07:19:55 +00:00
Samuel Pitoiset
3cb77cb144 radv/rt: fix a potential issue with RADV_PERFTEST=dmashaders 
Shaders must be synchronized before doing anything.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37126>
 2025-09-03 06:16:14 +00:00
Samuel Pitoiset
decf9af472 radv/rt: only use one user SGPR for the traversal shader addr 
All shaders are allocated in the 32-bit addr space. To avoid an issue
with alignment, and also for future work, there is an unused user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37133>
 2025-09-03 05:53:41 +00:00
Daniel Schürmann
fcf8899c9e radv/rt: use ACCESS_CAN_REORDER when loading SBT entries 
Totals from 56 (0.07% of 79839) affected shaders: (Navi48)

Instrs: 2790220 -> 2790130 (-0.00%); split: -0.00%, +0.00%
CodeSize: 14704952 -> 14704292 (-0.00%)
Latency: 13994383 -> 13953444 (-0.29%); split: -0.29%, +0.00%
InvThroughput: 2717973 -> 2710748 (-0.27%); split: -0.27%, +0.00%
VClause: 68783 -> 68687 (-0.14%)
SClause: 51910 -> 52007 (+0.19%)
Copies: 223192 -> 223190 (-0.00%); split: -0.01%, +0.01%
VALU: 1557513 -> 1557451 (-0.00%); split: -0.00%, +0.00%
VMEM: 118789 -> 118692 (-0.08%)
SMEM: 66498 -> 66595 (+0.15%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36933>
 2025-09-02 19:07:30 +00:00
Pierre-Eric Pelloux-Prayer
cd5f77f6c2 radeonsi: sync harder on finish 
With the threaded submit code, there's a small window where
the fence can be signalled but the buffer lists cleanup code
from amdgpu_cs_submit_ib has not executed yet.

This is harmless in general, because num_active_ioctls is
an optimization.

When the glFinish is called though, it's best to avoid this
inconsistencies because it can create odd behavior as shown
by the flakes being fixed by this commit.
The test runs a query, uses glFinish and expect the results
to be available. Since results availability depends on
num_active_ioctls, it made the test flaky.

Fix this by syncing when PIPE_FLUSH_HINT_FINISH is set.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36930>
 2025-09-02 17:46:46 +00:00
David Rosca
3f317348c2 radv/video: Fix VP9 loop filter and segmentation params 
Fixes: b8ac2d47e7 ("radv/video: add KHR_video_decode_vp9 support.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13801
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37080>
 2025-09-02 10:46:23 +00:00
Daniel Schürmann
441d5aab08 aco/ra: coalesce vector affinities with tied definitions 
Totals from 19310 (24.19% of 79839) affected shaders: (Navi48)

MaxWaves: 564238 -> 564542 (+0.05%); split: +0.06%, -0.01%
Instrs: 10856428 -> 10803360 (-0.49%); split: -0.53%, +0.04%
CodeSize: 56405088 -> 56189384 (-0.38%); split: -0.41%, +0.02%
VGPRs: 986120 -> 985952 (-0.02%); split: -0.50%, +0.48%
Latency: 53956142 -> 53940850 (-0.03%); split: -0.11%, +0.09%
InvThroughput: 8769260 -> 8735595 (-0.38%); split: -0.49%, +0.11%
VClause: 237471 -> 237452 (-0.01%); split: -0.05%, +0.04%
SClause: 225385 -> 225389 (+0.00%)
Copies: 799792 -> 744150 (-6.96%); split: -7.25%, +0.30%
Branches: 208574 -> 208572 (-0.00%); split: -0.00%, +0.00%
VALU: 6116920 -> 6061448 (-0.91%); split: -0.95%, +0.04%
SALU: 1442068 -> 1441990 (-0.01%); split: -0.01%, +0.00%
VOPD: 1914 -> 1744 (-8.88%); split: +0.10%, -8.99%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36851>
 2025-09-02 10:24:27 +00:00
Daniel Schürmann
2f303636f3 aco/ra: consider precolor affinities in get_reg_vector() 
No fossil changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36851>
 2025-09-02 10:24:27 +00:00
Daniel Schürmann
6dbf8f7b90 aco/ra: don't set precolor affinities for already assigned temporaries 
Also don't overwrite existing precolor affinities.

Totals from 248 (0.31% of 79839) affected shaders: (Navi48)

Instrs: 154427 -> 154401 (-0.02%); split: -0.12%, +0.10%
CodeSize: 812880 -> 812568 (-0.04%); split: -0.12%, +0.08%
VGPRs: 12432 -> 12408 (-0.19%)
Latency: 851623 -> 851801 (+0.02%); split: -0.03%, +0.05%
InvThroughput: 156569 -> 156581 (+0.01%); split: -0.04%, +0.05%
VClause: 2672 -> 2681 (+0.34%); split: -0.34%, +0.67%
Copies: 12645 -> 12660 (+0.12%); split: -0.53%, +0.65%
VALU: 82894 -> 82909 (+0.02%); split: -0.08%, +0.10%
SALU: 25406 -> 25424 (+0.07%); split: -0.07%, +0.14%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36851>
 2025-09-02 10:24:26 +00:00
Daniel Schürmann
eb557fd090 aco/ra: add vector_info::index to indicate the Operand's index into the vector 
This simplifies the code and will allow for a mismatch between the index and
the Operand's temporary.

Totals from 28 (0.04% of 79839) affected shaders: (Navi48)

Instrs: 18453 -> 18440 (-0.07%); split: -0.08%, +0.01%
CodeSize: 98588 -> 98532 (-0.06%); split: -0.06%, +0.00%
Copies: 1347 -> 1333 (-1.04%); split: -1.11%, +0.07%
VALU: 10431 -> 10417 (-0.13%); split: -0.14%, +0.01%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36851>
 2025-09-02 10:24:26 +00:00
Martin Roukala (né Peres)
40a632cb18 radv/ci: switch to default kernel to b2c's default kernel 
This brings linux v6.16.3 to most jobs but the following ones:

* navi21/31: still waiting for the zerovram bug fix
* polaris10: 6.16 introduced an sdma-related hang that is being bisected

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37085>
 2025-09-02 07:48:53 +00:00
Samuel Pitoiset
ff0197d44a radv: disable VK_EXT_image_compression_control on GFX12
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This extension is mostly only used by vkd3d-proton to disable DCC for
game bugs. On GFX12 DCC is completely transparent to the userspace
driver, so exposing this extension isn't very useful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37122>
 2025-09-02 06:36:16 +00:00
Samuel Pitoiset
9b90d3fa4d radv: remove unnecessary radv_graphics_pipeline::is_ngg 
Use the last VGT shader to know if it's using NGG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37120>
 2025-09-02 06:18:05 +00:00
Samuel Pitoiset
2ccdae24cf radv: remove set but unused radv_graphics_pipeline fields 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37120>
 2025-09-02 06:18:05 +00:00