Commit graph

3621 commits

Author SHA1 Message Date
Jason Ekstrand
2e730167a4 anv: Implement 1.3 features/properties
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14706>
2022-01-27 16:42:01 +00:00
Caio Marcelo de Oliveira Filho
372faa4a23 anv: SPIR-V 1.6 shaders imply ALLOW_VARYING_SUBGROUP_SIZE
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14706>
2022-01-27 16:42:01 +00:00
Mike Blumenkrantz
fe3984b8cd anv: silence wsi debug logging
this is triggered by mesa's own wsi handling, so stop printing nonsense

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14743>
2022-01-27 13:10:27 +00:00
Nanley Chery
57445adc89 anv: Re-enable CCS_E on TGL+
Commit e614789588 ("anv: Also disallow CCS_E for multi-LOD images")
accidentally disabled CCS_E on TGL+ because it checked for
image->vk.mip_levels > 0 instead of image->vk.mip_levels > 1.

Instead of reverting it, we remove the code which disables CCS_E for
mipmapped or arrayed images now that we've sufficiently handled the
clear color issue in other ways.

Fixes: e614789588 ("anv: Also disallow CCS_E for multi-LOD images")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14723>
2022-01-26 23:34:33 +00:00
Nanley Chery
c48401404c anv: Use ANV_FAST_CLEAR_DEFAULT_VALUE for CCS on TGL+
On TGL, if a block of fragment shader outputs match the surface's clear
color, the HW may convert them to fast-clears (see HSD 14010672564).
This can lead to rendering corruptions if not handled properly. We
restrict the clear color to zero to avoid issues that can occur with:

   - Texture view rendering (including blorp_copy calls)
   - Images with multiple levels or array layers

Fixes: e614789588 ("anv: Also disallow CCS_E for multi-LOD images")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14723>
2022-01-26 23:34:33 +00:00
Nanley Chery
d68b2db89c anv: Disable CCS_E for some 8/16bpp copies on TGL+
CCS_E is currently disabled on TGL+, but we'll enable it soon. We choose
to explicitly disable it for certain copy operations to avoid CTS
failures in the following groups:

- dEQP-VK.drm_format_modifiers.export_import.*
- dEQP-VK.synchronization*

Fixes: e614789588 ("anv: Also disallow CCS_E for multi-LOD images")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14723>
2022-01-26 23:34:33 +00:00
Nanley Chery
09ca089144 anv: Drop assert against modifier with aux on gfx12
Commit b664349973 ("anv: Enable implicit CCS for external images")
introduced support for implicit CCS with I915_FORMAT_MOD_Y_TILED.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14723>
2022-01-26 23:34:33 +00:00
Iván Briano
61ece8f6a4 anv: Enable VK_KHR_dynamic_rendering
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
2022-01-25 18:13:51 -08:00
Iván Briano
5d9e8bc9be anv: implement the meat of VK_KHR_dynamic_rendering
Includes a fake framebuffer allocation that's necessary for the code we
still use from the regular render passes.

v3: (Lionel)
- Reuse the attachment count from the faux render pass, remove now
  unused function
- Add a cmd_buffer_end_rendering function to match begin_rendering,
  making use of the split stuff from end_subpass

v4: (Lionel)
- Don't bother with mark_images_writen or resolves on suspend case
- Remove flush at the end of end_rendering, it's not needed

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
2022-01-25 18:13:51 -08:00
Iván Briano
4ad9ccd28a anv: split end_subpass into more discrete components
v3: Split cmd_buffer_end_subpass instead of doing parts conditionally (Lionel)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
2022-01-25 18:13:51 -08:00
Iván Briano
2f942f3217 anv: Split attachment clearing code into their own functions
v3: Avoid recalculating parameters the caller already had (Lionel)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
2022-01-25 18:13:51 -08:00
Iván Briano
e41436beec anv: allocate fake render pass for continuation command buffers
v4: Assert if there's no VkCommandBufferInheritanceRenderingInfoKHR (Lionel)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
2022-01-25 18:13:51 -08:00
Iván Briano
b32023573d anv: Split out state attachments allocation
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
2022-01-25 18:13:51 -08:00
Iván Briano
5d9aaea31f anv: allocate fake render pass on pipeline creation
v3: (Lionel)
- Handle VkPipelineRenderingCreateInfoKHR not being present
- Rename dynamic_pass and set it for regular render passes too

v4: C99 is good (Lionel)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
2022-01-25 18:13:51 -08:00
Iván Briano
73ed019bec anv: add functions to set up fake render passes
There's two of them because they can be created from three points in the
code that provide different details and this is the least ugly way I
could think of for now.

v2: Avoid allocations (Lionel)

v3: Move definition closer to its usage (Lionel)

v4: (Lionel)
 - Simplify anv_dynamic_pass_init_full
 - Zero out pass/subpass to avoid stall pointers

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
2022-01-25 18:13:51 -08:00
Iván Briano
b18bc028ee anv: Remove unused struct member
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
2022-01-25 18:13:51 -08:00
Jason Ekstrand
6612dcc425 anv/pass: Don't set first_subpass_layout for stencil-only attachments
Cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13980>
2022-01-25 18:13:51 -08:00
Lionel Landwerlin
0513ff6564 anv: verify that the format supports multisampling
We tightened the requirements for multisampling on Gfx7 but didn't
format that at the Vulkan level.

This will break more conformance tests on Gfx7, but we weren't
conformant anyway.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 531b1b7511 ("intel/isl: Strengthen MCS SINT format restriction")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14679>
2022-01-25 11:57:38 +00:00
Thomas H.P. Andersen
73232d000f anv: drop unused label
Added in 053d4c328f
Last usage removed in 0967584549

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14639>
2022-01-24 22:23:33 +00:00
Bas Nieuwenhuizen
3443557364 anv: Remove VK_EXT_display_control support in favor of common impl.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14365>
2022-01-24 12:57:35 +00:00
Rohan Garg
63e91148b7 anv: Enable VK_VALVE_mutable_descriptor_type
This change introduces the anv_descriptor_size_for_mutable_type and
anv_descriptor_data_for_mutable_type helpers to compute the size and
data flags respectively for mutable descriptor types.

In order to make handling these types easier we now store a precomputed
descriptor stride for all types and use in the in appropriate places.

We also need to adjust the compiler to take into account this descriptor
stride. To that extent, we now pack the stride into the upper 16 bits
alongside the index and the dynamic offset index and use it later to
compute the correct offset.

Closes: #4250
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14633>
2022-01-24 12:24:53 +00:00
Jianxun Zhang
e1376b59ef anv: refactor queue chain
Simplify the buffer chaining process with a single loop and
a helper function from Lionel Landwerlin's input.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14578>
2022-01-24 11:53:06 +00:00
Renato Pereyra
4d95a7f800 anv: add helper methods related to enabling CCS for external images
Also, clarify/improve related comments

Signed-off-by: Renato Pereyra <renatopereyra@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14416>
2022-01-20 11:37:29 -08:00
Renato Pereyra
b664349973 anv: Enable implicit CCS for external images
AUX and clear state is stored in the VkDevice private binding

Signed-off-by: Renato Pereyra <renatopereyra@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14416>
2022-01-20 11:37:15 -08:00
Charles Giessen
0988e4ae09 anv: Update LoaderICDInterfaceVersion to v5
With the proper version checking in the common vulkan instance code
(commit 88b9b68) it is now possible to bring the reported interface
version up to v5.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14563>
2022-01-20 07:25:07 +00:00
Dave Airlie
d54c07b4c4 mesa/*: use an internal enum for tessellation primitive types.
To avoid dragging gl.h into places it has no business being,
defined tessellation primitive mode to an enum.

This has a lot of fallout all over the place.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14605>
2022-01-19 21:54:58 +00:00
Lionel Landwerlin
acebea9cf1 anv: fix missing descriptor copy of bufferview/surfacestate content
When doing copies of descriptors from one set to another, that contain
either a UNIFORM_BUFFER or STORAGE_BUFFER, both the buffer view &
surface state are allocated from the source descriptor. Therefore we
need to copy their content otherwise we could run into lifecycle
issues when the source descriptor is destroyed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14585>
2022-01-19 10:40:37 +00:00
Jordan Justen
695ba644ab intel/gem: Return length from intel_i915_query_alloc
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Jordan Justen
f0692365a2 anv,blorp,crocus,i965,iris: Use devinfo->max_threads_per_psd for gfx8+
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13866>
2022-01-19 00:29:35 +00:00
Nanley Chery
fe0a6b9606 anv: Don't fill lowered_storage_image_param on SKL+
The switch statement in anv_descriptor_data_for_type() shows that this
field isn't used on SKL+.

On XeHP, this avoids assert failures by preventing
isl_surf_fill_image_param() from being called. That function doesn't
expect Tile4 surfaces.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14546>
2022-01-14 21:47:48 +00:00
Lionel Landwerlin
e760c5b37b anv: add perfetto source
v2: Increase custom stall data (Felix)
    Fixup build (Felix)

v3: Add API enum (Rohan)
    Fixup old comment (Rohan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
cc5843a573 anv: implement u_trace support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
bb541d1159 intel/blorp: add measure_end entry point
Will be useful to figure out when blorp operations end.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Lionel Landwerlin
02a4d622ed anv: expose a couple of emit helper to build utrace buffer copies
We'll want to copy timestamp buffers when commands buffers are
resubmitted multiple times.

v2: Merge a couple of #if GFX_VER >= 8 (Rohan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
2022-01-14 20:17:44 +00:00
Chia-I Wu
37fa59fa6c anv,lavapipe,v3dv: use wsi_common_get_image
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (anv)
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> (v3dv)
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> (lavapipe)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14544>
2022-01-14 17:41:42 +00:00
Lionel Landwerlin
1027b68418 anv: fix perf queries
We're not saving the first pool.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 36ea90a361 ("anv: Convert to the common sync and submit framework")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14420>
2022-01-13 07:54:22 +00:00
Jianxun Zhang
f43c7185e0 intel: remove chipset_id
The chipset_id should be named after i915 ioctl that's called
to get the device id. In user space this field holds pci device
id in reality. We now have a pci_device_id queried from drm
instead using the ioctl, so there is no much reason to keep
the chipset_id for the same purpose.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
2022-01-13 03:09:36 +00:00
Jianxun Zhang
3414ba9a81 anv: remove private pci fields
These fields are in the base device struct 'intel_device_info' now.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5489

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
2022-01-13 03:09:36 +00:00
Jianxun Zhang
d86989bf73 intel: use PCI info to compute device uuid
With the new input from PCI bus and device fields, we can compute
device uuids in a multi-gpu system.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
2022-01-13 03:09:36 +00:00
Nanley Chery
912acbf963 anv,iris: Flush HDC before color fast clears
Needed for XeHP (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Nanley Chery
f3c629733f anv,iris: PSS Stall Sync around color fast clears
Needed for XeHP (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Nanley Chery
de5f1cdd31 anv,iris: Depth stall around color fast clears
Needed for TGL (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Nanley Chery
34c8371e2a anv,iris: Flush tile cache after color fast clears
Needed for TGL (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
2022-01-12 01:30:34 +00:00
Felix DeGrood
0a01d2c04f anv: increase binding table pool size to 64KB
Binding table pool runs out of capacity quickly on modern games,
requiring new Surface Base Address instructions to be sent. That
is costly due to flushes and stalls.  Increasing BT pool capacity
to 64KB improves performance several workloads.

Fallout4 +4%
Shadow of the Tomb Raider +4%
Borderlands3 +3%

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14483>
2022-01-11 19:47:30 +00:00
Francisco Jerez
074bde9989 intel/xehp: Switch to coarser cross-slice pixel hashing with table permutation.
The coarser 32x32 cross-slice hashing mode seems to lead to better L1
and L2 utilization due to the improved execution locality, however it
can also lead to a bottleneck in a single slice, especially in
workloads that concentrate heavy rendering in small areas of the
screen (e.g. SynMark2 OglGeomPoint, OglTerrain*) -- This effect is
mitigated here by performing a permutation of the pixel pipe hashing
tables that ensures that adjacent rows map to pixel pipes as far away
as possible in the caching hierarchy.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13569>
2022-01-10 18:28:35 -08:00
Francisco Jerez
ef675e6857 anv: Program pixel hashing tables on XeHP.
Note that this has an effect even for unfused native die platforms,
since the pixel pipe hashing tables we intend to program aren't
equivalent to the hardware's defaults on such configs.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13569>
2022-01-10 18:28:35 -08:00
Francisco Jerez
283d5bff4e intel: Rename intel_compute_pixel_hash_table() to intel_compute_pixel_hash_table_3way().
For consistency with intel_compute_pixel_hash_table_nway().

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13569>
2022-01-10 18:28:35 -08:00
Francisco Jerez
68cb551b1d intel: Move pixel hashing table computation into common header file.
In order to avoid some duplication between the GL and Vulkan driver,
which will get worse as we introduce additional code in order to
handle more recent generations.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13569>
2022-01-10 18:28:35 -08:00
Francisco Jerez
ffa2ca8a77 intel/xehp: Update 3DSTATE_PS maximum number of threads per PSD.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13569>
2022-01-10 18:27:41 -08:00
Francisco Jerez
8e21cad39b intel/xehp: Implement XeHP workaround Wa_14014148106.
Actually, no, there's no need to do anything, just update some
comments for the record.  An earlier revision of this change that
implemented the workaround text to the letter required no less than 8
new PIPE_CONTROLs throughout the tree.  However Felix Degrood noticed
that the cost of some of the PIPE_CONTROLs was showing up in workloads
like Shadow of the Tomb Raider.  The Windows driver wasn't emitting
many of those pipe controls, contrary to the W/A instructions, so we
engaged in a back and forth with the hardware team, who concluded that
the original suggested workaround was unnecessarily strict, and the
Windows driver's behavior acceptable.  It turns out that Wa_1408224581
we had already implemented for TGL is roughly equivalent to the
Windows behavior, so no need to do anything new after all.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14278>
2022-01-11 00:17:32 +00:00