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anv,iris: Flush tile cache after color fast clears

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Needed for TGL (see Bspec 47704).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14024>
This commit is contained in:
Nanley Chery 2021-10-08 10:48:08 -07:00 • committed by Marge Bot
parent 38b3661b8f
commit 34c8371e2a
2 changed files with 10 additions and 1 deletions
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5
src/gallium/drivers/iris/iris_clear.c
View file

@ -169,6 +169,7 @@ fast_clear_color(struct iris_context *ice,
union isl_color_value color)
{
struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
const struct intel_device_info *devinfo = &batch->screen->devinfo;
struct pipe_resource *p_res = (void *) res;
bool color_changed = res->aux.clear_color_unknown ||
@ -281,7 +282,9 @@ fast_clear_color(struct iris_context *ice,
blorp_batch_finish(&blorp_batch);
iris_emit_end_of_pipe_sync(batch,
"fast clear: post flush",
PIPE_CONTROL_RENDER_TARGET_FLUSH);
PIPE_CONTROL_RENDER_TARGET_FLUSH |
(devinfo->verx10 == 120 ?
PIPE_CONTROL_TILE_CACHE_FLUSH : 0));
iris_batch_sync_region_end(batch);
iris_resource_set_aux_state(ice, res, level, box->z,

6
src/intel/vulkan/anv_blorp.c
View file

@ -1841,6 +1841,7 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer,
/* Multisampling with multi-planar formats is not supported */
assert(image->n_planes == 1);
const struct intel_device_info *devinfo = &cmd_buffer->device->info;
struct blorp_batch batch;
anv_blorp_batch_init(cmd_buffer, &batch,
BLORP_BATCH_PREDICATE_ENABLE * predicate +
@ -1898,6 +1899,8 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer,
anv_add_pending_pipe_bits(cmd_buffer,
ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT |
(devinfo->verx10 == 120 ?
ANV_PIPE_TILE_CACHE_FLUSH_BIT : 0) |
ANV_PIPE_END_OF_PIPE_SYNC_BIT,
"after fast clear mcs");
@ -1922,6 +1925,7 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer,
anv_image_aux_layers(image, aspect, level));
const uint32_t plane = anv_image_aspect_to_plane(image, aspect);
const struct intel_device_info *devinfo = &cmd_buffer->device->info;
struct blorp_batch batch;
anv_blorp_batch_init(cmd_buffer, &batch,
@ -1989,6 +1993,8 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer,
anv_add_pending_pipe_bits(cmd_buffer,
ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT |
(devinfo->verx10 == 120 ?
ANV_PIPE_TILE_CACHE_FLUSH_BIT : 0) |
ANV_PIPE_END_OF_PIPE_SYNC_BIT,
"after fast clear ccs");