Commit graph

82384 commits

Author SHA1 Message Date
Jason Ekstrand
e881c73975 anv/pipeline: Don't leak the binding map 2016-02-18 11:09:30 -08:00
Jason Ekstrand
8c23392c26 anv/formats: Don't use a compound literal to initialize a const array
Doing so makes older versions of GCC rather grumpy.  Newere GCC fixes this,
but using a compound literal isn't really gaining us anything anyway.
2016-02-18 10:44:08 -08:00
Jason Ekstrand
9851c8285f Move the intel vulkan driver to src/intel/vulkan 2016-02-18 10:37:59 -08:00
Jason Ekstrand
47b8b08612 Move isl to src/intel 2016-02-18 10:34:47 -08:00
Jason Ekstrand
f6d9587688 vulkan: Move XML and generator into src/intel/genxml 2016-02-18 10:30:29 -08:00
Kristian Høgsberg Kristensen
542c38df36 anv/meta: Initialize blend state for the right attachment
We were always initializing only RT 0. We need to initialize the RT
we're creating the clear pipeline for.
2016-02-18 10:22:50 -08:00
Kristian Høgsberg Kristensen
05f75a3026 anv/meta: Don't use the blit ds layout in resolve code 2016-02-18 10:22:50 -08:00
Rob Herring
5c7f97426d Android: disable unused-parameter warning
Android builds with -Wunused-parameter enabled which results in spewing
lots of warnings. Disable it so more meaningful warnings are more visible.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-18 17:47:33 +00:00
Rob Herring
7efc273df1 Android: enable building on arm64
Use the LOCAL_CFLAGS_{32/64} instead of arch specific variants to define
the DEFAULT_DRIVER_DIR. This enables building for arm64.

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-18 17:47:33 +00:00
Rob Herring
1f53a57b2f Android: Fix building secondary arch in mixed 32/64-bit builds
TARGET_CC is not defined for the secondary arch on combined 32/64-bit
builds. The build system uses 2ND_TARGET_CC instead and it is not meant
to be used in module makefiles. LOCAL_CC was used to provide C only
flags as -std=c99 is not valid for C++ files. Since Android 4.4,
LOCAL_CONLYFLAGS was added to set compiler flags on C files only, so it
can be used now instead of LOCAL_CC.

This will break on pre-4.4 versions of Android, but it unlikely anyone
is using current Mesa with such an old version of Android.

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-18 17:47:33 +00:00
Rob Herring
ba06ea1a37 egl: android: clean-up config attribute setting
Pass the additional config attributes to dri2_add_config to set them
instead of open coding them. This is in preparation to add more attributes.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-18 17:47:33 +00:00
Varad Gautam
e35c5af337 egl: android: fix visuals declaration
Signed-off-by: Varad Gautam <varadgautam@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-18 17:47:33 +00:00
Rob Herring
64d2f398f6 Android: fix build break in libmesa_program
Commit 5fd848f6c9 ("program: Use _mesa_geometric_samples to calculate
gl_NumSamples") broken Android builds. Add the missing include path "main"
to framebuffer.h like other includes in prog_statevars.c.

Cc: Neil Roberts <neil@linux.intel.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-18 17:47:33 +00:00
Ilia Mirkin
12e3ad2ae9 mesa: gl_NumSamples should always be at least one
From ARB_sample_shading:

    "gl_NumSamples is the total number of samples in the framebuffer,
     or one if rendering to a non-multisample framebuffer"

So make sure to always pass in at least 1.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Edward O`Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2016-02-18 12:35:28 -05:00
Plamena Manolova
65dfb3048e compiler/glsl: Fix uniform location counting.
This patch moves the calculation of current uniforms to
link_uniforms, which makes use of UniformRemapTable which
stores all the reserved uniform locations.

Location assignment for implicit uniforms now tries to use
any gaps left in the table after the location assignment
for explicit uniforms. This gives us more space to store more
uniforms.

Patch is based on earlier patch with following changes/additions:

   1: Move the counting of explicit locations to
      check_explicit_uniform_locations and then pass
      the number to link_assign_uniform_locations.
   2: Count the number of empty slots in UniformRemapTable
      and store them in a list_head.
   3: Try to find an empty slot for implicit locations from
      the list, if that fails resize UniformRemapTable.

Fixes following CTS tests:
   ES31-CTS.explicit_uniform_location.uniform-loc-mix-with-implicit-max
   ES31-CTS.explicit_uniform_location.uniform-loc-mix-with-implicit-max-array

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93696
2016-02-18 11:53:35 +02:00
Jason Ekstrand
40c76d4efa Delete nir_lower_samplers.cpp
Somehow, in one of the merges with mesa master, the old file must have been
kept when nir_lower_samplers.cpp was moved to nir_lower_samplers.c.
2016-02-17 20:16:11 -08:00
Roland Scheidegger
d335b6abc0 gallivm, tgsi: provide fake sample_i_ms implementations
Just like the rest of the msaa "implementation" it's just fake for now...

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2016-02-18 05:00:03 +01:00
Brian Paul
06d3b0a006 st/mesa: new st_DrawAtlasBitmaps() function for drawing bitmap text
This basically saves the current pipeline state, sets up state for
rendering, constructs a set of textured quads, renders, then restores
the previous pipeline state.

It shouldn't be hard to implement a similar function for non-gallium
drives.  With some code refactoring, the vertex definition code could
probably be shared.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-17 19:57:48 -07:00
Brian Paul
b26ddda12f mesa: implement a display list / glBitmap texture atlas
This improves the performance of applications which use glXUseXFont()
or wglUseFontBitmaps() and glCallLists() to draw bitmap text.

Basically, we collect all the glBitmap images from the display lists
and put them into a texture atlas.  To render the bitmaps for a
glCallLists() command, we render a set of textured quads where each
quad is textured with one bitmap image.  Actually, the rendering part
has to be done by the Mesa driver or Mesa/gallium state tracker.

Note that GLUT demos that use glutBitmapCharacter() don't benefit
from this.

v2, per Nicolai Hähnle:
- check the max tex rect size is at least 1024.
- add comment in dd.h that texture_rectangle is required.
- in _mesa_DeleteLists(), try to delete the atlas before the list(s)

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-02-17 19:57:48 -07:00
Ilia Mirkin
6f4a725073 st/mesa: apply DepthMode swizzle to stencil texturing as well
Gallium doesn't present these as GL_RED-style. A swizzle is necessary to
present the proper data in the unused components.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-17 21:20:24 -05:00
Jason Ekstrand
005b9ac758 anv: Gut anv_pipeline_layout
Almost none of the data in anv_pipeline_layout is used anymore thanks to
doing real layout in the pipeline itself.
2016-02-17 18:04:40 -08:00
Kristian Høgsberg Kristensen
c2581a9375 anv: Build the real pipeline layout in the pipeline
This gives us the chance to pack the binding table down to just what the
shaders actually need.  Some applications use very large descriptor sets
and only ever use a handful of entries.  Compacted binding tables should be
much more efficient in this case.  It comes at the down-side of having to
re-emit binding tables every time we switch pipelines, but that's
considered an acceptable cost.
2016-02-17 18:04:39 -08:00
Jason Ekstrand
581e4468f9 nir/spirv: Add some more capabilities 2016-02-17 18:04:39 -08:00
Jason Ekstrand
fed8b7f817 anv/pipeline: Delete out-of-bounds fragment shader outputs 2016-02-17 18:04:39 -08:00
Jason Ekstrand
979732fafc nir: Add a helper for getting the one function from a shader 2016-02-17 18:04:39 -08:00
Jason Ekstrand
8c05b44bbb nir: Add a nir_foreach_variable_safe helper 2016-02-17 18:04:39 -08:00
Jason Ekstrand
d67d84f5e5 i965/nir: Do lower_io late for fragment shaders 2016-02-17 18:04:39 -08:00
Jason Ekstrand
7c26d8d471 anv/gen7_pipeline: Set WriteDisable = true if we have no color attachments 2016-02-17 18:04:39 -08:00
Jason Ekstrand
9f9cd3de44 anv/gen8_pipeline: Default color attachments to WriteDisable = true 2016-02-17 18:04:39 -08:00
Jason Ekstrand
da9fd74d34 anv: Pull StencilBufferWriteEnable from both sides 2016-02-17 18:04:39 -08:00
Nanley Chery
9963af8bbd anv: Ignore unused dimensions in vkCreateImage's anv_image
We ignore unused dimensions in the isl surface; do the same for the
resulting anv_image.

Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
2016-02-17 17:32:26 -08:00
Ben Widawsky
20e8ee3662 i965/skl: Update Skylake renderer strings
Also adds some of the Iris/Pro parts which we previously didn't have named.

v2: 0x192d is gt3, not gt4
Adding some 'e' tags for eDRAM parts

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Acked-by: Michał Winiarski <michal.winiarski@intel.com>
2016-02-17 16:50:59 -08:00
Ben Widawsky
644c8a5151 i965/skl: Add two missing device IDs
The Iris part is left unbranded because we did not have these with original SKL.

v2: 0x192d is gt3, not gt4

v3: Forgot to update the temporary brand string when I did v2.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Acked-by: Michał Winiarski <michal.winiarski@intel.com>
2016-02-17 16:50:59 -08:00
Ilia Mirkin
f3cd62a765 mesa: allow multisampled format info to be returned on GLES 3.1
The restriction on multisampled integer texture formats only applies to
GLES 3.0, so don't apply it to GLES 3.1 contexts. This fixes a slew of

dEQP-GLES31.functional.state_query.internal_format.*

tests, which now all pass.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-02-17 19:30:40 -05:00
Kristian Høgsberg Kristensen
b8da261dc7 spirv: Fix SpvOpFwidth, SpvOpFwidthFine and SpvOpFwidthCoarse
"Result is the same as computing the sum of the absolute values of
    OpDPdx and OpDPdy on P."

We were doing sum of absolute values of OpDPdx of P and OpDPdx of NULL.
2016-02-17 15:28:52 -08:00
Kristian Høgsberg Kristensen
ae3e249d57 anv: Remove hacky PIPE_CONTROL in vkCmdEndRenderPass()
The vkCmdPipelineBarrier() command should work as intended now and we
need to pull the plug on this old hack.
2016-02-17 15:19:07 -08:00
Kristian Høgsberg Kristensen
5e92e91c61 anv: Rework vkCmdPipelineBarrier()
We don't need to look at the stage flags, as we don't really support any
fine-grained, stage-level synchronization. We have to do two
PIPE_CONTROLs in case we're both flushing and
invalidating.

Additionally, if we do end up doing two PIPE_CONTROLs, the first,
flusing one also has to stall and wait for the flushing to finish, so we
don't re-dirty the caches with in-flight rendering after the second
PIPE_CONTROL invalidates.
2016-02-17 15:18:06 -08:00
Ben Widawsky
2bf041d94f i965: Extract push constant state to a new file
Every stage has a corresponding 3DSTATE_CONSTANT_XS packet, so having
the code to create and emit push constant buffers in genX_vs_state.c
is a little strange.  Moving it to a separate file seems more logical.

v2 [Ken]: Rebase on master, explain motivation in the commit message.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-17 12:34:23 -08:00
Matt Turner
0e9dc59a58 i965: Make emit_minmax return an instruction*.
And use it in brw_fs_nir.cpp.
2016-02-17 12:35:27 -08:00
Matt Turner
2f2c00c727 i965: Lower min/max after optimization on Gen4/5.
Gen4/5's SEL instruction cannot use conditional modifiers, so min/max
are implemented as CMP + SEL. Handling that after optimization lets us
CSE more.

On Ironlake:

   total instructions in shared programs: 6426035 -> 6422753 (-0.05%)
   instructions in affected programs: 326604 -> 323322 (-1.00%)
   helped: 1411

   total cycles in shared programs: 129184700 -> 129101586 (-0.06%)
   cycles in affected programs: 18950290 -> 18867176 (-0.44%)
   helped: 2419
   HURT: 328

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-02-17 12:35:27 -08:00
Matt Turner
378d98f87e i965/vec4: Initialize force_writemask_all in vec4_builder().
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-02-17 12:35:27 -08:00
Kristian Høgsberg Kristensen
3b9b908054 anv: Ignore unused dimensions in vkCreateImage
We would assert on unused dimensions (eg extent.depth for
VK_IMAGE_TYPE_2D) not being 1, but the specification doesn't put any
constraints on those. For example, for VK_IMAGE_TYPE_1D:

   "If imageType is VK_IMAGE_TYPE_1D, the value of extent.width must be
    less than or equal to the value of
    VkPhysicalDeviceLimits::maxImageDimension1D, or the value of
    VkImageFormatProperties::maxExtent.width (as returned by
    vkGetPhysicalDeviceImageFormatProperties with values of format,
    type, tiling, usage and flags equal to those in this structure) -
    whichever is higher"

We'll fix up the arguments to isl to keep isl strict in what it expects.
2016-02-17 12:21:51 -08:00
Kristian Høgsberg Kristensen
b63e28c0e1 anv: Set correct write domain on window system BOs
We need to make sure GEM understands that we're writing to the BO, in
case it needs to synchronize with other rings (blitter use in display
server, for example).
2016-02-17 11:19:56 -08:00
Tom Stellard
dc7cf07af3 radeon/llvm: Add TargetLibraryInfo to the pass manager
This will prevent optimization passes from introducing unsupported
library calls.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-17 19:06:41 +00:00
Tom Stellard
4f351a6cb1 radeon/llvm: Set the target triple on the module
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-17 19:06:41 +00:00
Tom Stellard
77f4e1c7ff gallivm: Add helpers for creating and destroying TargetLibraryInfo
This functionality is not exposed via the LLVM C API.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-17 19:06:41 +00:00
Samuel Pitoiset
cfd1dd0500 nvc0: invalidate all buffers when switching pipe contexts
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-17 21:14:24 +01:00
Ilia Mirkin
49c67926c7 st/mesa: fix up result_src.type when doing i2u/u2i conversions
Even though it's a no-op, it's important to keep track of the type so
that we can pick the properly-signed op later on.

This fixes dEQP-GLES3.functional.shaders.precision.uint.highp_div_fragment,
which ended up using IDIV instead of UDIV.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
2016-02-17 13:30:33 -05:00
Brian Paul
5e52df2198 st/mesa: use cso_set_viewport_dims() in try_pbo_upload_common()
Note that this results in a different transformation for the viewport's
Z axis (depth range), but that doesn't matter for this case.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-17 11:25:02 -07:00
Jordan Justen
9a939ebb47 i965/gen7: Use predicated rendering for indirect compute
On gen7 (Ivy Bridge, Haswell), we will get a GPU hang if an indirect
dispatch is used, but one of the dimensions is 0.

Therefore we use predicated rendering on the GPGPU_WALKER command to
handle this case.

Fixes piglit test: spec/arb_compute_shader/zero-dispatch-size

From the ARB_compute_shader spec, under DispatchCompute:

"If the work group count in any dimension is zero, no work groups are
 dispatched."

And then for DispatchComputeIndirect:

... "is equivalent (assuming no errors are generated) to calling
DispatchCompute with <num_groups_x>, <num_groups_y> and
<num_groups_z>" ...

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94100
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-17 09:25:47 -08:00