Commit graph

7887 commits

Author SHA1 Message Date
Sviatoslav Peleshko
28ca5636f6 anv: workaround apps that assume full subgroups without specifying it
Without this we might choose 8 or 16 width, while the app assumes 32.
With subgroup operations it may cause wrong calculations and thus bugs.

Examples of such games are Aperture Desk Job and DOOM Eternal.

v2: Make it a driconf option instead of applying unconditionally, move
    from brw_required_dispatch_width to brw_compile_cs
v3: Rename allow_assuming_full_subgroups -> assume_full_subgroups.
    Include assume_full_subgroups value in anv_pipeline_hash_compute().
v4: Move actual workaround code from brw_fs.c -> anv_pipeline.c.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6171
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15708>
2022-04-26 13:21:43 +00:00
Lionel Landwerlin
fe413962b4 anv: skip acceleration structure in binding table emission
With mutable descriptor types, we can end up in a situation where a
binding can be, for instance, both a UBO and an acceleration
structure.

While we can promote the UBO to a binding table entry and the shader
can use it, this isn't true of acceleration structures that have no
surface state. In that case just skip the entry. The shader is already
compiled to use the descriptor entry.

In the non mutable case, the entry will not be created by
anv_nir_apply_pipeline_layout.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 63e91148b7 ("anv: Enable VK_VALVE_mutable_descriptor_type")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15969>
2022-04-25 13:19:28 +00:00
Lionel Landwerlin
b7828f56ba anv: fix acceleration structure descriptor template writes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d258b0bf0e ("anv: Add support for binding acceleration structures")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16058>
2022-04-25 11:01:56 +00:00
Lionel Landwerlin
ace22edd30 anv: remove unused enum
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16058>
2022-04-25 11:01:56 +00:00
Lionel Landwerlin
107acf5a4a intel: fixup number of threads per EU on XeHP
Computations for indexing in-memory data structures for ray queries
depend on this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4f9141607f ("intel: Add device info for DG2")
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15925>
2022-04-25 10:06:02 +00:00
Lionel Landwerlin
5a52cfd88b anv: fix INTEL_DEBUG=sync
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3684012770 ("anv: implement DEBUG_SYNC")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16101>
2022-04-22 21:59:50 +00:00
Jason Ekstrand
2d3b3b757a anv: Clean up pipeline cache helpers a bit
Instead of having two different helpers, delete the pipeline_cache ones.
Also, instead of manually handling the cache == NULL case in every
vkCreateFooPipelines call, handle it inside the helpers.  This means
that BLORP can use them too by passing cache=NULL.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13184>
2022-04-22 19:38:52 +00:00
Jason Ekstrand
7f1e82306c anv: Switch to the new common pipeline cache
This patch is intended to be somewhat minimal.  There's a lot of cleanup
work that can be done but we'll leave that to later patches.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13184>
2022-04-22 19:38:52 +00:00
Jason Ekstrand
c551f6c4df anv: Rename a fail label in CreateDevice
The rest of them are labeled with the thing they need to destroy first,
not the thing that failed.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13184>
2022-04-22 19:38:52 +00:00
Vadym Shovkoplias
785b6579ae anv: Fix geometry flickering issue when compute and 3D passes are combined
Call flush_pipeline_select_3d in CmdBeginRendering() to emit a dummy MEDIA_VFE_STATE
before switching from GPGPU to 3D.

Original commit with the fix:
bc612536 ("anv: Emit a dummy MEDIA_VFE_STATE before switching from GPGPU to 3D")

Fixes: 3501a3f9ed ("anv: Convert to 100% dynamic rendering")
Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6201
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15954>
2022-04-21 11:00:07 +00:00
Jordan Justen
d257494ec4 intel/dev: Add device info for RPL-P
Cc: mesa-stable
Ref: https://patchwork.freedesktop.org/series/102701/
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16054>
2022-04-21 01:32:53 -07:00
Lionel Landwerlin
a468f26ca5 anv: implement VK_EXT_primitives_generated_query
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15638>
2022-04-20 10:37:24 +03:00
Lionel Landwerlin
8ef8e72aac intel/fs: tidy up lower of ray queries
We already expect a single function.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15946>
2022-04-19 12:56:06 +00:00
Marcin Ślusarz
5dace41c10 intel/compiler: invalidate metadata in brw_nir_initialize_mue
New "if" blocks may have been inserted.

Fixes: bc4f8c073a ("intel/compiler: inject MUE initialization")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15924>
2022-04-19 11:43:55 +00:00
Marcin Ślusarz
4fddef33d5 intel/compiler: invalidate all metadata in brw_nir_lower_intersection_shader
New "if" blocks were inserted.

Fixes: 303378e1dd ("intel/rt: Add lowering for combined intersection/any-hit shaders")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15924>
2022-04-19 11:43:55 +00:00
Marcin Ślusarz
5bd3ba5b67 anv: invalidate all metadata in anv_nir_lower_ubo_loads
lower_ubo_load_instr may insert "if" blocks.

Fixes: 61749b5a15 ("anv: Add a pass for lowering A64 UBO access")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15924>
2022-04-19 11:43:55 +00:00
Lionel Landwerlin
184084e21c anv: allow getting the address of the beginning of the batch
There is no reason not to be able to get it.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 34a0ce58c7 ("anv: add a new execution mode for secondary command buffers")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15968>
2022-04-19 10:43:29 +00:00
Alexey Bozhenko
2d7d907ad1 intel/compiler: fix singleton pointer coverity warning
fix brw_kernel::stats member that was declared as a variable
but used as a pointer to array of 3 elements

CID: 1503279

Signed-off-by: Bozhenko Alexey <oleksii.bozhenko@globallogic.com>

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15975>
2022-04-19 12:36:10 +03:00
Lionel Landwerlin
3684012770 anv: implement DEBUG_SYNC
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15950>
2022-04-19 07:32:01 +00:00
Lionel Landwerlin
317512e038 anv/intel: add a new debug flag for stalling after every draw/dispatch
Useful for hang debugging. Previously Anv incorrectly used DEBUG_SYNC
for this.

v2: Update documentations for sync/stall (Jordan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15950>
2022-04-19 07:32:01 +00:00
Lionel Landwerlin
a1969fa777 anv: improve INTEL_DEBUG for submit
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15950>
2022-04-19 07:32:01 +00:00
illiliti
67af7e2b40 Use proper types for meson objects
Fix invalid usage of meson objects which violates official meson
specification and thus breaks muon, an implementation of meson
written in C.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15715>
2022-04-18 13:03:08 +03:00
Lionel Landwerlin
04bd007757 intel/fs: require memory fence commit bit on Gfx9
Fixes a hang on Gfx9 GT1 : dEQP-VK.compute.zero_initialize_workgroup_memory.max_workgroup_memory.128

Tested-by: Mark Janes <markjanes@swizzler.org>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15596>
2022-04-17 21:24:17 +00:00
Lionel Landwerlin
b07c215c35 intel: fix URB programming for GT1s
We're missing a programming restriction.

Hopefully fixing
dEQP-VK.spirv_assembly.instruction.graphics.float16.arithmetic_1.* on
Gfx9atoms

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6216
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>.
Tested-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15596>
2022-04-17 21:24:17 +00:00
Jason Ekstrand
ad0dc8e4ab intel/compiler: Set lower_fisnormal
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15985>
2022-04-16 00:26:43 +00:00
Lionel Landwerlin
7be6632f7d anv: use shadow surface for stencil input attachment on gfx7
This fixes a number of tests like :
  dEQP-VK.renderpass*.suballocation.multisample.s8_uint.*
  dEQP-VK.renderpass*.suballocation.multisample.separate_stencil_usage.d24_unorm_s8_uint.*.test_stencil
  dEQP-VK.renderpass*.suballocation.multisample.d24_unorm_s8_uint.*
  dEQP-VK.renderpass*.suballocation.multisample.d32_sfloat_s8_uint.*

Because the driver asserts when generating RENDER_SURFACE_STATE with a
8 Valign value for stencil buffer (only 2 & 4 are supported).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12670>
2022-04-15 09:46:40 +03:00
Lionel Landwerlin
08f3950d6b anv: stop using old entrypoint/struct/enum names for 1.3
v2: More replacements

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15920>
2022-04-13 21:13:56 +00:00
Lionel Landwerlin
e11bedb9f5 intel/fs: add a note on possible optimization of root node address
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15910>
2022-04-13 11:24:49 +00:00
Lionel Landwerlin
9c0805ef91 intel/fs: fix metadata preserve on trace_ray intrinsic
c78be5da30 ("intel/fs: lower ray query intrinsics") introduced a
helper function using nir_(push|pop)_if which invalidated dominance &
block_index for the replacement of nir_intrinsic_rt_trace_ray.

We can still keep dominance/block_index metadata for the lowering of
nir_intrinsic_rt_execute_callable though.

This change uses 2 different lowering function with correct metadata
preservation.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c78be5da30 ("intel/fs: lower ray query intrinsics")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15910>
2022-04-13 11:24:49 +00:00
Jason Ekstrand
69b5424ea4 intel/nir: Lower 8 and 16-bit bitwise unops
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15829>
2022-04-12 23:19:38 +00:00
Jason Ekstrand
a482877c70 intel/fs: Implement 16-bit [ui]mul_high
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15829>
2022-04-12 23:19:38 +00:00
Mykhailo Skorokhodov
9c7e750ffe intel/fs: Enable b2f(inot(a)) and b2i(inot(a)) optimization for Gfx12+
The commit enables the optimization for Intel Gfx12+ graphics.

Tigerlake
```
total instructions in shared programs: 1289326 -> 1289015 (-0.02%)
instructions in affected programs: 37841 -> 37530 (-0.82%)
helped: 78
HURT: 9
helped stats (abs) min: 1 max: 26 x̄: 4.69 x̃: 3
helped stats (rel) min: 0.10% max: 12.50% x̄: 2.07% x̃: 1.21%
HURT stats (abs)   min: 1 max: 18 x̄: 6.11 x̃: 4
HURT stats (rel)   min: 0.16% max: 1.95% x̄: 0.94% x̃: 0.61%
95% mean confidence interval for instructions value: -4.95 -2.20
95% mean confidence interval for instructions %-change: -2.34% -1.18%
Instructions are helped.

total cycles in shared programs: 105606388 -> 105606442 (<.01%)
cycles in affected programs: 620119 -> 620173 (<.01%)
helped: 49
HURT: 28
helped stats (abs) min: 2 max: 3618 x̄: 228.63 x̃: 12
helped stats (rel) min: 0.02% max: 23.31% x̄: 4.60% x̃: 1.11%
HURT stats (abs)   min: 1 max: 2142 x̄: 402.04 x̃: 29
HURT stats (rel)   min: 0.01% max: 36.42% x̄: 5.01% x̃: 0.46%
95% mean confidence interval for cycles value: -151.80 153.20
95% mean confidence interval for cycles %-change: -3.00% 0.79%
Inconclusive result (value mean confidence interval includes 0).
```

Related-to: 7725d60938
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14017>
2022-04-12 10:55:05 +00:00
Marcin Ślusarz
65600a34c2 anv: initialize 3DMESH_1D.ExtendedParameter0 when ExtendedParameter0Present
When IndirectParameterEnable==true it's not actually used by the hardware,
but if it's not initialized and INTEL_DEBUG=bat is set, then Valgrind complains.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15850>
2022-04-12 09:10:31 +00:00
Marcin Ślusarz
f844ce66c8 anv: fix push constant lowering for task/mesh
Fixes: a6031cd9bd ("anv: fix push constant lowering with bindless shaders")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15850>
2022-04-12 09:10:31 +00:00
Francisco Jerez
e858da39e5 intel/perf: Fix OA report accumulation on Gfx12+.
The intel_perf_query path used for performance queries on GL was
passing a bogus "end" pointer to intel_perf_query_result_accumulate(),
causing it to accumulate garbage values.  This was causing the values
of many performance counters to be corrupted.

The "end" pointer was incorrect because the current code was assuming
that different OA reports were located TOTAL_QUERY_DATA_SIZE bytes
apart, which is a hard-coded preprocessor define.  However recent
(Gfx12+) hardware generations use a variable query size determined by
the query layout.  Use the size derived from it instead, and remove
the stale define.

Fixes: 3c51325025 ("intel/perf: switch query code to use query layout")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15783>
2022-04-12 00:11:47 +00:00
Kenneth Graunke
b05ac36f01 intel/genxml: Add SAMPLER_MODE bits for enabling Small PL on Icelake
This enables a lower power mode in the sampler hardware in certain
common scenarios.  On Tigerlake, SAMPLER_MODE is not programmable by
userspace but the kernel already sets this bit for us.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15628>
2022-04-11 19:17:07 +00:00
Kenneth Graunke
e3defe7ae7 intel/genxml: Delete SAMPLER_MODE register definition on Gfx12+
While this register still exists, it's no longer a per-context register.
Instead, on Gfx12+, SAMPLER_MODE exists per dual-subslice and is
accessed as a "multicast" register, where you write control which
version is accessed by the "steering control register".

At any rate, userspace cannot write it any longer, and so there's not
much point to it existing in our genxml (which was missing most of the
fields anyway).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15628>
2022-04-11 19:17:07 +00:00
Kenneth Graunke
8092704705 intel/genxml: Add new "Low Quality Filter" field on Gfx12+.
This allows the sampler to perform faster filtering of 8-bit UNORM
textures by filtering them at a different precision.  The filtering
is intended to still be OpenGL and DirectX spec compliant.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15628>
2022-04-11 19:17:07 +00:00
Kenneth Graunke
9a70385e2b intel/genxml: Add SAMPLER_STATE::Allow Low Quality LOD Calculation field
This allows the hardware to perform a faster LOD calculation in many
simple cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15628>
2022-04-11 19:17:07 +00:00
Vitalii.Lomaka
1407a4db69 intel/batch-decoder: Fix uninitialized scalar variables
CID: 1498516
CID: 1498560

Signed-off-by: Vitalii Lomaka <vitalii.lomaka@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15685>
2022-04-08 18:35:34 +00:00
Benjamin Cheng
0666b7fecc anv: drop from_wsi bit from anv_image
It was originally introduced in ca791f5c but it was never actually set
anywhere. It doesn't serve any purpose other than some sanity checking
so let's clean it up for now.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15799>
2022-04-07 18:46:50 +00:00
Ian Romanick
b5fa43952a intel/fs: Better handle constant sources of FS_OPCODE_PACK_HALF_2x16_SPLIT
I noticed that a *LOT* of fragment shaders in Shadow of the Tomb Raider,
for instance, end up with a sequence of NIR like:

    vec1 32 ssa_2 = load_const (0x00000000 = 0.000000)
    ...
    vec1 32 ssa_191 = pack_half_2x16_split ssa_188, ssa_2
    vec1 32 ssa_192 = pack_half_2x16_split ssa_189, ssa_2
    vec1 32 ssa_193 = pack_half_2x16_split ssa_190, ssa_2

This results in an assembly sequence like:

    mov(8)          g28<1>UD        0x00000000UD
    mov(8)          g21<2>HF        g28<8,8,1>F
    shl(8)          g21<1>UD        g21<8,8,1>UD    0x00000010UD
    mov(8)          g21<2>HF        g25<8,8,1>F
    mov(8)          g19<2>HF        g28<8,8,1>F
    shl(8)          g19<1>UD        g19<8,8,1>UD    0x00000010UD
    mov(8)          g19<2>HF        g23<8,8,1>F
    mov(8)          g20<2>HF        g28<8,8,1>F
    shl(8)          g20<1>UD        g20<8,8,1>UD    0x00000010UD
    mov(8)          g20<2>HF        g24<8,8,1>F

After this commit, the generated assembly is:

    mov(8)          g21<1>UD        0x00000000UD
    mov(8)          g21<2>HF        g23<8,8,1>F
    mov(8)          g19<1>UD        0x00000000UD
    mov(8)          g19<2>HF        g17<8,8,1>F
    mov(8)          g20<1>UD        0x00000000UD
    mov(8)          g20<2>HF        g18<8,8,1>F

Tiger Lake, Ice Lake, Skylake, and Haswell had similar results. (Ice Lake shown)
total instructions in shared programs: 20119086 -> 20119034 (<.01%)
instructions in affected programs: 9056 -> 9004 (-0.57%)
helped: 8
HURT: 0
helped stats (abs) min: 2 max: 16 x̄: 6.50 x̃: 4
helped stats (rel) min: 0.29% max: 1.75% x̄: 1.00% x̃: 0.98%
95% mean confidence interval for instructions value: -11.01 -1.99
95% mean confidence interval for instructions %-change: -1.56% -0.44%
Instructions are helped.

total cycles in shared programs: 861019414 -> 861021044 (<.01%)
cycles in affected programs: 279862 -> 281492 (0.58%)
helped: 4
HURT: 2
helped stats (abs) min: 6 max: 936 x̄: 239.00 x̃: 7
helped stats (rel) min: 0.03% max: 8.13% x̄: 2.09% x̃: 0.09%
HURT stats (abs)   min: 18 max: 2568 x̄: 1293.00 x̃: 1293
HURT stats (rel)   min: 0.36% max: 1.14% x̄: 0.75% x̃: 0.75%
95% mean confidence interval for cycles value: -972.56 1515.89
95% mean confidence interval for cycles %-change: -4.77% 2.49%
Inconclusive result (value mean confidence interval includes 0).

Broadwell
total instructions in shared programs: 17812327 -> 17812263 (<.01%)
instructions in affected programs: 9867 -> 9803 (-0.65%)
helped: 8
HURT: 0
helped stats (abs) min: 2 max: 28 x̄: 8.00 x̃: 4
helped stats (rel) min: 0.32% max: 1.80% x̄: 1.00% x̃: 0.95%
95% mean confidence interval for instructions value: -15.46 -0.54
95% mean confidence interval for instructions %-change: -1.54% -0.47%
Instructions are helped.

total cycles in shared programs: 904768620 -> 904773291 (<.01%)
cycles in affected programs: 454799 -> 459470 (1.03%)
helped: 4
HURT: 4
helped stats (abs) min: 36 max: 586 x̄: 344.50 x̃: 378
helped stats (rel) min: 0.47% max: 4.04% x̄: 2.01% x̃: 1.77%
HURT stats (abs)   min: 1 max: 5572 x̄: 1512.25 x̃: 238
HURT stats (rel)   min: <.01% max: 2.77% x̄: 1.46% x̃: 1.53%
95% mean confidence interval for cycles value: -1122.40 2290.15
95% mean confidence interval for cycles %-change: -2.26% 1.71%
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 18581 -> 18579 (-0.01%)
spills in affected programs: 323 -> 321 (-0.62%)
helped: 1
HURT: 0

total fills in shared programs: 24985 -> 24981 (-0.02%)
fills in affected programs: 1348 -> 1344 (-0.30%)
helped: 1
HURT: 0

Tiger Lake, Ice Lake, and Skylake had similar results. (Ice Lake shown)
Instructions in all programs: 143585431 -> 143513657 (-0.0%)
Instructions helped: 14403

Cycles in all programs: 8439312778 -> 8439371578 (+0.0%)
Cycles helped: 10570
Cycles hurt: 3290

Gained: 146
Lost: 74

All of the lost and gained fossil-db shaders are SIMD32 fragment
shaders.  14,247 of the affected shaders are from Shadow of the Tomb
Raider.  154 are from Batman Arkham Origins, and the remaining two are
from Octopath Traveler.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15089>
2022-04-07 18:26:23 +00:00
Ian Romanick
c08302670b intel/compiler: Fix sample_d messages on DG2
DG2 can only do sample_d and sample_d_c on 1D and 2D surfaces.  The
maximum number of gradient components and coordinate components should
be 2.  In spite of this limitation, the Bspec lists a mysterious R
component before the min_lod, so the maximum coordinate components is 3.

Fixes the following Vulkan CTS failures on DG2:

    dEQP-VK.glsl.texture_functions.texturegradclamp.isampler1d_fragment
    dEQP-VK.glsl.texture_functions.texturegradclamp.isampler2d_fragment
    dEQP-VK.glsl.texture_functions.texturegradclamp.sampler1d_fixed_fragment
    dEQP-VK.glsl.texture_functions.texturegradclamp.sampler1d_float_fragment
    dEQP-VK.glsl.texture_functions.texturegradclamp.sampler2d_fixed_fragment
    dEQP-VK.glsl.texture_functions.texturegradclamp.sampler2d_float_fragment
    dEQP-VK.glsl.texture_functions.texturegradclamp.usampler1d_fragment
    dEQP-VK.glsl.texture_functions.texturegradclamp.usampler2d_fragment

The Fixes: tag below is a bit misleading. This commit fixes some test
cases similar to ones fixed by the Fixes: commit.  I just want to make
sure this commit gets applied everywhere that commit was also applied.

Fixes: 635ed58e52 ("intel/compiler: Lower txd for 3D samplers on XeHP.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15781>
2022-04-07 17:09:28 +00:00
Jason Ekstrand
13fc698cef anv/formats: Relax usage checks if EXTENDED_USAGE_BIT is set
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14153>
2022-04-07 15:56:33 +00:00
Lionel Landwerlin
b5031bd6f7 intel/nir: don't report progress on rayqueries if no queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c78be5da30 ("intel/fs: lower ray query intrinsics")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15769>
2022-04-07 08:24:19 +00:00
Lionel Landwerlin
56ef501e3a blorp: disable depth bounds
Otherwise the driver setting interacts with it.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 939ddccb7a ("anv: Add support for depth bounds testing.")
Fixes: 1df871f8ff ("iris: Add support for depth bounds testing.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15763>
2022-04-06 19:00:50 +00:00
Lionel Landwerlin
3069337144 anv: remove unused 3DSTATE_DEPTH_BOUNDS fields
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15763>
2022-04-06 19:00:50 +00:00
Lionel Landwerlin
88f77aa811 anv: disable preemption on 3DPRIMITIVE on gfx12
To workaround a push constant corruption issue.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5963
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5662
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15753>
2022-04-06 12:51:15 +00:00
Vadym Shovkoplias
04a6693871 anv: fix EXT_depth_clip_control
This fixes arb_clip_control-clip-control and depth_clamp piglit
tests on zink.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6186
Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15561>
2022-04-06 13:26:52 +03:00
Jason Ekstrand
29b8097408 anv: Enable VK_EXT_debug_utils
It's implemented in common code as long as you use vk_command_buffer.

Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15560>
2022-04-06 01:18:23 +00:00