Commit graph

2116 commits

Author SHA1 Message Date
Ian Romanick
1f1007a4ed nir: Initialize lower_flrp_progress everywhere
I don't know why I thought NIR_PASS always set the progress variable.
Derp.

Fixes: d41cdef2a5 ("nir: Use the flrp lowering pass instead of nir_opt_algebraic")
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Coverity CID: 1444996
Coverity CID: 1444995
Coverity CID: 1444994
Coverity CID: 1444993
Coverity CID: 1444991
Coverity CID: 1444989
2019-05-09 10:03:51 -07:00
Samuel Pitoiset
53dfff1c4d radv: fix setting the number of rectangles when it's dyanmic
We need to know the number of rectangles.

This fixes new CTS dEQP-VK.draw.discard_rectangles.dynamic_*.

Fixes: 5db0bf9994 ("radv: Implement VK_EXT_discard_rectangles.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-09 11:42:25 +02:00
Timothy Arceri
e19a8fe033 radv: call constant folding before opt algebraic
The pattern of calling opt algebraic first seems to have originated
in i965. The order in OpenGL drivers generally doesn't matter
because the GLSL IR optimisations do constant folding before
opt algebraic.

However in Vulkan drivers calling opt algebraic first can result
in missed constant folding opportunities.

vkpipeline-db results (VEGA64):

Totals from affected shaders:
SGPRS: 3160 -> 3176 (0.51 %)
VGPRS: 3588 -> 3580 (-0.22 %)
Spilled SGPRs: 52 -> 44 (-15.38 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 12 -> 12 (0.00 %) dwords per thread
Code Size: 261812 -> 261036 (-0.30 %) bytes
LDS: 7 -> 7 (0.00 %) blocks
Max Waves: 346 -> 348 (0.58 %)
Wait states: 0 -> 0 (0.00 %)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-08 19:45:01 +10:00
Ian Romanick
d41cdef2a5 nir: Use the flrp lowering pass instead of nir_opt_algebraic
I tried to be very careful while updating all the various drivers, but I
don't have any of that hardware for testing. :(

i965 is the only platform that sets always_precise = true, and it is
only set true for fragment shaders.  Gen4 and Gen5 both set lower_flrp32
only for vertex shaders.  For fragment shaders, nir_op_flrp is lowered
during code generation as a(1-c)+bc.  On all other platforms 64-bit
nir_op_flrp and on Gen11 32-bit nir_op_flrp are lowered using the old
nir_opt_algebraic method.

No changes on any other Intel platforms.

v2: Add panfrost changes.

Iron Lake and GM45 had similar results. (Iron Lake shown)
total cycles in shared programs: 188647754 -> 188647748 (<.01%)
cycles in affected programs: 5096 -> 5090 (-0.12%)
helped: 3
HURT: 0
helped stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2
helped stats (rel) min: 0.12% max: 0.12% x̄: 0.12% x̃: 0.12%

Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-05-06 22:52:29 -07:00
Samuel Pitoiset
c10808441c radv: fix rowPitch for R32G32B32 formats on GFX9
The pitch is actually the number of components per row. We found
the problem when we implemented some meta operations for these
formats and the wrong pitch has been confirmed with a small test case.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108325
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-06 19:07:44 +02:00
Bas Nieuwenhuizen
8139efbbbd radv: Use given stride for images imported from Android.
Handled similarly as radeonsi. I checked the offsets are actually used.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-05-06 15:36:39 +00:00
Bas Nieuwenhuizen
5692351264 radv: Implement cosited_even sampling.
Apparently cosited_even was the required one instead of midpoint.

This adds slight offset of 0.5 pixels to the coordinates (+ we need
the image size to convert to normalized coords)

Fixes: 91702374d5 "radv: Add ycbcr lowering pass."
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-05-06 11:09:30 +00:00
Bas Nieuwenhuizen
5cbe12ad1b radv: Disable subsampled formats.
Broken on Polaris and since I discovered NV12 is not subsampled, but
a 2-plane format I decided I don't really care.

Work to do to re-enable:

1) Figure out which devices support it natively.
2) Write some software emulation for the others.

Fixes: 52c1adda21 "radv: Add ycbcr format features."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-05-06 09:53:37 +00:00
Samuel Pitoiset
4f18c43d1d radv: apply the indexing workaround for atomic buffer operations on GFX9
Because the new raw/struct intrinsics are buggy with LLVM 8
(they weren't marked as source of divergence), we fallback to the
old instrinsics for atomic buffer operations only. This means we need
to apply the indexing workaround for GFX9. The load/store
operations still use the new LLVM 8 intrinsics.

The fact that we need another workaround is painful but we should
be able to clean up that a bit once LLVM 7 support will be dropped.

This fixes a GPU hang with AC Odyssey and some rendering problems
with Nioh.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110573
Fixes: 31164cf5f7 ("ac/nir: only use the new raw/struct image atomic intrinsics with LLVM 9+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-03 17:59:12 +02:00
Samuel Pitoiset
e68d7bec67 radv: fix radv_get_aspect_format() for D+S formats
This restores the previous behaviour before YCBCR landed. For D+S
formats, it returns the depth format.

This fixes an assertion with Thrones of Britannia.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110540
Fixes: 66507cc656 ("radv: Add single plane image views & meta operations")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-03 09:01:10 +02:00
Samuel Pitoiset
62001f3dff radv: only need to force emit the TCS regs on Vega10 and Raven1
Other GFX9 chips aren't affected.

Cc: "19.0" "19.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-02 22:29:01 +02:00
Samuel Pitoiset
08be23bfde radv: set WD_SWITCH_ON_EOP=1 when drawing primitives from a stream output buffer
According to RadeonSI, this seems to be required by the hardware
to avoid GPU hangs. I think I just forgot to set that bit when I
implemented VK_EXT_transform_feedback.

This fixes a GPU hang with Space Engineers and DXVK.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110291
Fixes: b4eb029062 ("radv: implement VK_EXT_transform_feedback")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-02 15:55:46 +02:00
Rhys Perry
13c423629e radv: fix set_output_usage_mask() with composite and 64-bit types
It previously used var->type instead of deref_instr->type and didn't
handle 64-bit outputs.

This fixes lots of transform feedback CTS tests involving transform
feedback and geometry shaders (mostly
dEQP-VK.transform_feedback.fuzz.random_geometry.*)

v2: fix writemask widening when comp != 0
v3: fix 64-bit variables when comp != 0, again

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: 19.0 19.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-05-02 10:24:20 +01:00
Samuel Pitoiset
6ac10e07c2 radv: implement a workaround for VK_EXT_conditional_rendering
Per the Vulkan spec 1.1.107, the predicate is a 32-bit value. Though
the AMD hardware treats it as a 64-bit value which means it might
fail to discard.

I don't know why this extension has been drafted like that but this
definitely not fit with AMD. The hardware doesn't seem to support
a 32-bit value for the predicate, so we need to implement a workaround.

This fixes an issue when DXVK enables conditional rendering with RADV,
this also fixes the Sasha conditionalrender demo.

Fixes: e45ba51ea4 ("radv: add support for VK_EXT_conditional_rendering")
Reported-by: Philip Rebohle <philip.rebohle@tu-dortmund.de>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-02 09:24:05 +02:00
Samuel Pitoiset
e03e7c510f radv: fix color conversions for normalized uint/sint formats
The hardware actually rounds before conversion. This now matches
what values are used when performing fast clears vs slow clears.

This fixes a rendering issue with Far Cry 3&4. This also fixes
a bunch of CTS tests that use a 8-bit UNORM format (only when
the 512*512 image size hint is manually disabled).

Cc: "19.0" "19.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-02 09:24:05 +02:00
Samuel Pitoiset
6162543999 radv: do not need to force emit the TCS regs on Vega20
This chip doesn't need the fixup. This fixes a bunch of
dEQP-VK.tessellation tests and avoid random GPU hangs.

Cc: "19.0" "19.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-05-02 09:24:05 +02:00
Bas Nieuwenhuizen
0c99b5ace8 radv: Restrict YUVY formats to 1 layer.
Fixes: 8bb3cec7c9 "radv: Expose VK_EXT_ycbcr_image_arrays."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-05-02 02:29:51 +02:00
Bas Nieuwenhuizen
aab201635e radv: Set is_array in lowered ycbcr tex instructions.
Fixes array tests.

Fixes: 91702374d5 "radv: Add ycbcr lowering pass."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-05-02 02:29:51 +02:00
Bas Nieuwenhuizen
2c57d3361a radv: Fix hang width YCBCR array textures.
Forgot to apply the width/height divisor for CB writes resulting in
the CB using larger than expected slice sizes.

Fixes: 42d159f276 "radv: Add multiple planes to images."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110530
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110526
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-05-02 02:29:51 +02:00
Eric Engestrom
941b2f4dcd radv: update to use the new features struct names
These were updated in version 1.1.106 of vulkan.h to make more sense
with the extension names.  We may as well keep with the times.

See also: 90108deb27 "anv: Update to use the new features struct names"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-30 16:55:18 +01:00
Juan A. Suarez Romero
06c9d7f9f9 radv: enable descriptor indexing capabilities
This enables the remaining capabilities in SPV_EXT_descriptor_indexing.

Fixes: 0e10790558 "radv: Enable VK_EXT_descriptor_indexing."

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-30 09:23:23 +02:00
Eric Engestrom
7ca8ba199f delete autotools .gitignore files
One special case, `src/util/xmlpool/.gitignore` is not entirely deleted,
as `xmlpool.pot` still gets generated (eg. by `ninja xmlpool-pot`).

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2019-04-29 21:17:19 +00:00
Eleni Maria Stea
bb953de96c radv: consider MESA_VK_VERSION_OVERRIDE when setting the api version
Before setting the physical device API version, we should check if the
MESA_VK_VERSION_OVERRIDE environment variable is set and take it into
account.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-29 09:00:51 +02:00
Samuel Pitoiset
07745f9494 radv: add missing VEGA20 chip in radv_get_device_name()
Otherwise it returns "AMD RADV unknown".

Cc: 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-27 12:16:23 +02:00
Bas Nieuwenhuizen
295536d47a radv: Expose Vulkan 1.1 for Android.
We have the YCBCR feature now.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
8bb3cec7c9 radv: Expose VK_EXT_ycbcr_image_arrays.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
fc9248e13e radv: Enable YCBCR conversion feature.
This enabled the basic YCBCR features.

We support basic multiplane formats using 8-bit and 16-bit unorms, as
well as YUV2 formats.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
379b82dace radv: Add ycbcr subsampled & multiplane formats to csv.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
52c1adda21 radv: Add ycbcr format features.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
b769a549ee radv: Add hashing for the ycbcr samplers.
Otherwise caching gets very confused.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
5c3467e74a radv: Run the new ycbcr lowering pass.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
91702374d5 radv: Add ycbcr lowering pass.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
5564c38212 radv: Update descriptor sets for multiple planes.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
7f6732ac69 radv: Add ycbcr samplers in descriptor set layouts.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
dc917c8073 radv: Allow mixed src/dst aspects in copies.
e.g. COLOR + PLANE_2, as well COLOR + COLOR for multiplane images.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
b2cfa231d0 radv: Add support for image views with multiple planes.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
65c4f612aa radv: Add ycbcr conversion structs.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
a837768857 radv: Support different source & dest aspects for planar images in blit2d.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
66507cc656 radv: Add single plane image views & meta operations.
Copies & clear of multiplane images is not allowed so we do not
have to handle that case.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
42d159f276 radv: Add multiple planes to images.
No functional changes. This temporarily uses plane 0 for
everything.

Long term plan is that only single plane images get to use
metadata like htile/dcc/cmask/fmask.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
d3225e533f radv: Add logic for multisample format descriptions.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
09c4a911e5 radv: Add logic for subsampled format descriptions.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-25 19:56:20 +00:00
Bas Nieuwenhuizen
3844ed8d44 radv: Add adaptive_sync driconfig option and enable it by default.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-23 23:49:39 +00:00
Bas Nieuwenhuizen
f2e0f5c3c4 vulkan/wsi: Add X11 adaptive sync support based on dri options.
The dri options are optional. When the dri options are not provided
the WSI will not  use adaptive sync.

FWIW I think for xf86-video-amdgpu this still requires an X11 config
option, so only people who opt in can get possible regressions from this.

So then the remaining question is: why do this in the WSI?

It has been suggested in another MR that the application sets this.
However, I disagree with that as I don't think we'll ever get a
reasonable set of applications setting it.

The next questions is whether this can be a layer. It definitely
can be as implemented now. However, I think this generally fits
well with the function of the WSI. Furthemore, for e.g. the DISPLAY
WSI this is much harder to do in a layer.

Of course, most of the WSI could almost be a layer, but I think
this still fits best in the WSI.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2019-04-23 23:49:39 +00:00
Bas Nieuwenhuizen
3c2e8267d0 radv: Add support for driconf.
This includes 0 options.

The cache parsing is located at a position where we can easily add
config filtering by VkApplicationInfo.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-23 23:49:39 +00:00
Samuel Pitoiset
b3e3440c87 radv: add VK_NV_compute_shader_derivates support
Only computeDerivativeGroupLinear is supported for now.

All crucible tests pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-22 14:51:57 +02:00
Bas Nieuwenhuizen
8d2654a419 radv: Support VK_EXT_inline_uniform_block.
Basically just reserve the memory in the descriptor sets.

On the shader side we construct a buffer descriptor, since
AFAIU VGPR indexing on 32-bit pointers in LLVM is still broken.

This fully supports update after bind and variable descriptor set
sizes. However, the limits are somewhat arbitrary and are mostly
about finding a reasonable division of a 2 GiB max memory size over
the set.

v2: - rebased on top of master (Samuel)
    - remove the loading resources rework (Samuel)
    - only load UBO descriptors if it's a pointer (Samuel)
    - use LLVMBuildPtrToInt to avoid IR failures (Samuel)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (v2)
2019-04-19 09:21:47 +02:00
Samuel Pitoiset
9cf55b022d radv: add VK_KHR_shader_atomic_int64 but disable it for now
No support for 64-bit compare&swap atomic operations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-17 21:59:56 +02:00
Tapani Pälli
624789e370 compiler/glsl: handle case where we have multiple users for types
Both Vulkan and OpenGL might be using glsl_types simultaneously or we
can also have multiple concurrent Vulkan instances using glsl_types.
Patch adds a one time init to track number of users and will release
types only when last user calls _glsl_type_singleton_decref().

This change fixes glsl_type memory leaks we have with anv driver.

v2: reuse hash_mutex, cleanup, apply fix also to radv driver and
    rename helper functions (Jason)

v3: move init, destroy to happen on GL context init and destroy

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-04-16 12:58:00 +03:00
Samuel Pitoiset
ecbe6cb805 radv: sort the shader capabilities alphabetically
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-16 09:14:22 +02:00