Commit graph

4213 commits

Author SHA1 Message Date
Rohan Garg
1e9fb7c696 anv,hasvk: Use the inbuilt macro from src/util for clamping int64_t
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
2023-01-06 17:22:15 +00:00
Rohan Garg
0030d6d224 anv: constify variables and use early returns
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
2023-01-06 17:22:15 +00:00
Felix DeGrood
7f6beb8537 anv: Emit CS stall on INTEL_MEASURE timestamp
For INTEL_MEASURE, ensure all prior instructions completed before
timestamp taken. Continue to support no CS flush case for Perfetto.
CS stall was dropped from pipecontrol when adding u_trace support.

Fixes: cc5843a573 ("anv: implement u_trace support")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20502>
2023-01-04 22:43:36 +00:00
Tapani Pälli
97f2b60833 anv: implement Wa_14015814527 for task shaders
After using task shader, we need to emit a zero URB state and a
nullprim (empty pipe control) before rendering with primitives.

After this, a normal URB state needs to be returned, this will
happen when pipeline batch is emitted during pipeline switch.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20334>
2023-01-03 12:44:08 +00:00
Sviatoslav Peleshko
c2acd9f76a anv: Add layer with work-around for Doom 64 texture corruption
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7817
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19502>
2023-01-02 15:05:06 +00:00
José Roberto de Souza
c6d1f76da2 anv: Add and use emit_pipeline_select()
To avoid the replication of code to properly emit PIPELINE_SELECT.

init_compute_queue_state() had a different emit of PIPELINE_SELECT but
as there is no compute engine in GFX VER 11 we are safe with the
differences.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20444>
2022-12-29 08:34:15 -08:00
Tapani Pälli
b9aa66d5d0 anv: disable preemption for 3DPRIMITIVE during streamout
This is required by Wa_16013994831.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20438>
2022-12-27 15:53:42 +00:00
Lionel Landwerlin
afdbed9e9c anv: fix potential integer overflow
The loop going from 0 to max_draw_count multiplies the value which
could potentially overflow.

Fixes Coverity CID 1517852

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3596a8ea7a ("anv: factor out some indirect draw count entry points")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20436>
2022-12-27 14:21:44 +00:00
Lionel Landwerlin
c950fe97a0 anv: implement generated (indexed) indirect draws
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15642>
2022-12-23 22:52:50 +00:00
Lionel Landwerlin
3596a8ea7a anv: factor out some indirect draw count entry points
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15642>
2022-12-23 22:52:50 +00:00
Lionel Landwerlin
61b730f1f4 anv: decouple util function from anv_cmd_buffer
The issue we're addressing here is that we have 2 batches and the both
grow at different rate. We want to keep doubling the main batch size
as the application writes more and more commands to limit the number
of GEM BOs. But we don't want to have the generation batch size to be
linked to the main batch.

v2: remove gfx7 code

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15642>
2022-12-23 22:52:50 +00:00
José Roberto de Souza
3e28c5b9f9 anv: Pass anv_bo as parameter to anv_gem_mmap()
anv_bo has information that will be needed by a future patch in
anv_gem_mmap(), so here already preparing for that.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20423>
2022-12-23 18:22:29 +00:00
Lionel Landwerlin
739a08ad23 anv: handle null push descriptors in deferred optimization
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b49b18f0 ("anv: reduce BT emissions & surface state writes with push descriptors")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20410>
2022-12-22 14:07:21 +00:00
Rohan Garg
ad9c0e8cd9 anv: Ensure we clear ANV_PIPE_PSS_STALL_SYNC_BIT on flush
Add the PSS stall bit to ANV_PIPE_STALL_BITS so that it get's cleared on
flush.

Fixes: f3c62973 ("anv,iris: PSS Stall Sync around color fast clears")

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20317>
2022-12-20 10:44:54 +00:00
Chad Versace
a5f9e59ce3 anv: Use vma_heap for descriptor pool host allocation
Pre-patch, anv_descriptor_pool used a free list for host allocations
that never merged adjacent free blocks.  If the pool only allocated
fixed-sized blocks, then this would not be a problem. But the pool
allocations are variable-sized, and this caused over half of the pool's
memory to be consumed by unusable free blocks in some workloads, causing
unnecessary memory footprint.

Replacing the free list with util_vma_heap, which does merge adjacent
free blocks, fixes the memory explosion in the target workload.

Disdavantges of util_vma_heap compared to the free list:
  - The heap calls malloc() when a new hole is created.
  - The heap calls free() when a hole disappears or is merged with an
    adjacent hole.
  - The Vulkan spec expects descriptor set creation/destruction to be
    thread-local lockless in the common case. For workloads that
    create/destroy with high frequency, malloc/free may cause overhead.
    Profiling is needed.

Tested with a ChromeOS internal TensorFlow benchmark, provided by
package 'tensorflow', running with its OpenCL backend on clvk.

  cmdline: benchmark_model --graph=mn2.tflite --use_gpu=true --min_secs=60
  gpu: adl
  memory footprint from start of benchmark:
    before: init=132.691MB max=227.684MB
    after:  init=134.988MB max=134.988MB

Reported-by: Romaric Jodin <rjodin@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20289>
2022-12-16 07:18:38 +00:00
Iván Briano
766508f56a Revert "anv: Refactor anv_pipeline to use the anv_pipeline_type"
This reverts commit b1126abb38.

This breaks all hell at least on DG2, as there are several cases left
where current_pipeline gets checked against GPGPU to decide what to do,
and the value doesn't match that of ANV_HW_PIPELINE_STATE_COMPUTE.
On top of that, it also misses checking for
ANV_HW_PIPELINE_STATE_RAYTRACING.

Then there's the fact that in some cases, current_pipeline will be
UINT32_MAX, because it's the original undefined state and also used
after executing a secondary command buffer because we are not tracking
on which pipeline did the secondary left us.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7910
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20349>
2022-12-16 06:39:32 +00:00
Tapani Pälli
77244e30b6 anv: remove some gen8 specifics handled now in hasvk
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20342>
2022-12-16 07:25:30 +02:00
Lionel Landwerlin
b21cd1ee1b anv: fixup another dirty issue with gpu_memcpy
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20335>
2022-12-15 17:30:55 +00:00
Rohan Garg
b1126abb38 anv: Refactor anv_pipeline to use the anv_pipeline_type
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20316>
2022-12-15 16:38:18 +00:00
Jordan Justen
78a75e0d25 intel/common/intel_genX_state.h: Add intel_set_ps_dispatch_state()
This replaces brw_fs_get_dispatch_enables(), which was added in
b9403b1c47 ("intel: factor out dispatch PS enabling logic"), but this
function will not work well for future changes to 3DSTATE_PS.

So, instead, this moves the related code into a "genX" file which can
directly update 3DSTATE_PS for the given platform.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20329>
2022-12-15 00:54:59 -08:00
Paulo Zanoni
e930bff19e anv: remove anv_reloc_list->array_length
This is another field that, after the recent commits, became unused.
It's either zero-initialized (by the memset) or copy-initialized
(which means it's also zero). And it never even gets used anywhere
anyway, so even if the value was non-zero it wouldn't matter.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20309>
2022-12-14 10:44:31 -08:00
Paulo Zanoni
1358622878 anv: remove anv_reloc_list->reloc_bos
As a consequence of the last two commits, reloc_bos is always NULL and
never used anywhere, so remove it.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20309>
2022-12-14 10:44:31 -08:00
Paulo Zanoni
f1c4c646b8 anv: remove anv_reloc_list_grow()
The last commit made it clear that anv_reloc_list_grow() only ever
gets called with zero as num_additional_relocs, which means it will
always immediately return VK_SUCCESS without doing anything. That
means we can remove it.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20309>
2022-12-14 10:44:31 -08:00
Paulo Zanoni
4168d3ef30 anv: remove anv_reloc_list->num_relocs
There are only a few places in the code where num_relocs gets set:

  - During anv_reloc_list_init() where it gets memset() to 0.
  - At anv_reloc_list_init_clone() where it gets set with the value of
    another anv_reloc_list->num_relocs.
  - During anv_reloc_list_clear(), where it gets set to 0.
  - During anv_reloc_list_append(), where it gets added with the value
    of another anv_reloc_list->num_relocs.

As you can see, either we explicitly set the value to 0 or we copy the
value that's present in another anv_reloc_list, which should be 0. The
one place where we used to increment num_relocs was in
anv_reloc_list_add(), but that was deleted by:

  7b7381e8d7 ("anv: Delete anv_reloc_list_add()")

So in this commit we delete the num_relocs field from struct
anv_reloc_list and we also delete some lines where, if the value is 0,
nothing will happen.

There's more we could be deleting here, but I wanted this commit to be
minimal so it's very clear that num_relocs can't be non-zero. We were
having some speculation that anv_reloc_list may still be important for
actually adding BOs to the batch and building the validation list, so
let's go slowly with the removal to make everything more easily
reviewable.

The one possibility I could be missing here is another situation like
the memset() we have at anv_reloc_list_init() or some other crazy
indirect overwrite, but as far as I have checked, that is not the
case.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20309>
2022-12-14 10:44:31 -08:00
Paulo Zanoni
4b1c4925e7 anv: remove anv_execbuf->surface_states_relocs
Now that we removed relocations, this is not being used anywhere.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20309>
2022-12-14 10:44:31 -08:00
Jianxun Zhang
9ff471fdc6 intel/vulkan: replace AUX macros with interfaces
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20259>
2022-12-14 18:11:13 +00:00
Marcin Ślusarz
264a0cabd1 anv: assert when number of primitives is higher than max
Such cases can lead to memory corruptions.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20279>
2022-12-14 09:55:11 +00:00
Marcin Ślusarz
d7a1916798 anv: handle mesh shaders with max primitives == 0
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20279>
2022-12-14 09:55:10 +00:00
Lionel Landwerlin
e2dc32d755 anv: move functions around to plan for generated draws
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
4a3faab512 anv: move draw command helpers to their own file
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
624ac55721 anv: move total_batch_size to anv_batch
We'll want 2 batches :

   * the main one

   * another to contain dispatch commands to generate stuff in the
     main batch

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
8d21e29be3 anv: add helper to get current address of a batch
And allow the function to get the very first address in the batch.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
c9272e80b1 anv: add a utility function to ensure command buffer space
Ensuring the space is contiguous.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
21e32e1f8d anv: document utrace field
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Jason Ekstrand
c70ef757e6 anv: Use extended parameters on Gen11+
Gen11 added a nifty feature where we have three custom system-generated
values called extended parameters that we can set to any 32-bit values
we want.  These work just like vertex and instance ID and are controlled
in the pipeline by the 3DSTATE_SGVS_2 packet.  They are provided to the
draw call either by extra DWORDs on the end of 3DSTATE_PRIMITIVE or by
storing values to more state registers.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
75d20a18f5 anv/utrace: only record the emitted pipecontrol flags
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
5fd0d27280 intel/ds: trace a couple of more pipe control flags
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20295>
2022-12-13 19:22:02 +00:00
Lionel Landwerlin
a921486e2a anv: disable Wa_1806565034 when robustImageAccess is enabled
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5711
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7859
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20280>
2022-12-13 18:05:19 +00:00
Lionel Landwerlin
94bb4a13fa intel/fs: make Wa_1806565034 conditional to non robust access
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20280>
2022-12-13 18:05:19 +00:00
Marcin Ślusarz
5ffdd47a26 anv: simplify EXT_mesh_shader lowering
No functional changes.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
2022-12-13 13:00:48 +00:00
Marcin Ślusarz
7fbd1dfb18 anv,intel/compiler/mesh: drop lowering of gl_Primitive*IndicesEXT
Until U888X index format lands this change shouldn't have any impact on performance.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20292>
2022-12-13 13:00:48 +00:00
Lionel Landwerlin
a0991c7c79 anv: fixup descriptor copies
I did not properly understood that we cannot access the views written
to the descriptor sets because they might have been destroyed after
the write operation and the copy operation is allowed to copy what is
invalid data. The shader just can't access it.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 03e1e19246 ("anv: Refactor descriptor copy")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20222>
2022-12-13 09:13:05 +00:00
Peng Huang
7642f3b99c intel: Fix crashes for importing drm buffer
image_aspect_to_binding() converts aspect to index by subrracting
VK_IMAGE_ASPECT_MEMORY_PLANE_0_BIT_EXT, however these enum values
are bitfields, not consecutive numbers, so comparing and subtracting
them won't work.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20269>
2022-12-12 23:02:38 +00:00
Lionel Landwerlin
d608706875 Revert "anv: compile anv_acceleration_structure.c"
This reverts commit 74d0be27ae.

Also remove anv_acceleration_structure.c, it was meant to be removed
earlier. There was probably a rebase issue somewhere.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20248>
2022-12-10 01:16:16 +00:00
Rebecca Mckeever
43f9c66224 anv: Delete VK_KHR_device_group provided entrypoints
Delete anv_CmdDispatch, anv_CmdSetDeviceMask, and
anv_GetDeviceGroupPeerMemoryFeatures so that the vk_common_*
versions will be used instead. This will avoid repeated code.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20218>
2022-12-09 14:07:48 -06:00
Kenneth Graunke
88918baf5c intel/compiler: Delete key->msaa_16
None of the drivers have used this since we dropped i965, and BLORP
no longer uses it as of the previous commit.  We can also drop the
former compressed_multisample_tex_mask (now padding) field so that
things remain 64-bit aligned.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20223>
2022-12-09 10:18:25 +00:00
Kenneth Graunke
584e18863e intel: Drop compressed_multisample_layout_mask from the compiler keys
The compiler looks at this key field to determine whether to perform
an MCS fetch for a txf_ms or samples_identical texture message, if a
nir_tex_src_ms_mcs_intel source wasn't provided.  If it isn't set,
it instead uses constant 0 (nothing is compressed).

All of the drivers (iris, crocus, anv, hasvk) unconditionally set this
to ~0 because we don't want to pay for costly shader recompiles (which
can cause nasty stuttering).  Most textures are compressed anyway, and
the hardware ignores the l2dms MCS parameter if MCS is disabled.

The only user was BLORP, which sets the key field based on whether the
texture's aux usage has MCS.  But if it has MCS, it also does the MCS
fetch itself and supplies it directly.  Otherwise, it relies on the
compiler to fill in the 0 value.  But it could easily just provide the
0 value itself in that case and not rely on the compiler at all.

With that fixed, we can just drop the key fields entirely.  We leave
them as padding for now to avoid repacking structures; we won't need
to after the next commits anyway.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20223>
2022-12-09 10:18:25 +00:00
Tapani Pälli
68ef0d8448 anv: emit sample mask state independent of fragment stage
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7861
Fixes: 9f6af43743 ("anv: dynamic multisample sample mask")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20221>
2022-12-09 08:00:42 +00:00
Jordan Justen
0d9be82fe6 intel/genxml: Add genX_rt_pack.h
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20225>
2022-12-09 01:43:39 +00:00
Otavio Pontes
2e775b8bdb anv/hasvk: Clamping Scissor Rect values in a valid range
On cmd_buffer_emit_scissor(), if VkViewport height or width are set to
a value lower than 1.0, y_max or x_max can be attributed negative values,
causing an overflow. That leads to ScissorRectangleYMax or
ScissorRectangleXMax to be set to values on an unsupported range.

Clamping x_max and y_max in the valid range solves the problem.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7471
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20200>
2022-12-07 12:19:42 +00:00