Commit graph

328 commits

Author SHA1 Message Date
Marek Olšák
45acb5857d radeonsi: pack clip/cull distance export components
This removes unused and no-op clip/cull distance components, though
it's not very common.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35529>
2025-07-12 10:28:20 +00:00
Marek Olšák
fec40557d3 radeonsi: use nir_opt_clip_cull_const
It eliminates no-op (>= 0) clip/cull distance output components by setting
no_sysval_output = true.

We have to gather clip/cull distances manually to get reduced clip/cull
masks.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35529>
2025-07-12 10:28:20 +00:00
Marek Olšák
c743c3dd1a radeonsi: support 8 non-ClipVertex clip planes instead of 6
If there are more than 6 planes without gl_ClipVertex and gl_ClipDistance,
add "gl_ClipVertex = gl_Position;" to support up to 8 planes.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35529>
2025-07-12 10:28:20 +00:00
Marek Olšák
e73f70e135 radeonsi: add si_shader_variant_info::clip/culldist_mask
so that it can be different between shader variants

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35529>
2025-07-12 10:28:20 +00:00
Marek Olšák
65972f2301 ac/nir: return GSVS emit sizes from legacy GS lowering and simplify shader info
This simplifies shader info in drivers by returning GSVS emit sizes from
ac_nir_lower_legacy_gs. The pass knows the sizes, so drivers shouldn't
have to determine them independently.

This also makes the values more accurate because both drivers were
computing the GSVS emit sizes inaccurately and had redundant fields
in shader info. RADV had a lot of redudancy there.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35473>
2025-07-12 05:20:02 +00:00
Qiang Yu
5c92fe45a1 radeonsi: support more than 64 options for AMD_DEBUG
As we are going to add more debug options for mesh shader,
but now AMD_DEBUG options are full (=64).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
2025-07-11 02:25:51 +00:00
Qiang Yu
09e6bc90ee radeonsi: fix gfx11 ngg shader emit
Cc: mesa-stable
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
2025-07-11 02:25:51 +00:00
Qiang Yu
d0f76c4cd4 radeonsi: use mask for uses_bindless_samplers/images
For simpler code and mesh shader support which need to
distinguish vertex and mesh pipeline.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
2025-07-11 02:25:50 +00:00
Yogesh Mohan Marimuthu
e18da57276 radeonsi: replace fprintf stderr using mesa_log helper functions
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
radeonsi driver error and warnings fprintf will only use mesa_log
helper functions.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35862>
2025-07-09 07:43:13 +00:00
Marek Olšák
098d33766a ac: add legacy GS subgroup size computation from radeonsi
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35352>
2025-07-02 20:27:43 +00:00
Marek Olšák
fa8db1ccd3 ac: add NGG subgroup size computation from radeonsi
RADV will use it.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35352>
2025-07-02 20:27:42 +00:00
Pierre-Eric Pelloux-Prayer
75f596d909 radeonsi: fix attribute_pos_prim_ring handling
Apply the same logic as the other rings.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35452>
2025-06-12 07:23:33 +00:00
Marek Olšák
3d504ee844 radeonsi: remove a non-trivial optimization that doesn't do much
It only caused some optimized shader variants to not be compiled in very
rare cases. I think it doesn't happen in practice, but if it does, it's
not a big deal.

The case when this was useful was when a shader wrote (0,0,0,0) or
(0,0,0,1) or (1,1,1,0, or (1,1,1,1) to a shader output before PS,
but PS didn't use the output.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35392>
2025-06-10 03:31:20 +00:00
Marek Olšák
be44da1888 radeonsi: replace tess_levels_written_for_tes mask with a count
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
9d9cfd89da ac/nir/tess: compute the number of remapped VRAM outputs in common code
This unifies it for both drivers.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
42445e271e radv,radeonsi: use ac_nir_tess_io_info for LDS size computation
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
9c16228359 ac/nir/tess: write TCS per-vertex outputs to memory as vec4 stores at the end
This improves write throughput for TCS outputs. It follows the same idea
as attribute stores in hw GS. The improvement is easily measurable with
a microbenchmark.

It also has the advantage that multiple output stores to the same address
don't result in multiple memory stores. Each output components gets only
one memory store at the end of the shader.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
a59464b6e3 radv,radeonsi: precompute and pass TCS per-vertex output stride via a user SGPR
It's a stride of 1 output, which isn't 16. It's 16 * num_threads,
aligned to 256.

tcs_offchip_layout has 5 unused bits, so let's use them.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
742227c65c radv,radeonsi: make TCS_OFFCHIP_LAYOUT_NUM_PATCHES not off by one
We never use 128 anyway.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
8d3e3c72e0 radv,radeonsi: merge PATCH_CONTROL_POINT & OUT_PATCH_CP into 1 field
One is only used by TCS, the other is only used by TES.
Use the same field for both, call it PATCH_VERTICES_IN.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Samuel Pitoiset
babeb975c4 radv,radeonsi: fix emitting UPDATE_DB_SUMMARIZER_TIMEOUT on GFX12
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Not all PFP firmwares for GFX12 have this packet.

Fixes: 47f5d25f93 ("radv,radeonsi: emit UPDATE_DB_SUMMARIZER_TIMEOUT on GFX12")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13312
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35370>
2025-06-05 16:51:07 +00:00
Marek Olšák
c3034fa82c amd: replace most u_bit_consecutive* with BITFIELD_MASK/RANGE
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35346>
2025-06-04 17:46:38 +00:00
Samuel Pitoiset
47f5d25f93 radv,radeonsi: emit UPDATE_DB_SUMMARIZER_TIMEOUT on GFX12
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This try to mitigate the HiZ GPU hang by increasing a timeout. Loosely
based on PAL but I can confirm it delays the hang when
BOTTOM_OF_PIPE_TS is used as a workaround.

This must be emitted when the GFX queue is idle.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35212>
2025-06-02 07:30:18 +00:00
Mike Blumenkrantz
2eb45daa9c gallium: de-pointerize pipe_surface
this allows eliminating surface refcounting and objects
which, relatively speaking, don't serve much purpose

see MR for details

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34054>
2025-05-23 13:21:29 +00:00
Marek Olšák
e478410466 radeonsi: inline shader_info in si_shader_info, keep only what's used
This reduces the si_shader_info size by 244 B.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
dc5e0e2b73 radeonsi: rename num_stream_output_components -> num_gs_stream_components
it's not for streamout

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
180f320e69 radeonsi: use info.num_streamout_vec4s instead of si_shader_uses_streamout
It's identical now.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
100f9a1624 radeonsi: move xfb fields from si_shader_info to shader variant info
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
9edcf19f7d radeonsi: remove si_shader_info::writes_position
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
c761da42ce radeonsi: don't use si_shader_info in si_parse_next_shader_property
just use NIR info.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
20e5c35cfe radeonsi: gather uses_discard from shader variants
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
de6ca8c7ec radeonsi: gather writes_z/stencil/sample_mask as shader variant info
si_get_shader_variant_info doesn't need to check the kill flags because
killed stores are removed from NIR before that.

Only shader variants need to clear the writes_* flags if the epilog kills
them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
b85984d2b5 radeonsi: gather VS system value usage from shader variants
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
f5bc1ebc11 radeonsi: don't check sel->nir in si_init_shader_selector_async
It's always non-NULL.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
81bdf1ace6 nir: remove unnecessary (nir_shader *) typecasts
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34489>
2025-05-13 15:38:37 +00:00
Marek Olšák
f6b3c2c97a radeonsi: remove dead gfx12 tess code from a gfx6-11 function
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34863>
2025-05-08 02:54:13 +00:00
Ganesh Belgur Ramachandra
b1a34ac95d radeonsi: change do_update_shaders boolean to a bitmask
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29326>
2025-05-07 15:43:14 +00:00
Pierre-Eric Pelloux-Prayer
091d52965f radeonsi: init use_aco properly when llvm is disabled
Otherwise shaders are compiled with ACO anyway and we hit the assert
added by 7f7d6deb18 ("radeonsi: add ACO-specific main shader parts").

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34574>
2025-04-23 07:59:10 +00:00
Marek Olšák
be8977811b ac/nir: remove shader_info parameter from ac_nir_compute_tess_wg_info
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:55:00 -04:00
Marek Olšák
d82eda72a1 ac/gpu_info: move HS info into radeon_info
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:55:00 -04:00
Marek Olšák
c057d9105f ac/gpu_info: add total_tess_ring_size
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
2025-04-19 22:54:59 -04:00
Samuel Pitoiset
bc811a602e radeonsi: fix configuring compute scratch
Missed the two different variables for graphics vs compute.

Fixes: e433a57650 ("ac,radeonsi: rework computing scratch wavesize and tmpring register")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34586>
2025-04-18 06:50:16 +00:00
Samuel Pitoiset
e433a57650 ac,radeonsi: rework computing scratch wavesize and tmpring register
To be re-used by RADV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34549>
2025-04-17 10:35:40 +00:00
Marek Olšák
7f7d6deb18 radeonsi: add ACO-specific main shader parts
We can't have merged shaders where the first part is compiled using ACO
and the second part is compiled using LLVM.

Add ACO-specific main shader parts to fix that.

This happens when ACO is enabled for gfx12 streamout where GS can be paired
with a previous shader compiled by LLVM.

Fixes: 8ba718fb7d - radeonsi/gfx12: use ACO for streamout because it's faster

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34491>
2025-04-14 22:44:13 +00:00
Marek Olšák
4865ac57cc radeonsi: make si_shader_selector::main_shader_part_* an iterable union
for the next commit

Fixes: 8ba718fb7d - radeonsi/gfx12: use ACO for streamout because it's faster

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34491>
2025-04-14 22:44:13 +00:00
Marek Olšák
bafab3324e radeonsi: reflect blitter VS in si_context::num_vertex_elements
Set it to 0 if the VS doesn't use VBOs. This fixes an assertion failure.

Fixes: 7bf5d2ce75 - radeonsi: add assertion requiring binding vertex elements before vertex_buffers
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12698
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:53 +00:00
Marek Olšák
36ccc300d8 radeonsi: enable NGG culling when the shader writes the viewport index
Only W and face culling is enabled.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:52 +00:00
Timur Kristóf
94996d546c nir: Don't include the full nir.h when not necessary.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33439>
2025-02-12 22:33:07 +01:00
Marek Olšák
82047fa82f amd: drop support for LLVM 15, 16, 17
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33211>
2025-02-01 04:22:30 +00:00
Marek Olšák
19907a24ec radeonsi: validate BITSET_TEST_RANGE_INSIDE_WORD assertion at compile time
This will prevent accidental crashes and hangs because of how we define
tracked enums.

The reg_enum parameter must be a compile-time constant.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
2025-01-29 07:19:59 +00:00