Commit graph

55523 commits

Author SHA1 Message Date
Christoph Bumiller
19ea0bd521 nouveau: align PIPE_BIND_SHADER,COMPUTE_RESOURCEs to 256 bytes 2013-03-12 12:55:36 +01:00
Christoph Bumiller
47f2179844 nv50,nvc0: copy writable flag on surface creation 2013-03-12 12:55:36 +01:00
Christoph Bumiller
7a91d3a2a4 nv50/ir: add support for different sampler and resource index on nve4
And remove non-working code for indirect sampler/resource selection.
Will be added back later.

Includes code from "nv50/ir/tgsi: Resource indirect indexing" by
Francisco Jerez (when mixing the R and S handles we can only specify
them via a register, i.e. indirectly, unless we upload all the used
handle combinations to c[] space, which we don't for now).
2013-03-12 12:55:36 +01:00
Christoph Bumiller
99e4eba669 nv50/ir: implement splitting of 64 bit ops after RA 2013-03-12 12:55:36 +01:00
Christoph Bumiller
ac9f19e485 nvc0/ir: skip back edges when determining latest sched value 2013-03-12 12:55:36 +01:00
Christoph Bumiller
f07c46a4f4 nvc0/ir: use large issue delay after RET, too 2013-03-12 12:55:36 +01:00
Christoph Bumiller
b23ec3f8ba nv50/ir: fix size adjustment for sched info for multiple functions 2013-03-12 12:55:36 +01:00
Christoph Bumiller
d39169cb6d nv50/ir: print function inputs and outputs 2013-03-12 12:55:36 +01:00
Christoph Bumiller
1b4faa2b17 nv50/ir/ssa: add a few comments regarding RenamePass 2013-03-12 12:55:36 +01:00
Francisco Jerez
1535b754fb nv50/ir/tgsi: Exclude local declarations from function prototypes. 2013-03-12 12:55:36 +01:00
Christoph Bumiller
9b563ef3f7 nv50/ir/opt: try to make use of SUCLAMP addend 2013-03-12 12:55:36 +01:00
Christoph Bumiller
a788be19e5 nv50/ir: don't assert on type in Modifier.applyTo if it is 0 2013-03-12 12:55:35 +01:00
Christoph Bumiller
c3a5bc0bdf nv50/ir: add support for barriers
nv50 part by Francisco Jerez.
2013-03-12 12:55:35 +01:00
Christoph Bumiller
a0a25191f2 nv50/ir/tgsi: add support for atomics 2013-03-12 12:55:35 +01:00
Christoph Bumiller
c2dfcd7f0e nv50/ir/tgsi: handle TGSI_OPCODE_LOAD,STORE
Squashed and (heavily) modified original patches by Francisco Jerez:
nv50/ir/tgsi: Implement resource LOAD/STORE (wip).
nv50/ir/tgsi: Emit SUST/SULD for surface access, and add CB LOAD/STORE support
nv50/ir/tgsi: Fix/clean up the LOAD/STORE handling code.

Left out for now:
nv50/ir/tgsi: Resource indirect indexing

Treating raw, read-only surfaces as constant buffers (CBs) was removed
because CBs are limited to a size of 64 KiB which isn't desireable, and
because this decision should probably be made by the state tracker.
If we used a number of CB slots for surfaces, it might find that we
cannot accomodate the advertised limit.
2013-03-12 12:55:35 +01:00
Christoph Bumiller
d105b3df14 nvc0/ir: don't replace load from input in COMPUTE progs with VFETCH 2013-03-12 12:55:35 +01:00
Christoph Bumiller
4506ed28de nvc0/ir: implement lowering of surface ops for nve4 2013-03-12 12:55:35 +01:00
Christoph Bumiller
8ac68b071d nvc0/ir: add formatted surface load lib code, move to extra header
OpenGL is nice and makes the user specify a format with an image unit.
OpenCL is evil and doesn't, and what's better than adding a huge load
of functions that we call indirectly to handle the conversion ?
2013-03-12 12:55:35 +01:00
Christoph Bumiller
ce1951daed nv50/ir: extend moveSources for delta < 0 2013-03-12 12:55:35 +01:00
Christoph Bumiller
c0fc3463e9 nvc0/ir: lower atomics in s[] 2013-03-12 12:55:35 +01:00
Christoph Bumiller
9c196779bc nvc0/ir/emit: implement INSBF, EXTBF, PERMT and ATOM 2013-03-12 12:55:35 +01:00
Christoph Bumiller
c8f0c43f7a nv50/ir/emit: handle OP_ATOM 2013-03-12 12:55:35 +01:00
Christoph Bumiller
d6c95f6819 nvc0/ir/target: some ops can't be predicated, e.g. CALL 2013-03-12 12:55:35 +01:00
Christoph Bumiller
1ed507ca46 nv50/ir/opt: CALLs cannot load 2013-03-12 12:55:35 +01:00
Christoph Bumiller
c893b94060 nv50/ir: add support for indirect BRA,CALL 2013-03-12 12:55:34 +01:00
Christoph Bumiller
efe55075b5 nvc0/ir/emit: implement move to and logic ops on predicates 2013-03-12 12:55:34 +01:00
Christoph Bumiller
ce7610f7d5 nvc0/ir/emit: implement surface related ops 2013-03-12 12:55:34 +01:00
Christoph Bumiller
3741b7d844 nv50/ir: initialize CodeEmitters' specialized target fields 2013-03-12 12:55:34 +01:00
Christoph Bumiller
b0fc2f13ec nv50/ir/opt: make optimization aware of atomics, barriers, surface ops 2013-03-12 12:55:34 +01:00
Christoph Bumiller
22b762f9b4 nv50/ir: add various new OPs that will be needed for compute 2013-03-12 12:55:34 +01:00
Francisco Jerez
c82714c593 nv50/ir: Rename "mkLoad" to "mkLoadv" for consistency. 2013-03-12 12:55:34 +01:00
Christoph Bumiller
cc30ce8160 nv50/ir: fix comparison of system values 2013-03-12 12:55:34 +01:00
Francisco Jerez
4ddfdcea04 nv50/ir/tgsi: Translate grid-related system parameters. 2013-03-12 12:55:34 +01:00
Francisco Jerez
8446c31d0e nv50/ir/tgsi: Accept COMPUTE programs. 2013-03-12 12:55:34 +01:00
Christoph Bumiller
e9294e11b4 nv50/ir/ra: make sure all used function inputs get assigned a reg
A live range [0, 0) counts as empty. For function inputs this can
be a problem, so insert a nop at the beginning to make it [0, 1).
This is a bit of a hack but also the most simple solution.
2013-03-12 12:55:34 +01:00
Christoph Bumiller
ee431b12ec nv50/ir/ra: also add pre-existing MERGE,SPLIT to constraint list 2013-03-12 12:55:34 +01:00
Christoph Bumiller
f1dfa414f4 nv50/ir/ra: fix confusion with conditional RegisterSet::occupy 2013-03-12 12:55:34 +01:00
Christoph Bumiller
d995f44f0b nv50/ir/ra: swap copyCompound args if src is compound and dst isn't 2013-03-12 12:55:33 +01:00
Francisco Jerez
95ad9bca2f nv50/ir/ra: Fix maxGPR calculation for programs with multiple functions. 2013-03-12 12:55:33 +01:00
Francisco Jerez
ca04e71024 nv50/ir/ra: Fix traversal before the beginning of the active list in buildRIG. 2013-03-12 12:55:33 +01:00
Francisco Jerez
fe17d8a7c0 nv50/ir/ra: Fix RegisterSet::occupy(const Value *v). 2013-03-12 12:55:33 +01:00
Francisco Jerez
49ded0e132 nv50/ir/ra: Fix argument const-ness in RegisterSet::idToUnits and idToBytes 2013-03-12 12:55:33 +01:00
Francisco Jerez
5959d4247a nv50/ir/opt: Fix tryPropagateBranch for BBs with several exit branches.
Comments and "if (bf->cfg.incidentCount() == 1)" condition added
by Christoph Bumiller.
2013-03-12 12:55:33 +01:00
Francisco Jerez
572bf83ec0 nv50/ir: Clean up references to function values before destroying them. 2013-03-12 12:55:33 +01:00
Francisco Jerez
12f65e38c0 nouveau: Bail out from nouveau_fence_wait if flushing the pushbuf fails. 2013-03-12 12:55:33 +01:00
Vinson Lee
543d032885 mesa: Use correct functions for enum conversion.
Fixes mixing enum types defects reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-03-11 23:44:10 -07:00
Rob Clark
6173cc19c4 freedreno: gallium driver for adreno
Currently works on a220.  Others in the a2xx family look pretty similar
and should be pretty straightforward to support with the same driver.

The a3xx has a new shader ISA, and while many registers appear similar,
the register addresses have been completely shuffled around.  I am not
sure yet whether it is best to support with the same driver, but
different compiler, or whether it should be split into a different
driver.

v1: original
v2: build file updates from review comments, and remove GPL licensed
    header files from msm kernel
v3: smarter temp/pred register assignment, fix clear and depth/stencil
    format issues, resource_transfer fixes, scissor fixes

Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-03-11 21:53:24 -04:00
José Fonseca
44a8e51354 d3d1x: Remove.
Unused/unmaintained.

Reviewed-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
2013-03-12 00:35:06 +00:00
José Fonseca
7db60f049f nv50: Remove nv0_ir_from_sm4.*
Unused, depends on d3d1x.

Reviewed-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
2013-03-12 00:35:06 +00:00
Roland Scheidegger
5c41d1c222 gallivm: clean up passing derivatives around
Previously, the derivatives were calculated and passed in a packed form
to the sample code (for implicit derivatives, explicit derivatives were
packed to the same format).
There's several reasons why this wasn't such a good idea:
1) the derivatives may not even be needed (not as bad as it sounds since
llvm will just throw the calculations needed for them away but still)
2) the special packing format really shouldn't be part of the sampler
interface
3) depending what the sample code actually does the derivatives will
be processed differently, hence there is no "ideal" packing. For cube
maps with explicit derivatives (which we don't do yet) for instance the
packing looked downright useless, and for non-isotropic filtering we'd
need different calculations too.

So, instead just pass the derivatives as is (for explicit derivatives),
or let the rho calculating sample code calculate them itself. This still
does exactly the same packing stuff for implicit derivatives for now,
though explicit ones are handled in a more straightforward manner (quick
estimates show performance should be quite similar, though it is much
easier to follow and also does the rho calculation per-pixel until the
end, which we eventually need for spec compliance anyway).

No piglit changes.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-03-12 00:24:22 +01:00