Commit graph

132806 commits

Author SHA1 Message Date
Icecream95
152bc5d15e pan/mdg: Support loads and stores to scratch memory
Similar to shared memory load/store, except giving a different memory
type to the hardware.

Add nir->scratch_size to ctx->tls_size to allocate the memory.

Tested with the Piglit OpenCL test i32-stack-array.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
684e5aa5b8 pan/mdg: Invert the type conditional for load intrinsics
There are now more intrinsics for which nir_type_uint is forced than
where the destination type is used to find the intrinsic type, so
invert the conditional so that nir_type_uint is the default case when
nothing more specific is given.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
3665855c2e pan/mdg: Pass the memory type to mir_set_offset directly
We want to add support for more memory types, so replace the is_shared
bool with an integer that is directly stored to load_store.arg_1.

The new memory type values are off by 0x40, as that bit now comes from
the index type.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
b504602370 pan/mdg: Add i2i64 to mir_match_offset
Similar to the existing u2u64 function, but with a different type.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
b7f2619798 pan/mdg: Return false instead of asserting in mir_args_ssa
mir_args_ssa asserted that the given number of arguments to use is
greater than or equal to the actual number, but this is not checked by
callers, so instead of crashing return false to mark failure.

Fixes the local memory atomics OpenCL tests in Piglit.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
e5e8a628c2 pan/mdg: Replace zext with a type enum
The index type is actually a two-bit field, with support for both sign
and zero extension.

What was previously labelled as `zext` actually does sign-extension,
but we want that in most cases anyway.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
f3a00c351d panfrost: Allow NULL for some binding functions
Handle Clover passing NULL to bind_sampler_states and
set_sampler_views when cleaning up after launching a job.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
ab97517596 pan/mdg: Support nir_intrinsic_group_memory_barrier
Treat it like the other memory barriers and do nothing.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
ce58996999 pan/mdg: Support nir_intrinsic_load_global_constant
Treat it the same as nir_intrinsic_load_global.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
1db1537e95 pan/mdg: Use the pan_nir_lower_64bit_intrin NIR pass
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
e8b3d7c6f0 panfrost: Add a NIR pass to lower 64-bit vec3 intrinsic loads
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
cff64e3b09 panfrost: Stop lowering cs derived sysvals in glsl
Mali GPUs have native gl_GlobalInvocationID support, so we don't want
it to be lowered.

Although we do want to lower gl_LocalInvocationIndex, the single CAP
doesn't allow for choosing what to lower. We've already told NIR to do
the lowering instead, so just disable the GLSL-level lowering.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
65354d7671 pan/mdg: Set compute lowering options
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
fbc97ab125 pan/mdg: Implement load_global_invocation_id
NIR generates global_invocation_id, but Clover lowers it to
global_invocation_id_zero_base. It isn't lowered for OpenGL,
so we need to support both intrinsics.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
3448a42bf5 pan/mdg: Add load_kernel_input support
Similar to uniform loads, except that the offset is in bytes instead
of vec4 units.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
97929b1aaf pan/mdg: Fix promoted uniform moves with 64-bit types
The move source is the second src, not the first one.

Fixes: 5e5ea25a0d ("pan/mdg: Explicitly type 64-bit uniform moves")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Icecream95
1840404783 nir: Handle load_kernel_input in nir_get_io_offset_src
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
2021-01-01 02:58:49 +00:00
Vinson Lee
0644f885b0 virgl: Fix typos.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8072>
2020-12-31 18:04:44 -08:00
Eric Anholt
9f213238b8 ci/softpipe: Update the comment about the rasterpos flake.
The noted fix landed, but a test fix was needed.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8275>
2020-12-31 09:43:44 -08:00
Eric Anholt
01d62dcb28 ci/softpipe: Ban glx-multithread-texture, too.
This one also flakes on us.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8275>
2020-12-31 09:43:18 -08:00
Eric Anholt
30caea2820 ci/softpipe: Skip flaky triangle-rasterization-overdraw.
It runs a different test each run based on current time, and fails
occasionally.  Until the test can get fixed, remove it.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8275>
2020-12-31 09:43:09 -08:00
Daniel Schürmann
a3785e3481 nir/opt_vectorize: hash whether a swizzle accesses elements beyond the maximum vectorization factor
Swizzles that access components outside of the maximum
vector size cannot be vectorized with each other.
This patch creates different hash bins for this case.

For example accesses to .x and .y are considered different variables
compared to accesses to .z and .w for 16-bit vec2.

This prevents the vectorization of things like
   vec2 16 ssa_3 = iadd ssa_1.xz, ssa_2.xz

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6666>
2020-12-31 16:44:58 +00:00
Daniel Schürmann
46e7428031 nir/opt_vectorize: rehash users of vectorized instructions
This ensures that chains of ALU instructions are vectorized
in a single iteration.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6666>
2020-12-31 16:44:58 +00:00
Daniel Schürmann
8eaf9c61d1 nir/opt_vectorize: don't hash filtered instructions
This patch also changes nir_opt_vectorize_cb to
use only one instruction as parameter.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6666>
2020-12-31 16:44:58 +00:00
Daniel Schürmann
23b2885514 nir/opt_vectorize: don't hash instructions which are already vectorized
This guarantees that the hashset contains exactly the instructions
which can be vectorized.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6666>
2020-12-31 16:44:58 +00:00
Daniel Schürmann
ad37e4df73 nir/opt_vectorize: use a single instruction per hash entry instead of a vector
This drastically simplifies vectorization but may potentially
lead to slightly worse vectorizations.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6666>
2020-12-31 16:44:58 +00:00
Samuel Pitoiset
0b503d8de9 nir: fix determining if an addition might overflow for phi sources
nir_addition_might_overflow() expects the parent instruction to be
an alu instr but it might be a phi instr. Fix it by assuming that
the addition might overflow.

This fixes compiler crashes with Horizon Zero Dawn.

No fossils-db changes.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8268>
2020-12-31 16:17:08 +00:00
Alyssa Rosenzweig
129d390bd8 pan/mdg: Fix bound setting in RA for sources
The bound parameter allows us to prevent allocations from crossing
particular boundaries (typically 128-bit boundaries). For 16-bit, we
don't want to cross 64-bit boundaries, in order to keep swizzles
possible to encode. We already handle this for 16-bit destinations, but
it _also_ needs to be (redundantly) handled for 16-bit sources, in case
types don't match (for example, with a vectorized size conversion
instruction).

Fixes a few newer dEQP fails.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8282>
2020-12-31 10:50:49 -05:00
Boris Brezillon
469d74908c pan/bi: Fix ATEST emission
The ATEST FAU index must point to the ATEST parameter datum slot
otherwise the cmdstream config is ignored.

(Rebased by Alyssa)

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
f6e128fb8f pan/bi: Remove old IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
e904bbb170 pan/bi: Use new instruction types
And remove now redundant casts

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
cf5b2b8939 pan/bi: Remove old IR instruction emit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
b691aeaacf pan/bi: Remove old IR opcode table
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
f474e6a47c pan/bi: Remove old IR helpers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
e5ec0dc183 pan/bi: Remove NIR->old IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
fa465d52b9 pan/bi: Remove old IR scheduling
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
029e928226 pan/bi: Remove old IR spill code
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
4e4146c990 pan/bi: Remove old IR prints
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
7e8022fa8a pan/bi: Remove packing helpers
Support code for the old IR packing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
a1e150fc4d pan/bi: Remove old IR packs
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
8b0d0a931b pan/bi: Remove combine lowering
Unused.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
39aa8c4a5a pan/bi: Switch to new IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
73169aa0b4 pan/bi: Stub FAU lowering pass
A given tuple can only load a single entry from FAU-RAM, so we need a
lowering pass before scheduling to assign FAU and lower the other
sources to moves.

Right now this only handles constants. Uniforms and general FAU are
todo.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
239ef52216 pan/bi: Add bi_branch, bi_jump helpers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
0f6e317045 pan/bi: Schedule new instructions singletons
We'll let the routines coexist for a moment, just to keep the commits
digestible, but this is modified from bi_make_singleton.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
84f251c38a pan/bi: Add bi_message_type_for_instr helper
Greatly simplified by the use of the table.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
26ce13f657 pan/bi: Add instruction emit for builder
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
f7c2fc7eba pan/bi: Add emit tex for builder
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
26cbf559d6 pan/bi: Fix TEXS/TEXC check prototype
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00
Alyssa Rosenzweig
70d6c5675d pan/bi: Emit TEXC with builder
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
2020-12-31 14:39:02 +00:00