Commit graph

11465 commits

Author SHA1 Message Date
Johannes Obermayr
5e162566db ilo: Fix out-of-tree build.
[olv: use $(srcdir) instead of $(top_srcdir)]
2013-10-30 21:17:10 +08:00
Rob Clark
2bc1fc2fb6 freedreno: emulated unsupported primitive types
Use u_primconvert to convert unsupported primitives into supported
primitive plus index buffer.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-10-29 16:49:43 -04:00
Rob Clark
28f3f8d413 gallium/auxiliary/indices: add start param
Add 'start' parameter to generator/translator.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-10-29 16:49:43 -04:00
Rob Clark
5127436a4a freedreno: update generated headers
pull in some fixes to draw-initiator/prim-type.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-10-29 16:49:43 -04:00
Roland Scheidegger
e4195acab5 llvmpipe: fix bogus layer clamping in setup
The layer coming from GS needs to be clamped (not sure if that's actually
the correct error behavior but we need something) as the number can be higher
than the amount of layers in the fb. However, this code was using the layer
calculation from the scene, and this was actually calculated in
lp_scene_begin_rasterization() hence too late (so setup was using the value
from the _previous_ scene or just zero if it was the first scene).
Since the value is used in both rasterization and setup, move calculation up
to lp_scene_begin_binning() though it's a bit more inconvenient to calculate
there. (Theoretically could move _all_ code which was in
lp_scene_begin_rasterization() to there, because ever since we got rid of
swizzled render/depth buffers our "map" functions preparing the fb data for
render don't actually change the data in there at all, but it feels like
it would be a hack.)

v2: improve comments

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-10-29 17:54:03 +01:00
Matthew McClure
be0b67a143 util,llvmpipe: correctly set the minimum representable depth value
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-10-29 15:53:48 +00:00
Brian Paul
ea9fe9ebdb svga: reindent drawing code 2013-10-29 08:09:34 -06:00
Vadim Girlin
8bd4476010 r600g/sb: fix value::is_fixed()
This prevents unnecessary (and wrong) register allocation in the
scheduler for preloaded values in fixed registers.

Fixes interpolation-mixed.shader_test on rv770
(and probably on all other pre-evergreen chips).

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Tested-by: Andreas Boll <andreas.boll.dev@gmail.com>
2013-10-29 05:49:21 +04:00
Christian König
925ffa8c4a vl/h264: split fields into SPS/PPS
Add alot of missing fields as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-10-28 11:08:12 +01:00
Christian König
6f2410c9aa radeon/uvd: fix H264 chroma format handling
Signed-off-by: Christian König <christian.koenig@amd.com>
2013-10-28 11:06:37 +01:00
Chia-I Wu
d2fdc0d634 ilo: minor cleanups for recent interface changes
Kill ilo_bind_sampler_states2 and ilo_set_sampler_views2.  Map
PIPE_FORMAT_R10G10B10A2_UINT to BRW_SURFACEFORMAT_R10G10B10A2_UINT.
2013-10-28 11:40:41 +08:00
Ilia Mirkin
12d39b4fa8 gallium: add PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
This CAP will determine whether ARB_framebuffer_object can be enabled.
The nv30 driver does not allow mixing swizzled and linear zsbuf/cbuf
textures.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2013-10-26 01:36:07 +02:00
Marek Olšák
9807556e86 r600g,radeonsi: use fences provided by the winsys 2013-10-25 11:55:55 +02:00
Marek Olšák
6067a30838 winsys/radeon: add the implementation of fences from r300g 2013-10-25 11:55:55 +02:00
Marek Olšák
48784f3591 radeonsi: add the vertex shader position output if it's missing
This fixes a lockup in piglit/spec/glsl-1.40/execution/tf-no-position.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-10-25 11:55:55 +02:00
Marek Olšák
94715130e6 radeonsi: respect semantic indices for COLOR[i] fragment shader outputs
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-10-25 11:55:55 +02:00
Rob Clark
a453242fda freedreno/a3xx/compiler: relative addressing
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-10-24 20:21:08 -04:00
Rob Clark
4317c4e6e0 freedreno/a3xx: fix const/rel/const-rel encoding
The encoding of constant, relative, and relative-const src registers is
a bit more complex than originally thought, which gives an extra bit to
encode const reg # at expense of taking a bit from relative offset.

In most cases a3xx seems to actually use a scheme whereby it can encode
an extra bit for const register.  You have three possible encodings in
thirteen bits:

   register:  (11 bits for N.c)
     00........... rN.c

   relative:  (10 bits for N)
     010.......... r<a0.x + N>
     011.......... c<a0.x + N>

   const:     (12 bits for N.c)
     1............ cN.c

Which means we can deal w/ more consts than previously thought.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-10-24 20:21:08 -04:00
Rob Clark
bfd30935c9 freedreno/a3xx: add blend state
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-10-24 20:21:08 -04:00
Rob Clark
0a1e4361e8 freedreno/resource: fail more gracefully
Fail more gracefully when buffer allocation/import fails.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-10-24 20:21:08 -04:00
Brian Paul
8d7b913e4e svga: remove user-space vertex/index buffer code
The gallium vbuf module, which we've been using for some time now, takes
care of uploading user-space vertex/index data into real buffers.  The
upload code in the svga driver was unused.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2013-10-24 10:45:47 -06:00
Rob Clark
a6e45b6a17 freedreno: fix compile error
Small typo introduced in a3ed98f.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-10-23 18:38:05 -06:00
Brian Paul
c1345720c8 nv50: clamp PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS to PIPE_MAX_SAMPLERS
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70212
Tested-by: Aaron Watry <awatry@gmail.com>
2013-10-23 13:43:18 -06:00
Brian Paul
ef98e2ee61 radeonsi: remove unused si_set_cs_sampler_view()
Fixes build breakage.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70804

Tested-by: Vinson Lee <vlee@freedesktop.org>
2013-10-23 13:42:51 -06:00
Brian Paul
a3ed98f7aa gallium: new, unified pipe_context::set_sampler_views() function
The new function replaces four old functions: set_fragment/vertex/
geometry/compute_sampler_views().

Note: at this time, it's expected that the 'start' parameter will
always be zero.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Emil Velikov <emil.l.velikov@gmail.com>
2013-10-23 10:15:38 -06:00
Brian Paul
b11fc226e6 svga: remove unneeded include of u_double_list.h 2013-10-23 10:15:38 -06:00
Roland Scheidegger
ac81b6f2be llvmpipe: enable seamless cube filtering
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-10-21 15:42:04 +02:00
David Heidelberger
c948aab96c r300g/compiler: Fix unsigned comparison with less than zero
rc_find_free_temporary_list() returns signed integer
(in case of lack of free temporary registers returns -1),
so new_index in radeon_rename_regs() should be signed.

https://bugs.freedesktop.org/show_bug.cgi?id=54867

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2013-10-21 01:31:51 +02:00
Vinson Lee
c325aa5d80 r600g/sb: Initialize shader::dce_flags.
Fixes "Uninitialized scalar field" defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-10-20 00:38:40 -07:00
Vadim Girlin
62c8149472 r600g/sb: fix issue with DCE between GVN and GCM (v2)
We can't perform DCE using the liveness pass between GVN and GCM
because it relies on the correct schedule, but GVN doesn't care about
preserving correctness - it's rescheduled later by GCM.

This patch makes dce_cleanup pass perform simple DCE
between GVN and GCM instead of relying on liveness pass.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70088

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-10-17 07:57:49 +04:00
José Fonseca
40ddd8b659 Revert "scons: Fix build when rtti is disabled"
This reverts commit 94d05bf87a as it has a
few problems:

- it breaks windows builds becuase env[LLVM_CXXFLAGS] is never set there

- it is merging not only rtti, but the whole cxxflags (defines etc)
  which has proven to be a source of troubles (breaks debugging etc.)
2013-10-16 15:05:51 -07:00
Tom Stellard
9da4021626 radeonsi: Use 'SI' as the LLVM processor for CIK on LLVM <= 3.3
LLVM 3.3 does not know about CIK processors, and the codes paths for SI
and CIK are the same.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: "9.2" <mesa-stable@lists.freedesktop.org>
2013-10-16 12:55:30 -04:00
Tom Stellard
13ac38b4ef r600g/compute Improve debugging output 2013-10-16 09:39:31 -07:00
Brian Paul
4f08cdefda svga: minor fix-ups in svga_get_shader_param()
Fix debug error message.  Add switch case for PIPE_SHADER_COMPUTE.
Trivial.
2013-10-16 08:26:45 -06:00
Alexander von Gluck IV
94d05bf87a scons: Fix build when rtti is disabled
* The rtti fix actually dug up a bug in the scons build scripts.
* Autotools took the LLVM cpp and cxx flags, while scons only took
  the cpp flags.
* This grabs the cxx flags and applies them where needed. We may
  want to make the same change for the llvm cpp flags in scons.
* The only linux platform I can find with LLVM no-rtti is Ubuntu.
* Fixes bug #70471

Tested-by: Vinson Lee <vlee@freedesktop.org>
2013-10-15 22:12:18 -05:00
José Fonseca
85d7f6779f llvmpipe: Advertise PIPE_CAP_DEPTH_CLIP_DISABLE.
Actually implemented by draw module.

Tested piglit ARB_depth_clamp tests, which pass 100%.

Trivial.
2013-10-15 18:22:57 -07:00
Grigori Goronzy
f250fd59c4 radeon: use staging for mapping linear textures
Textures that likely reside in VRAM, are mapped for reading and
don't require direct mapping should be staged into GTT, to avoid bad
performance. This fixes readback performance of VDPAU surfaces.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-10-13 20:09:34 +02:00
Grigori Goronzy
270fab5164 radeon/uvd: use PIPE_BIND_LINEAR for video surfaces
This new bind flag forces linear storage, but does not have other
side effects like R600_RESOURCE_FLAG_TRANSFER.

Reviewed-by: Christian König <christian.koenig@amd.com>
2013-10-13 20:09:02 +02:00
Vincent Lejeune
6e51c2a941 radeonsi: Allow Sinking pass to move preloaded const/res/sampl
This fixes a crash in Unigine Heaven 3.0, and probably in some
others apps.
2013-10-13 20:03:42 +02:00
Vadim Girlin
453ea2d309 radeonsi: pass alpha_ref value to PS in the user sgpr
Currently it's hardcoded in the shader, so every change requires
compilation of the shader variant, killing the performance
in Serious Sam 3 and probably other apps.

This patch passes alpha_ref in the user sgpr and removes it from
the shader key.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-10-13 20:03:35 +04:00
Vadim Girlin
10ddeb910b r600g: fix tgsi_op2_s with trans-only instructions
This fixes the issue when dst and src is the same reg and operation on one
channel overwrites the source for other channels, e.g.:

UMUL TEMP[2].xyz, TEMP[0].xyzz, TEMP[2].xxxx

In this example the result of the operation on channel x is written in
TEMP[2].x and then used as a second source operand for channels y and z
instead of original value in TEMP[2].x.

This patch stores the results in temp reg and moves them to
dst after performing operation on all channels.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70327

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
2013-10-13 20:03:35 +04:00
Stephane Marchesin
5ceeeb360e i915g: Fix assert
Now that we support start, assert on start + num < max samplers

Reported by xexaxo
2013-10-12 11:40:54 -07:00
Jay Cornwall
d7d539a1cb radeon/llvm: show LLVM disassembly when available
With code dump enabled LLVM may generate disassembly during compilation.
Show this disassembly when available and prefer it to SI bytecode dump.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Jay Cornwall <jay@jcornwall.me>
2013-10-12 00:03:58 -04:00
Roland Scheidegger
7681beedd1 softpipe: fix seamless cube filtering
Fix coord wrapping (and face selection too) in case of edges.
Unfortunately, the coord wrapping is way more complicated than what
the code did, as it depends on the face and the direction where the
texel falls off the face (the logic needed to get this right in fact
seems utterly ridiculous).
Also fix a bug in (y direction under/overflow) face selection.
And get rid of complicated cube corner handling. Just like edge case,
the coord wrapping was wrong and it seems very difficult to fix.
I'm near certain it can't always work anyway (though ordinary seamless
filtering on edge has actually a similar problem but not as severe)
because we don't have per-pixel face, hence could have multiple corner
texels which would make it very difficult to average the remaining texels
correctly. Hence simply pick a texel which would only have fallen off one
edge but not both instead, which is not quite accurate but actually I think
should be enough to meet OpenGL (but not d3d10) requirements.

v2: small fixes suggested by Brian, add some comments.

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-10-12 04:05:57 +02:00
Roland Scheidegger
75f1fea14f llvmpipe: increase fs shader variant instruction cache limit by factor 4
The previous limit of of 128*1024 was reported to cause frequent recompiles
in some apps due to shader variant thrashing on IRC in some apps leading
to noticeable lags.
Note that the LP_MAX_SHADER_VARIANTS limit (1024) was more or less impossible
to reach, since even simple fragment shaders without texturing (glxgears) used
more than twice than 128 instructions, hence the instruction limit would have
always been reached first (excluding things like trivial shaders not writing
color). Even with the new limit it is VERY likely the instruction limit is hit
first.
Should help with such lags due to recompiles (though other shader types have
their own limits, LP_MAX_SETUP_VARIANTS and DRAW_MAX_SHADER_VARIANTS, in
particular the latter seems a bit small (128)).

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-10-12 04:05:57 +02:00
Brian Paul
1737189f0a svga: s/0/FALSE/ 2013-10-11 17:07:44 -06:00
Grigori Goronzy
3de7e11f58 r600g: fix crash in set_framebuffer_state
We should be able to safely set the framebuffer state without a
fragment shader bound. bind_ps_state will take care of updating the
necessary state bits later.

v2: check in update_db_shader_control
2013-10-11 17:33:18 +02:00
José Fonseca
1aef0ef277 llvmpipe: We don't use the draw pipeline for offset_point/line.
Unless the polygon fill mode is different from PIPE_POLYGON_MODE_FILL,
so checking the the polygon mode is sufficient.

Testing done: no regression in polygon-mode-offset
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-10-09 21:09:07 -07:00
Zack Rusin
edde6c77bd llvmpipe: abstract the code to set number of subpixel bits
As we're moving towards expanding the number of subpixel
bits and the width of the variables used in the computations
we need to make this code a bit more centralized.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-10-09 18:30:31 -04:00
Grigori Goronzy
5b4e2db12d radeon/uvd: disable VC-1 simple/main profile
It doesn't work (decodes to garbage) with most videos on UVD 3.0. Worse
yet, it often results in random memory corruption or GPU hangs. Rumor
has it only the newest UVD hardware could do it anyway.

Reviewed-by: Christian König <christian.koenig@amd.com>
2013-10-09 13:02:40 +02:00