Commit graph

20330 commits

Author SHA1 Message Date
Tom Stellard
a1b189ac90 radeon: Include radeon_elf_util.c in the list of LLVM_C_FILES v2
This fixes the a build breakage caused by
6974eb9076 on build configurations where
all the following are true:

1. radeonsi is not being built
2. r600g is being built
3. opencl is disabled
4. --enable-r600-llvm-compiler is not being used
5. libelf is not installed

v2:
  - Add $(RADEON_CFLAGS) to libllvmradeon_la_CFLAGS

Tested-by: Brian Paul <brianp@vmware.com>
2014-03-07 18:06:59 -05:00
Tom Stellard
6974eb9076 radeon/llvm: Factor elf parsing code out into its own function
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-07 13:31:52 -05:00
Tom Stellard
1f4a9fc84e radeon: Rename struct radeon_llvm_binary to radeon_shader_binary v2
And move its definition into r600_pipe_common.h;  This struct is a just
a container for shader code and has nothing to do with LLVM.

v2:
  - Drop unrelated Makefile change

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-07 13:31:51 -05:00
Marek Olšák
d8fde8ffed gallium: rename R4A4 and A4R4 formats to match their swizzle
Like L4A4.

Reviewed-by: Brian Paul <brianp@vmware.com>
2014-03-07 18:07:05 +01:00
Marek Olšák
472ac0db08 radeonsi: fix blit compressed texture workaround to support 2D arrays
We don't have a piglit test for this, but I think it's correct.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-07 18:07:05 +01:00
Marek Olšák
fcdf6fa86c r600g: fix blitting the last 2 mipmap levels for Evergreen
This fixes a lot of compressedteximage piglit tests.

R600-R700 don't have this issue.

Cc: mesa-stable@lists.freedesktop.org
2014-03-07 18:07:05 +01:00
Marek Olšák
8a08051e2a r600g: fix texelFetchOffset GLSL functions
Cc: mesa-stable@lists.freedesktop.org
2014-03-07 18:07:05 +01:00
Marek Olšák
67aef6dafa winsys/radeon: if there's VRAM-only usage, keep it 2014-03-07 18:07:05 +01:00
Niels Ole Salscheider
f112ba03bb radeon: Use upload manager for buffer downloads
Using DMA for reads is much faster.

Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Signed-off by: Marek Olšák <marek.olsak@amd.com>
2014-03-07 18:07:05 +01:00
Kusanagi Kouichi
7233d4479e st/vdpau: Add rotation v2
v2: add static asserts

Signed-off-by: Kusanagi Kouichi <slash@ac.auone-net.jp>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-03-07 09:20:11 +01:00
Kusanagi Kouichi
e7e207658c vl: Add rotation v3
v2: rotate in gen_rect_verts instead
v3: clear rotate in vl_compositor_clear_layers,
    update calc_drawn_area as well

Signed-off-by: Kusanagi Kouichi <slash@ac.auone-net.jp>
Signed-off-by: Christian König <christian.koenig@amd.com>
2014-03-07 09:20:11 +01:00
Christian König
53d1d879d5 st/omx/enc: fix crash on destruction
Signed-off-by: Christian König <christian.koenig@amd.com>
2014-03-07 08:55:57 +01:00
Michel Dänzer
9ceee5f4be clover: Fix build against LLVM SVN r203065 or newer
llvm/Linker.h was moved to llvm/Linker/Linker.h.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-03-07 11:12:12 +09:00
Aaron Watry
fb78152678 gallium/util: Fix memory leak
Fix a leaked vertex shader in u_blitter.c

Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

CC: "10.1" <mesa-stable@lists.freedesktop.org>
2014-03-06 11:38:26 -06:00
Rob Clark
4de1e5eddc WIP: freedreno/a3xx: incorrect scissor for binning pass
If scissor optimization is used (to avoid bringing scissored portions of
the render target into GMEM and then back out to system memory) in
combination with hw binning pass, the result would be a scissor mismatch
between binning pass and rendering pass.  This would cause rendering
bugs in some scenarios with (for example) gnome-shell.

I would have expected that simply using the correct screen-scissor
during the binning pass would be enough, but seems like there is
something else missing.  So for now disable binning pass if scissor
optimization is used.
2014-03-05 12:37:21 -05:00
Ilia Mirkin
c74783abfa nv50,nvc0: add 11f_11f_10f vertex support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-03-04 21:54:54 -05:00
Dieter Nützel
5f23a2d9c2 radeon/uvd: fix typo in documentation
s/grap/grab/

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-04 17:54:07 -05:00
Tom Stellard
262e15fdd4 clover: Use correct LLVM version in #if for DataLayout construction
Spotted by Michel Dänzer.
2014-03-04 16:22:09 -05:00
Zack Rusin
1dd84357ec translate: fix buffer overflows
Because in draw we always inject position at slot 0 whenever
fragment shader would take the maximum number of inputs (32) it
meant that we had PIPE_MAX_ATTRIBS + 1 slots to translate, which
meant that we were crashing with fragment shaders that took
the maximum number of attributes as inputs. The actual max number
of attributes we need to translate thus is PIPE_MAX_ATTRIBS + 1.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2014-03-04 15:56:04 -05:00
Zack Rusin
08f174daa4 draw/llvm: fix generation of the VS with GS present
draw_current_shader_* functions return a final output when considering
both the geometry shader and the vertex shader. But when code generating
vertex shader we can not be using output slots from the geometry shader
because, obviously, those can be completely different. This fixes a
number of very non-obvious crashes.
A side-effect of this bug was that sometimes the vertex shading code
could save some random outputs as position/clip when the geometry
shader was writing them and vertex shader had different outputs at
those slots (sometimes writing garbage and sometimes something correct).

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Matthew McClure <mcclurem@vmware.com>
2014-03-04 15:37:52 -05:00
Brian Paul
cbacee207f st/osmesa: check buffer size when searching for buffers
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75543
Cc: "10.1" <mesa-stable@lists.freedesktop.org>
2014-03-04 08:49:15 -07:00
Marek Olšák
1337da5115 r600g: implement edge flags
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-04 12:26:16 +01:00
Marek Olšák
ac35ded473 r600g: port color buffer format conversion from radeonsi
r600_translate_colorformat is rewritten to look like radeonsi.
r600_translate_colorswap is shared with radeonsi.
r600_colorformat_endian_swap is consolidated.

This adds some formats which were missing. Future "plain" formats will
automatically be supported.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-04 12:26:16 +01:00
Marek Olšák
dff3eccd15 radeonsi: move translate_colorswap to common code
Also translate the Y__X swizzle.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-04 12:26:16 +01:00
Hans
bf25660325 util: don't define isfinite(), isnan() for MSVC >= 1800
Signed-off-by: Brian Paul <brianp@vmware.com>
Cc: "10.0" "10.1" <mesa-stable@lists.freedesktop.org>
2014-03-03 11:56:30 -07:00
Brian Paul
465b2c42bc softpipe: use 64-bit arithmetic in softpipe_resource_layout()
To avoid 32-bit integer overflow for large textures.  Note: we're
already doing this in llvmpipe.

Cc: "10.0" "10.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2014-03-03 10:41:42 -07:00
Grigori Goronzy
86c06871a2 st/vdpau: fix possible NULL dereference
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-03-03 18:37:35 +01:00
Christian König
bd6654aa38 st/omx: always advertise all components
omx_component_library_Setup should return all entrypoints the library
implements, independent of what is available on the current hardware.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74944

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2014-03-03 18:22:38 +01:00
Bruno Jiménez
79c83837c9 clover: Fix building with latest llvm
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2014-03-03 17:16:58 +01:00
Dave Airlie
15b4ff3f4e st/dri: add support for dma-buf importer (DRIimage v8)
This is just a simple implementation that stores the extra values into the DRIimage
struct and just uses the fd importer. I haven't looked into what is required
to import YUV or deal with the extra parameters.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-03-03 11:14:38 +10:00
Dave Airlie
3fd081d1a5 st/dri: move fourcc->format conversion to a common place
Before I cut-n-paste this a 3rd time lets consolidate it.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-03-03 11:14:38 +10:00
Rob Clark
ecb71cfa66 freedreno/a3xx/compiler: overflow in trans_endif
The logic to count number of block outputs was out of sync with the
actual array construction.  But to simplify / make things less fragile,
we can just allocate the arrays for worst case size.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-03-02 11:26:35 -05:00
Rob Clark
e0007f733d freedreno/a3xx/compiler: fix for resolving PHI's
A value may be assigned on only one side of an if/else.  In this case we
can simply substitute a mov.f32f32.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-03-02 11:26:35 -05:00
Rob Clark
26530716ab freedreno/lowering: two-sided-color
Add option to generate fragment shader to emulate two sided color.
Additional inputs are added to shader for BCOLOR's (on corresponding to
each COLOR input).  CMP instructions are used to select whether to use
COLOR or BCOLOR.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-03-02 11:26:35 -05:00
Rob Clark
8dd70125fc freedreno/a3xx/compiler: add SSG
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-03-02 11:26:35 -05:00
Rob Clark
44c8f96b0d freedreno/a3xx: fix gl_PointSize
If vertex writes pointsize, there are a few extra bits we need to turn
on in the cmdstream here and there.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-03-02 11:26:35 -05:00
Rob Clark
05a9bda971 freedreno: resync generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-03-02 11:26:35 -05:00
Rob Clark
cb540c21f2 freedreno/a3xx: binning-pass vertex shader variant
Now that we have the infrastructure for shader variants, add support to
generate an optimized shader for hw binning pass (with varyings/outputs
other than position/pointsize removed).  This exposes the possibility
that the shader uses fewer constants than what is bound, so we have to
take care to not emit consts beyond what the shader uses, lest we
provoke the wrath of the HLSQ lockup!

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-03-02 11:26:35 -05:00
Rob Clark
664045752f freedreno/a3xx: add support for frag coord/face
Fixes anything that tries to use gl_FrontFacing/gl_FragCoord.  Also,
face support is needed to emulate two sided color.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-03-02 11:26:35 -05:00
Rob Clark
76924e3b51 freedreno/a3xx: fix for unused inputs
An unused input might not have a register assigned.  We don't want bogus
regid to result in impossibly high max_reg..

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-03-02 11:26:35 -05:00
Ilia Mirkin
f19271c7bf gallium/util: add missing u_math include
This is needed for MIN2/MAX2

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-02-28 20:00:34 -05:00
Siavash Eliasi
0fe8d71667 r300g/tests: Added missing fclose for FILE resource.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2014-02-28 15:57:15 -08:00
Tom Stellard
f61e382f0a r600g/compute: PIPE_CAP_COMPUTE should be false for pre-evergreen GPUs
This prevents clover from using unsupported devices.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

CC: "10.0 10.1" <mesa-stable@lists.freedesktop.org>
2014-02-28 16:17:34 -05:00
Thomas Hellstrom
f5e681f3fa winsys/svga: Avoid calling drm getparam for max surface size on older kernels
This avoids the kernel driver spewing out errors about the param not being
supported.

Also correct the max surface size used when the kernel does not support the
query.

Reported-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Cc: "10.1" <mesa-stable@lists.freedesktop.org>
2014-02-28 11:11:21 +01:00
Roland Scheidegger
612a1d5be1 util/u_format: don't crash in util_format_translate if we can't do translation
Some formats can't be handled - in particular cannot handle ints/uints formats,
which lack the pack_rgba_float/unpack_rgba_float functions. Instead of trying
to call these (and crash) return an error (I'm not sure yet if we should try
to translate such formats too here might not make much sense).

v2: suggested by Jose, use separate checks for pack/unpack of rgba_8unorm and
rgba_float functions (right now if one exists the other should as well).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2014-02-27 17:56:10 +01:00
Ilia Mirkin
51fc093421 nouveau: add a nouveau_compiler binary to compile TGSI into shader ISA
This makes it easy to compare output between different cards, especially
for ones that you don't have (and/or not in the current machine).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-26 23:35:48 -05:00
Ilia Mirkin
dd370f0af6 nv30: remove nv30_context use from nvfx_*prog
This should pave the way to being able to use the compiler without a
context. Also leads to cleaner code.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-26 23:35:47 -05:00
Ilia Mirkin
41dbc4c444 nv30: remove unused sprite flipping parameter
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-26 23:35:47 -05:00
Ilia Mirkin
fe2738f998 nv30: remove unused render_mode and hw_pointsprite_control
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-26 23:35:46 -05:00
Ilia Mirkin
8f23d08928 nv30: remove use_nv4x, it is identical to is_nv4x
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-02-26 23:35:45 -05:00