This will be used to enable the STD430 layout as the default for
UBOs and SSBOs with layouts of shared/packed rather than STD140.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
The CL CTS queries CL_DEVICE_MEM_BASE_ADDR_ALIGN for a device and
then allocates user pointers aligned to that value for its tests.
The minimum value is defined as:
the size (in bits) of the largest OpenCL built-in data type supported
by the device (long16 in FULL profile, long16 or int16 in EMBEDDED
profile) for devices that are not of type CL_DEVICE_TYPE_CUSTOM.
At the moment, all known devices that support user pointers require
CPU page alignment for buffers created from user pointers, so just
query that from sysconf.
v3: Use std::max instead of MAX2 (Francisco)
Add missing unistd include
v2: Use system page size instead of a new pipe cap
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by (v2): Jan Vesely <jan.vesely@rutgers.edu>
After the context is initialized, the API and context flags won't
change. So, we can compute whether vertex attribute 0 aliases
vertex position just once.
This should make the glVertexAttrib*() functions a little quicker.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Outdated, features.txt is used instead.
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Intel has a Jenkins setup and has made the various scripts and
documentation open source.
https://github.com/janesma/mesa_jenkins
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This is an unoffical unmaintained driver, we don't really want
people wasting effort trying to improve it.
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
This code was separated from the validation code so it could
use used with KHR_no_error paths. The return values were inverted
to reflect the name of the helper, but here the condtion was
mistakenly inverted rather than the return value.
Fixes: 4df2931a87 (mesa/vbo: move some Draw checks out of validation)
Reported-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
The INTEL_performance_query spec says
"Performance counter id 0 is reserved as an invalid counter."
GLuint counterid_to_index(GLuint counterid) just returns counterid - 1,
so with unsigned overflow rules, it will generate 0xFFFFFFFF given an
input of 0. 0xFFFFFFFF will trigger the counterIndex >= queryNumCounters
check, so the code worked as is. It just contained a useless comparison.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Previously clang would warn about redefinition of typedef EGLDisplay. Avoid
this by adding preprocessor guards to mesa_glinterop.h and including it
after EGL.h is indirectly included.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
brw_hw_type_to_reg_type() needs to know only whether the file is
BRW_IMMEDIATE_VALUE or not, which is not a valid file for the
destination. gcc and clang will evaluate __builtin_strcmp() at compile
time, so we can use it to pass a constant file for the destination.
text data bss dec hex filename
7816214 346248 420496 8582958 82f72e i965_dri.so before
7816070 346248 420496 8582814 82f69e i965_dri.so after
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
text data bss dec hex filename
7816886 346248 420496 8583630 82f9ce i965_dri.so before
7816214 346248 420496 8582958 82f72e i965_dri.so after
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
Previously the brw_inst{,_set}_{dst,src0,src1}_reg_type() functions
provided access to the hardware encodings for the register types. We
often mixed these with the logical BRW_REGISTER_TYPE_* enums (which
themselves used to be the hardware format!) with bad results.
With that functionality now available with the hw_ versions (see
previous commit), we now add functions that take the logical
BRW_REGISTER_TYPE_* enums and convert into the hardware format and vice
versa. To do the conversion we also have to provide the file.
Note the asymmetry between the two functions: the new getter reads the
file from the instruction word, and to ensure that is always set the
setter writes both the file and the type.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
I'm going to encapsulate all of the logic dealing with register types in
this file.
Rename the parameters for the hardware encodings from type -> hw_type at
the same time.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
After the last patch converted things into enums, I helpfully got a
compiler warning about these missing from the switch statement.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
The hardware encodings often mean different things depending on whether
the source is an immediate.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
These vaguely corresponded to the hardware encodings, but that is purely
historical at this point. Reorder them so we stop making things "almost
work" when mixing enums.
The ordering has been closen so that no enum value is the same as a
compatible hardware encoding.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
UB and B type encodings are the same as UV and VF. Noticed when writing
the following patch.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
The destination stride must be equivalent to a dword if VF is used.
Also, since the only compaction table entires with "i:vf" have the
destination as "r:f" specifically check that the destination is of type
float.
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
