Commit graph

271 commits

Author SHA1 Message Date
Faith Ekstrand
1a2e8290ab nir: Add NV-specific texture opcodes
These are for implementing various texture queries.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>
2023-10-24 22:21:18 +00:00
Marek Olšák
f3886e9c02 nir: split FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP* flags
GLSL doesn't preserve NaNs, but it optionally preserves Infs.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25392>
2023-10-17 17:27:12 +00:00
Emma Anholt
40f22f8ecd nir/print: Decode system values in the variable declarations.
decl_var system INTERP_MODE_NONE none vec4 #0
decl_var system INTERP_MODE_FLAT none mediump uint #1

turns into:

decl_var system INTERP_MODE_NONE none vec4 #0 (SYSTEM_VALUE_FRAG_COORD)
decl_var system INTERP_MODE_FLAT none mediump uint #1 (SYSTEM_VALUE_SUBGROUP_INVOCATION)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25647>
2023-10-12 22:52:42 +00:00
Alyssa Rosenzweig
569d44eff4 nir/print: Handle KERNEL
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25625>
2023-10-12 21:03:31 +00:00
Alyssa Rosenzweig
3325b4778a nir: Add ACCESS_CAN_SPECULATE
Determining whether it is safe to hoist a load instruction out of control flow
depends on complex hardware and driver details. Rather than encoding this as
knobs in every NIR pass that wants to do so (notably nir_opt_preamble and
nir_opt_peephole_select), add a per-load ACCESS flag for backends to set.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24011>
2023-10-10 13:51:00 +00:00
Marek Olšák
b1bbe4e190 nir: gather dual slot input information
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>
2023-10-07 11:18:40 +00:00
Marek Olšák
0f2491cbdd nir: add dual-slot input information into load_input intrinsics
This is necessary to allow optimizing VS inputs after nir_lower_io, which
is currently impossible because the loss of dual-slot information in NIR
would break VS inputs. With this, driver locations can be recomputed by
calling nir_recompute_io_bases. It's a prerequisite for optimizing varyings
with lowered IO.

When this is used, we will be able to eliminate unused dual-slot VS inputs
as well as unused low and high halves of dual-slot VS inputs for the first
time, which can happen due to optimizations of varyings. Without this,
st/mesa binds vertex buffers for dual-slot inputs that are fully or
partially unused in the shader.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>
2023-10-07 11:18:40 +00:00
Caio Oliveira
3105d516d0 nir: Add new intrinsics for Cooperative Matrix
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23825>
2023-09-28 07:35:02 +00:00
Dave Airlie
8a95b43880 spirv/nir: parse function control and store in nir.
This just lets the nir access the inline/dont inline attributes

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24687>
2023-09-12 01:57:50 +00:00
Alyssa Rosenzweig
8c7629524e nir/print: Print access qualifiers for intrinsics
Instead of printing an opaque integer that needs to be manually decoded.
Example output:

    32x4   %7 = @image_load (%4 (0x0), %6, %5 (0x0), %4 (0x0)) (image_dim=2D, image_array=false, format=r8g8b8a8_snorm, access=readonly|reorderable, range_base=0, dest_type=float32)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24798>
2023-08-22 20:24:40 +00:00
Konstantin Seurer
ccc52ae887 nir: Add shader enqueue data structures and handling
There are two new variable modes:
- nir_var_mem_node_payload
- nir_var_mem_node_payload_in

Also add a few more intrinsics and some shader info.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
2023-08-18 16:57:22 +00:00
Faith Ekstrand
65b6ac8aa4 nir: Rename nir_instr_type_ssa_undef to nir_instr_type_undef
We already renamed the type, we just need to rename the enum and the
casting helper functions.

Generated with sed:

    sed -i -e 's/nir_instr_type_ssa_undef/nir_instr_type_undef/g' src/**/*.h src/**/*.c src/**/*.cpp
    sed -i -e 's/nir_instr_as_ssa_undef/nir_instr_as_undef/g' src/**/*.h src/**/*.c src/**/*.cpp

and two tiny whitespace fixups in lima.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24703>
2023-08-15 17:44:27 +00:00
Faith Ekstrand
4695bebc79 nir: Drop nir_dest
Instead, we replace every use of it with nir_def.  Most of this commit
was generated by sed:

   sed -i -e 's/dest.ssa/def/g' src/**/*.h src/**/*.c src/**/*.cpp

A few manual fixups were required in lima and the nir_legacy code.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24674>
2023-08-14 21:22:53 +00:00
Faith Ekstrand
6c1d32581a nir: Drop nir_alu_dest
Instead, we replace it directly with nir_def.  We could replace it with
nir_dest but the next commit gets rid of that so this avoids unnecessary
churn.  Most of this commit was generated by sed:

   sed -i -e 's/dest.dest.ssa/def/g' src/**/*.h src/**/*.c src/**/*.cpp

There were a few manual fixups required in the nir_legacy.c and
nir_from_ssa.c as nir_legacy_reg and nir_parallel_copy_entry both have a
similar pattern.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24674>
2023-08-14 21:22:53 +00:00
Faith Ekstrand
0dd76b1abb nir/print: Replace all dest printing with print_def
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24674>
2023-08-14 21:22:53 +00:00
Alyssa Rosenzweig
09d31922de nir: Drop "SSA" from NIR language
Everything is SSA now.

   sed -e 's/nir_ssa_def/nir_def/g' \
       -e 's/nir_ssa_undef/nir_undef/g' \
       -e 's/nir_ssa_scalar/nir_scalar/g' \
       -e 's/nir_src_rewrite_ssa/nir_src_rewrite/g' \
       -e 's/nir_gather_ssa_types/nir_gather_types/g' \
       -i $(git grep -l nir | grep -v relnotes)

   git mv src/compiler/nir/nir_gather_ssa_types.c \
          src/compiler/nir/nir_gather_types.c

   ninja -C build/ clang-format
   cd src/compiler/nir && find *.c *.h -type f -exec clang-format -i \{} \;

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24585>
2023-08-12 16:44:41 -04:00
Faith Ekstrand
777d336b1f nir: clang-format src/compiler/nir/*.[ch]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24382>
2023-08-12 19:27:28 +00:00
Alyssa Rosenzweig
10cdc0ad9f nir: Add load_coefficients_agx intrinsic
For lowering interpolation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24498>
2023-08-11 09:50:11 +00:00
Mike Blumenkrantz
f75ba983ca nir/print: always group variables by type when printing
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23752>
2023-08-08 13:51:34 +00:00
Mike Blumenkrantz
4a783abd79 nir/print: print location names for (some) tess slots
these should be fine to print

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23752>
2023-08-08 13:51:34 +00:00
Alyssa Rosenzweig
95e3df39c0 treewide: sed out more is_ssa
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
efc1c3261a nir/print: Drop legacy NIR
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
5fead24365 treewide: Drop is_ssa asserts
We only see SSA now.

Via Coccinelle patch:

    @@
    expression x;
    @@

    -assert(x.is_ssa);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
d559764e7c nir: Remove nir_alu_dest::saturate
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
97a3302bf8 nir/print: Assume SSA
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
03b2c34793 nir: Remove register arrays
Nothing produces them any more, so remove them from NIR. This massively reduces
the size of nir_src, which should improve performance all over.

nir_src size reduced from 56 bytes -> 40 bytes (pahole results on arm64, x86_64
should be similar.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24253>
2023-07-21 11:25:49 +00:00
Christian Gmeiner
019e5cbd39 nir/print: print instr pass_flags
From time to time it can be helpful to "see" the pass_flags.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24234>
2023-07-20 18:03:47 +00:00
Faith Ekstrand
ae0408be1b nir/from_ssa: Support register intrinsics
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Caio Oliveira
608504c774 nir/print: Reformat the preds/succs block information
- Always print preds in same line as block name;
- Use a single line for empty blocks;
- Align preds/succs with the instructions.

```
if %29 {
    block b4:    // preds: b3
    32     %30 = load_const (0x00000000 = 0.000000)
    32x4   %31 = @vulkan_resource_index (%30 (0x0)) (desc_set=0, binding=0, desc_type=SSBO)
    32x4   %32 = @load_vulkan_descriptor (%31) (desc_type=SSBO)
    32x4   %33 = deref_cast (Storage *)%32 (ssbo Storage)  (ptr_stride=0, align_mul=4, align_offset=0)
    32x4   %34 = deref_struct &%33->fail (ssbo uint)  // &((Storage *)%32)->fail
    32     %36 = @deref_atomic (%34, %35 (0x1)) (access=1, atomic_op=iadd)
                 // succs: b6
} else {
    block b5:  // preds: b3, succs: b6
}
```

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:07 +00:00
Caio Oliveira
a188337972 nir/print: Print div/con annotation first
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:07 +00:00
Caio Oliveira
884debdee3 nir/print: Use 4-space indentation
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
9215aad7da nir/print: Use // for comments
Makes it easier to copy snippets of shaders into code or
test comments without worrying about conflict with `/* */`.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
1c0038d5d5 nir/print: Don't use comment syntax for deref_cast properties
Follow the same syntax as the intrinsic indices, since they
are conceptually similar.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
88c411c638 nir/print: Rename print_tabs() to print_indentation() and use it more
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
761d90341f nir/print: Align instructions around =
- For SSA destination, padding is applied before `%`.
- For Reg destination, pad to the SSA size (to align div/con),
  then remaining padding is applied before `r`.
- For instructions without destination, padding is applied so
  they start right after the ` = ` of the cases above.

If the block doesn't have any destinations, there's no padding
is applied to the instructions without destinations in that
block.

For now registers with array access will be unaligned.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
58e3abc4a3 nir/print: Use BITSIZExELEMENTS for SSA sizes
Omits the `x1` part if its one element.

```
32x3   %3 = @load_deref (%0) (access=0)
32     %4 = mov %3.x
32     %5 = deref_var &gl_LocalInvocationID (system uvec3)
32x3   %8 = @load_deref (%5) (access=0)
32     %9 = mov %8.x
```

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
252a6140ea nir/print: Use bN instead of block_N for identifying basic blocks
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Caio Oliveira
ea44879d2d nir/print: Use symbols % for SSA and @ for intrinsic
The variable uniquifying now uses # instead of @.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23564>
2023-07-03 22:18:06 +00:00
Alyssa Rosenzweig
7e42fdac6b nir: Rename nir_reg_{src,dest} -> nir_register_{src,dest}
This frees up the shorter names for the intrinsic-based versions that will
replace them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23956>
2023-06-30 18:20:48 -04:00
Caio Oliveira
f4c2025e2c nir/print: Print more representations in load_const
In addition to the hexadecimal and float (when applicable), print the
signed and unsigned representations.  Representations may be omitted based
on information about the value:

- If gather types has unambiguous information, we use it;
- Float is omitted for 8 bit values;
- Signed decimal is omitted for positive values;
- Unsigned decimal is omitted for small values (representation is same as hex);

Note for now the "terse form" that appear in SSA uses is unchaged.

Based on a patch by Mike Blumenkrantz.

Examples:

```
// Just used as float. Omitted decimals.
vec4 32 ssa_81 = load_const (0x3f800000, 0x3f800000, 0x3e4ccccd, 0x3f800000) = (1.000000, 1.000000, 0.200000, 1.000000)
vec1 32 ssa_28 = load_const (0x3e4ccccd = 0.200000)

// Just a small integer. Omitted float and decimal.
vec1 32 ssa_45 = load_const (0x00000001)

// Larger positive integers. Omitted float.
vec1 32 ssa_39 = load_const (0x00002000 = 8192)
vec1 32 ssa_30 = load_const (0x000000ff = 255)
vec1 32 ssa_28 = load_const (0x00000010 = 16)

// Integers with negative values.
load_const (0xff = -1 = 255)
load_const (0xff80 = -128 = 65408)
load_const (0xffff = -1 = 65535)

// Same value, in the first case we know is used as an integer.
load_const (0xffffffe0 = -32 = 4294967264)
load_const (0xffffffe0 = -nan = -32 = 4294967264)
```

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Caio Oliveira
a185736a42 nir/print: Use src_type when printing consts in SSA uses
If the src_type is not available, untie by looking at the results from
nir_gather_ssa_types(). If that is ambiguous, just pick uint.

Now in print_const_from_load() when the type is invalid, print the full
constant form (with both padded hex and float); when the passed type
is valid, print the terse form based on it.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Caio Oliveira
8f64415af7 nir/print: Make NIR_DEBUG=print_consts behavior the default
Now there's a NIR_DEBUG=print_no_inline_consts to omit them.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Caio Oliveira
260a9167db nir/print: Improve NIR_PRINT=print_consts by using nir_gather_ssa_types()
The two representations are *always* used for `load_const`, but when
inlining the value as SSA source, use just a single terse
representation.

The choice between integer or float is based on the result of
nir_gather_ssa_types(), with a bias for integer when in doubt.

Also remove extra comment `/* */` syntax since the value is already
enclosed by parenthesis.

---

For illustration, here's some instructions from crucible test
func.shader.averageRounded.uint64_t with NIR_DEBUG=print_consts:

BEFORE:

```
vec1 32 con ssa_23 = load_const (0xfffffffc = -nan)
vec1 32 div ssa_24 = iand ssa_13, ssa_23 /*(0xfffffffc = -nan)*/
vec1 32 con ssa_25 = load_const (0x00000024 = 0.000000)
vec1 32 con ssa_26 = intrinsic load_ubo (ssa_1 /*(0x00000002 = 0.000000)*/, ssa_25 /*(0x00000024 = 0.000000)*/) (access=0, align_mul=1073741824, align_offset=36, range_base=0, range=-1)
vec1 32 con ssa_27 = load_const (0x00000008 = 0.000000)
vec1 32 con ssa_28 = load_const (0x00000007 = 0.000000)
vec1 32 con ssa_29 = iand ssa_4.y, ssa_1 /*(0x00000002 = 0.000000)*/
vec1 32 con ssa_30 = ishl ssa_29, ssa_28 /*(0x00000007 = 0.000000)*/
vec1 32 con ssa_31 = load_const (0x7b000808 = 664776890994587263929995856502063104.000000)
vec1 32 con ssa_32 = ior ssa_31 /*(0x7b000808 = 664776890994587263929995856502063104.000000)*/, ssa_30
```

AFTER:

```
vec1 32 con ssa_23 = load_const (0xfffffffc = -nan)
vec1 32 div ssa_24 = iand ssa_13, ssa_23 (0xfffffffc)
vec1 32 con ssa_25 = load_const (0x00000024 = 0.000000)
vec1 32 con ssa_26 = intrinsic load_ubo (ssa_1 (0x2), ssa_25 (0x24)) (access=0, align_mul=1073741824, align_offset=36, range_base=0, range=-1)
vec1 32 con ssa_27 = load_const (0x00000008 = 0.000000)
vec1 32 con ssa_28 = load_const (0x00000007 = 0.000000)
vec1 32 con ssa_29 = iand ssa_4.y, ssa_1 (0x2)
vec1 32 con ssa_30 = ishl ssa_29, ssa_28 (0x7)
vec1 32 con ssa_31 = load_const (0x7b000808 = 664776890994587263929995856502063104.000000)
vec1 32 con ssa_32 = ior ssa_31 (0x7b000808), ssa_30
```

and some instructions from crucible test func.gs.basic with NIR_DEBUG=print_consts,
now showing float representation being selected:

BEFORE:

```
vec4 32 ssa_10 = load_const (0x3e4ccccd, 0x3e4ccccd, 0x00000000, 0x00000000) = (0.200000, 0.200000, 0.000000, 0.000000)
vec4 32 ssa_9 = intrinsic load_deref (ssa_42) (access=0)
vec4 32 ssa_11 = fadd ssa_9, ssa_10 /*(0x3e4ccccd, 0x3e4ccccd, 0x00000000, 0x00000000) = (0.200000, 0.200000, 0.000000, 0.000000)*/
```

AFTER:

```
vec4 32 ssa_10 = load_const (0x3e4ccccd, 0x3e4ccccd, 0x00000000, 0x00000000) = (0.200000, 0.200000, 0.000000, 0.000000)
vec4 32 ssa_9 = intrinsic load_deref (ssa_42) (access=0)
vec4 32 ssa_11 = fadd ssa_9, ssa_10 (0.200000, 0.200000, 0.000000, 0.000000)
```

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23562>
2023-06-28 20:17:18 +00:00
Diederik de Haas
231fa269ea treewide: spelling fixes
Debian's lintian tool flagged some spelling issues:
assumtion -> assumption
unkown -> unknown
memeber -> member
sucess -> success
perfomance -> performance

Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23618>
2023-06-23 12:20:59 +00:00
Caio Oliveira
af9be8c024 nir/print: Print whether the shader is internal or not
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23756>
2023-06-21 00:01:10 +00:00
Caio Oliveira
1f3869ed4e nir/print: Use mesa_scope_name() function to print scopes
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
2023-06-19 23:29:26 +00:00
Caio Oliveira
59cc77f0fa compiler: Move from nir_scope to mesa_scope
Just moving the enum and performing renames, no behavior change.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
2023-06-19 23:29:26 +00:00
Jesse Natalie
4edfb67fd4 nir: Add is_null_constant to nir_constant
Indicates that the values contained within are 0s, regardless of
type. Enables some optimizations.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
2023-06-13 00:43:36 +00:00
Caio Oliveira
60664285a9 nir/print: Do not print raw values
In many cases the raw value is not really helpful,
since we only work with enums and the raw value is
already printed for indices without special printing.

If an index benefits from having special printing AND the
raw value, we can include the printing of the raw value
as part of its handler.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23375>
2023-06-06 21:50:34 +00:00
Caio Oliveira
60a00f246b nir/print: Print 0 when mem_modes or resource_intel have no values
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23376>
2023-06-06 01:23:18 +00:00