Commit graph

147815 commits

Author SHA1 Message Date
Pavel Ondračka
0deca8bef8 r300: add some synchronization for KIL
Set texture semaphore wait at the first control flow instruction
after the KIL.

Fixes: dEQP-GLES2.functional.shaders.discard.dynamic_loop_always

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18576>
2022-09-14 09:27:54 +00:00
Konstantin Seurer
6a19950b61 radv: Explicitly store the VA of accel structs
Gets rid of a bit of code and fixes the RRA accel_struct_vas table if
the BO is freed before vkDestroyAccelerationStructureKHR is called.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18530>
2022-09-14 09:05:25 +00:00
Konstantin Seurer
7da66f8f25 radv/rra: Replace aliasing assert with a warning
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18530>
2022-09-14 09:05:25 +00:00
Konstantin Seurer
916621e5a5 radv: Make the radv_buffer_get_va parameter const
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18530>
2022-09-14 09:05:25 +00:00
Konstantin Seurer
d94cb8b595 radv/rra: Remove redundant bounds validation
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18530>
2022-09-14 09:05:25 +00:00
Konstantin Seurer
97d8bb9bc6 radv/rra: Map accel struct VAs to handles
When validating a BVH, rra_validate_node uses _mesa_hash_table_u64_search to lookup, whether a BLAS pointer is valid. Since _mesa_hash_table_u64_search returns the data field of the found entry, we need to populate it. Otherwise, the NULL-check won't work.

Fixes: 5749806 ("radv: Add Radeon Raytracing Analyzer trace dumping utilities")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18530>
2022-09-14 09:05:25 +00:00
Corentin Noël
ba9c73f9d4 virgl/ci: Update virglrenderer
Update virglrenderer past to version 0.10.1

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18418>
2022-09-14 06:39:29 +00:00
Yonggang Luo
eec1e728c5 c11: Update the values of enum mtx_plain, mtx_recursive, mtx_timed to make sure mtx_recursive != mtx_plain | mtx_recursive
According to c11 standards, there is 4 variant of mtx_init parameter,
mtx_plain
mtx_timed
mtx_plain|mtx_recursive
mtx_timed|mtx_recursive

Directly use mtx_recursive is not a thing, so we need make sure mtx_plain and mtx_plain|mtx_recursive are not equal,
So now we choose the values from Android c11 threads.h for enum mtx_plain, mtx_recursive, mtx_timed, to make sure
c11/threads.h be more c11 conformance, and can raise error when the type parameter of mtx_init are not one of
mtx_plain
mtx_timed
mtx_plain|mtx_recursive
mtx_timed|mtx_recursive

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18445>
2022-09-14 02:46:51 +00:00
Yonggang Luo
0894762cb8 svga: direct use of mtx_recursive is not c11 conformance
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18445>
2022-09-14 02:46:51 +00:00
Yonggang Luo
e1139a3fc3 radeonsi: direct use of mtx_recursive is not c11 conformance
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18445>
2022-09-14 02:46:51 +00:00
Yonggang Luo
77e8b5bbb0 mesa: direct use of mtx_recursive is not c11 conformance
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18445>
2022-09-14 02:46:51 +00:00
Rob Clark
8192772c0a freedreno: Remap high/norm/low priorities
At the gallium level, we only have three priorities.  But if kernel
supports preemption we'll have 3*nr_rings priority levels.  We'd prefer
to have the priorities that userspace picks be distributed over the
entire range of priorities so that preemption can work.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18584>
2022-09-14 02:06:27 +00:00
Rob Clark
2451c30c11 freedreno: nr_rings -> nr_priorities
This was renamed in the UABI header over a year ago, see
fc40e5e10c3b ("drm/msm: Utilize gpu scheduler priorities")

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18584>
2022-09-14 02:06:27 +00:00
Rob Clark
8e890a8b58 freedreno: Misc indent fix
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18584>
2022-09-14 02:06:27 +00:00
Chia-I Wu
43c53e3225 turnip: add support for VK_KHR_global_priority
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18510>
2022-09-14 01:38:54 +00:00
Chia-I Wu
6aa06b1b9f turnip: add tu_physical_device::submitqueue_priority_count
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18510>
2022-09-14 01:38:54 +00:00
Chia-I Wu
79c75a3e97 turnip: fix error handling for tu_queue_init
tu_queue_finish can only be called on initialized queues.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18510>
2022-09-14 01:38:54 +00:00
Ruijing Dong
0308abbe46 frontends/va: add HRD, filler data enable and etc
HRD parameters and filler data enable and skip frame
enable data are needed even though some application
doesn't use them.

Also for per picture rate control, max_qp and min_qp
are added.

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18534>
2022-09-14 00:16:20 +00:00
Ruijing Dong
3c8937d363 frontends/va: add max_frame_size into rate control
why:
max au size and per picture rate control data structure
need to follow the input

how:
have max_frame_size as the input to rate control
also re-calculate other rate control related params

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18534>
2022-09-14 00:16:20 +00:00
Ruijing Dong
6646ae2576 frontends/va: change getEncParamPreset location
why:
getEncParamPreset functions overwrite the incoming
messages.

how:
To change a location after the decoder is created,
so that if no incoming message the default ones
will be used otherwise the new messages will
overwrite the default values.

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18534>
2022-09-14 00:16:20 +00:00
Ruijing Dong
72fffa62d5 frontend/va: remove some unnecessary code
clean up some code related to h264 encoding.

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18534>
2022-09-14 00:16:19 +00:00
Chia-I Wu
3c76091801 vulkan: update ALLOWED_ANDROID_VERSION for api level 33
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18476>
2022-09-13 23:34:58 +00:00
Yiwei Zhang
e9b995ecf4 venus: ignore pInheritanceInfo if not secondary command buffer
TEST: no segfault in dEQP-VK.api.command_buffers.bad_inheritance_info_random

Fixes: 6f5289df53 ("venus: refactor VkCommandBufferBeginInfo fixups to function")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18583>
2022-09-13 23:19:54 +00:00
Emma Anholt
d862a2ebcb turnip: Only emit descriptor loads for active stages in the pipeline.
zink has a push descriptor template layout that has every possible stage,
which gets used regardless of what stages are in the pipeline.  By
skipping over the unused stages, we cut the CP overhead.

Improves TU_DEBUG=sysmem gfxbench gl_driver2 on zink by 6.57% +/-
0.331143% (n=5).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18562>
2022-09-13 22:19:43 +00:00
Emma Anholt
f51bbcc8ae ci/turnip: Add missing a618 full-run bypass fails.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18562>
2022-09-13 22:19:43 +00:00
Adam Jackson
ed2e3f5871 wsi/x11: Fix the is-visual-supported check
This was sort of well intentioned, but wrong. bits_per_rgb_value is the
number of significant bits in the color (channel) specification, not the
number of bits used to name that color within the pixel. If you have a
depth 24 visual but the colormap is 11 bits deep then each of those
channels selects one of 256 11-bit color values in the output ramp.

The open source drivers mostly don't expose anything like that, but
nvidia does, and we refuse to work. That's silly. Practically speaking
we can probably render to any TrueColor or DirectColor visual that your
X server exposes, since it is probably not going to have visuals for
non-color-renderable formats. Just check the visual class instead.

Likewise when matching formats to visuals, count the bits in the rgb
masks in the visual.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6995
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18381>
2022-09-13 21:52:55 +00:00
Rhys Perry
c23411a970 nir/algebraic: optimize bits=umin(bits, 32-(offset&0x1f))
Optimizes patterns which are created by recent versions of vkd3d-proton,
when constant folding doesn't eliminate it entirely:
- ubitfield_extract(value, offset, umin(bits, 32-(offset&0x1f)))
- ibitfield_extract(value, offset, umin(bits, 32-(offset&0x1f)))
- bitfield_insert(base, insert, offset, umin(bits, 32-(offset&0x1f)))

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13225>
2022-09-13 20:36:06 +00:00
Pierre-Eric Pelloux-Prayer
07a520f731 radeonsi: invalidate L2 when using dcc stores
This is only needed on chips with tcc_rb_non_coherent=1.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7084
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18494>
2022-09-13 20:03:14 +00:00
Pierre-Eric Pelloux-Prayer
4da147a02b mesa: remove fallback for GL_DEPTH_STENCIL
st_TexSubImage has this "default to fallback for depth-stencil" since
2013. I think it's time to remove this limitation - hopefully all
drivers will be happy with the change to avoid adding yet another CAP.

This helps CS:GO startup a lot, because the fallback path is very very
slow.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18484>
2022-09-13 19:37:28 +00:00
Pierre-Eric Pelloux-Prayer
2baa40b041 mesa: simplify _mesa_texstore_z24_s8 and s8_z24
The spec says:

   If the base internal format is DEPTH_STENCIL and format
   is not DEPTH_STENCIL, then the values of the stencil
   index texture components are undefined.

Which can be translated as: we don't need to bother preserving
the original stencil values.

Suggested by Emma Anholt.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18484>
2022-09-13 19:37:28 +00:00
Pierre-Eric Pelloux-Prayer
a5b1a81105 mesa: avoid reading back textures from VRAM
This can be very slow on dGPU.

I tried a different version that would allocate a full row
and then do a single memcpy per row but the performance
was similar so I kept the simple version.

Cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18484>
2022-09-13 19:37:28 +00:00
Juston Li
a6e6ffb703 venus: add support for VK_EXT_multi_draw
Test:
./deqp-vk -n dEQP-VK.draw.*multi_draw*

Test run totals:
  Passed:        11520/11520 (100.0%)
  Failed:        0/11520 (0.0%)
  Not supported: 0/11520 (0.0%)
  Warnings:      0/11520 (0.0%)
  Waived:        0/11520 (0.0%)

Signed-off-by: Juston Li <justonli@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18304>
2022-09-13 19:20:55 +00:00
Juston Li
99378c8873 venus: sync to latest venus protocol headers
- v1.3.227 update
- added VK_EXT_multi_draw

Signed-off-by: Juston Li <justonli@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18304>
2022-09-13 19:20:55 +00:00
Emma Anholt
873365caee nouveau: Fix compiler warnings about silly address checks in ir_print.
in/out/sv are arrays, so &array[i] is a non-null pointer.  Presumably
numSysVals/Inputs/Outputs are only incremented when there's data in the
arrays, anyway.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18536>
2022-09-13 18:39:07 +00:00
Chia-I Wu
210807a1a4 turnip: reduce MAX_STORAGE_BUFFER_RANGE
Reduce MAX_STORAGE_BUFFER_RANGE from (1<<29) to (1<<27).  While (1<<28)
is fine based on my tests, let's match what the latest version of the
blob does.

Tested on a618 and a635.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18322>
2022-09-13 17:46:15 +00:00
Karol Herbst
89dcc52b78 rusticl/device: print error when libclc fails to load
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18580>
2022-09-13 17:38:05 +00:00
Alyssa Rosenzweig
cf7069469c asahi: Handle blending with MRT
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
e1715c6a4f asahi: Don't crash on <4 channel render targets
It doesn't matter what we put in the swizzle for the unused components,
but if we try to stuff out-of-bounds PIPE_SWIZZLE_0/1/NONE values,
we'll crash in GenXML. Fixes failing tests in

   dEQP-GLES3.functional.fragment_out.basic.fixed.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
89e0f54422 agx: Don't use nir_find_variable_with_driver_location
io_semantics is the preferred alternative.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
0883f0b302 agx: Lower txs to a descriptor crawl
There's no native txs instruction... but we can emulate one :-) This is
heavy on shader ALU, but in the production driver, it'll all be hoisted
up to the preamble shader and so it shouldn't matter much. This
keeps the driver itself simple and low overhead, with a completely
obvious generalization to bindless.

Passes dEQP-GLES3.functional.shaders.texture_functions.texturesize.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
bc4f418cb4 agx: Implement load_global(_constant)
Found in compute shaders, maps to a subset of device_load, and will be
used for some lowerings soon.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
965cc62bdd agx: Implement txd
Handles all cases except for cube maps, which don't seem to work
properly, so those are lowered.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
7a4e0a4d35 agx: Implement texture offsets and comparators
Texture offsets and shadow comparison values get grouped into a vector
passed by register. Comparison values are provided as-is (fp32). Texture
offsets are packed into nibbles, but we can do this on the CPU, as
nonconstant offsets are forbidden in GLSL at least. They're also
forbidden in Vulkan/SPIR-V without ImageGatherExtended/
shaderImageGatherExtended. I'm happy kicking the NIR lowering can down
the line, this commit is complicated enough already.

Passes dEQP-GLES3.functional.shaders.texture_functions.texture.* and
dEQP-GLES3.functional.shaders.texture_functions.textureoffset.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
4f85a7be8c agx: Make p_combine take a dynamic src count
For larger vectors.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:28 +00:00
Alyssa Rosenzweig
ef31dceee8 agx,asahi: Implement nir_intrinsic_load_texture_base_agx
Save off what we pass to BIND_TEXTURE.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:28 +00:00
Alyssa Rosenzweig
7371803f14 nir: Add nir_intrinsic_texture_base_agx sysval
For non-bindless textures, get the base address of the texture
descriptor array, so we can crawl descriptors in the shader. For
bindless, this isn't needed (since the bindless handle will be the
address itself).

jekstrand suggested the idea of the descriptor crawl. It worked out
pretty well, all considered.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
2022-09-13 16:04:28 +00:00
Alyssa Rosenzweig
ef75dbfddd panfrost: Honour cso->req_local_mem
Fixes api.min_max_local_mem_size.

nir->info.shared_size can't be trusted in OpenCL.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18559>
2022-09-13 15:36:08 +00:00
Alyssa Rosenzweig
b4dd1b8916 panfrost: Respect buffer offset for OpenCL
This is so dumb. Panfrost port of d98b82a103 ("iris/cs: take buffer offsets
into account for CL")

Fixes buffer.sub_buffers_read_write

Fixes: 80b90a0f2b ("panfrost: Implement panfrost_set_global_binding")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18560>
2022-09-13 15:16:44 +00:00
Sarah Walker
4be56e5e3f pvr: Update FWIF 3d and compute register structures
This matches changes made in FW 1.17.OS@6285007.

Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18440>
2022-09-13 13:59:30 +00:00
Karmjit Mahil
24e24e9a28 pvr: Emit cs words for load op on vkCmdBeginRenderPass().
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18569>
2022-09-13 12:49:52 +00:00