fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-09 04:38:03 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

freedreno: nr_rings -> nr_priorities

Browse source 
This was renamed in the UABI header over a year ago, see
fc40e5e10c3b ("drm/msm: Utilize gpu scheduler priorities")

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18584>
This commit is contained in:
Rob Clark 2022-09-13 09:37:28 -07:00 • committed by Marge Bot
parent 8e890a8b58
commit 2451c30c11
4 changed files with 11 additions and 11 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/freedreno/drm/freedreno_drmif.h
View file

@ -57,7 +57,7 @@ enum fd_param_id {
FD_CHIP_ID, /* 64b */
FD_MAX_FREQ,
FD_TIMESTAMP,
FD_NR_RINGS, /* # of rings == # of distinct priority levels */
FD_NR_PRIORITIES, /* # of rings == # of distinct priority levels */
FD_CTX_FAULTS, /* # of per context faults */
FD_GLOBAL_FAULTS, /* # of global (all context) faults */
FD_SUSPEND_COUNT, /* # of times the GPU has suspended, and potentially lost state */

10
src/freedreno/drm/msm/msm_pipe.c
View file

@ -92,8 +92,8 @@ msm_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param,
return query_param(pipe, MSM_PARAM_MAX_FREQ, value);
case FD_TIMESTAMP:
return query_param(pipe, MSM_PARAM_TIMESTAMP, value);
case FD_NR_RINGS:
return query_param(pipe, MSM_PARAM_NR_RINGS, value);
case FD_NR_PRIORITIES:
return query_param(pipe, MSM_PARAM_PRIORITIES, value);
case FD_CTX_FAULTS:
return query_queue_param(pipe, MSM_SUBMITQUEUE_PARAM_FAULTS, value);
case FD_GLOBAL_FAULTS:
@ -161,7 +161,7 @@ open_submitqueue(struct fd_pipe *pipe, uint32_t prio)
.flags = 0,
.prio = prio,
};
uint64_t nr_rings = 1;
uint64_t nr_prio = 1;
int ret;
if (fd_device_version(pipe->dev) < FD_VERSION_SUBMIT_QUEUES) {
@ -169,9 +169,9 @@ open_submitqueue(struct fd_pipe *pipe, uint32_t prio)
return 0;
}
msm_pipe_get_param(pipe, FD_NR_RINGS, &nr_rings);
msm_pipe_get_param(pipe, FD_NR_PRIORITIES, &nr_prio);
req.prio = MIN2(req.prio, MAX2(nr_rings, 1) - 1);
req.prio = MIN2(req.prio, MAX2(nr_prio, 1) - 1);
ret = drmCommandWriteRead(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_NEW, &req,
sizeof(req));

8
src/freedreno/drm/virtio/virtio_pipe.c
View file

@ -97,7 +97,7 @@ virtio_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param,
return 0;
case FD_TIMESTAMP:
return query_param(pipe, MSM_PARAM_TIMESTAMP, value);
case FD_NR_RINGS:
case FD_NR_PRIORITIES:
*value = virtio_dev->caps.u.msm.priorities;
return 0;
case FD_CTX_FAULTS:
@ -154,12 +154,12 @@ open_submitqueue(struct fd_pipe *pipe, uint32_t prio)
.flags = 0,
.prio = prio,
};
uint64_t nr_rings = 1;
uint64_t nr_prio = 1;
int ret;
virtio_pipe_get_param(pipe, FD_NR_RINGS, &nr_rings);
virtio_pipe_get_param(pipe, FD_NR_PRIORITIES, &nr_prio);
req.prio = MIN2(req.prio, MAX2(nr_rings, 1) - 1);
req.prio = MIN2(req.prio, MAX2(nr_prio, 1) - 1);
ret = virtio_simple_ioctl(pipe->dev, DRM_IOCTL_MSM_SUBMITQUEUE_NEW, &req);
if (ret) {

2
src/gallium/drivers/freedreno/freedreno_screen.c
View file

@ -1031,7 +1031,7 @@ fd_screen_create(struct fd_device *dev, struct renderonly *ro,
screen->chip_id = val;
screen->gen = fd_dev_gen(screen->dev_id);
if (fd_pipe_get_param(screen->pipe, FD_NR_RINGS, &val)) {
if (fd_pipe_get_param(screen->pipe, FD_NR_PRIORITIES, &val)) {
DBG("could not get # of rings");
screen->priority_mask = 0;
} else {