Commit graph

3960 commits

Author SHA1 Message Date
Tapani Pälli
47fc359822 anv: release memory allocated by glsl types during spirv_to_nir
Fixes leaks for each glsl_type generated:

  ==32470== 384 bytes in 3 blocks are possibly lost in loss record 18 of 18
  ==32470==    at 0x483880B: malloc (vg_replace_malloc.c:309)
  ==32470==    by 0x4C43F4A: ralloc_size (ralloc.c:119)
  ==32470==    by 0x4C44014: rzalloc_size (ralloc.c:151)
  ==32470==    by 0x4C44258: rzalloc_array_size (ralloc.c:215)
  ==32470==    by 0x4D38957: glsl_type::glsl_type(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:114)
  ==32470==    by 0x4D3BEED: glsl_type::get_struct_instance(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:1146)
  ==32470==    by 0x4D42ECC: glsl_struct_type (nir_types.cpp:501)
  ==32470==    by 0x4CDB5A1: vtn_handle_type (spirv_to_nir.c:1269)
  ==32470==    by 0x4CE53DD: vtn_handle_variable_or_type_instruction (spirv_to_nir.c:4018)
  ==32470==    by 0x4CD8CFF: vtn_foreach_instruction (spirv_to_nir.c:365)
  ==32470==    by 0x4CE5E6B: spirv_to_nir (spirv_to_nir.c:4490)
  ==32470==    by 0x497AF10: anv_shader_compile_to_nir (anv_pipeline.c:173)

v2: move release call to vkDestroyInstance

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-11 13:14:45 +02:00
Tapani Pälli
7bb34ecff9 anv: release memory allocated by bo_heap when descriptor pool is destroyed
Fixes following leak:

   ==21853== 32 bytes in 1 blocks are definitely lost in loss record 2 of 20
   ==21853==    at 0x483AB1A: calloc (vg_replace_malloc.c:762)
   ==21853==    by 0x4C4DD7F: util_vma_heap_free (vma.c:221)
   ==21853==    by 0x4C4D647: util_vma_heap_init (vma.c:46)
   ==21853==    by 0x4957B9F: anv_CreateDescriptorPool (anv_descriptor_set.c:578)

Fixes: c520f4dec9 ("anv: Add a concept of a descriptor buffer")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-11 08:13:27 +02:00
Tapani Pälli
105002bd2d anv: destroy descriptor sets when pool gets destroyed
Patch maintains a list of sets in the pool and destroys possible
remaining sets when pool is destroyed.

As stated in Vulkan spec:
   "When a pool is destroyed, all descriptor sets allocated from
    the pool are implicitly freed and become invalid."

This fixes memory leaks spotted with valgrind:

   ==19622== 96 bytes in 1 blocks are definitely lost in loss record 2 of 3
   ==19622==    at 0x483880B: malloc (vg_replace_malloc.c:309)
   ==19622==    by 0x495B67E: default_alloc_func (anv_device.c:547)
   ==19622==    by 0x4955E05: vk_alloc (vk_alloc.h:36)
   ==19622==    by 0x4956A8F: anv_multialloc_alloc (anv_private.h:538)
   ==19622==    by 0x4956A8F: anv_CreateDescriptorSetLayout (anv_descriptor_set.c:217)

Fixes: 14f6275c92 ("anv/descriptor_set: add reference counting for descriptor set layouts")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-11 08:13:01 +02:00
Timothy Arceri
051b4064da anv: add support for dumping shader info via VK_EXT_debug_report
This information will be used by the vkpipeline-db tool.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-11 16:16:04 +11:00
Jason Ekstrand
8fdee457a4 anv/pipeline: Move lower_explicit_io much later
Now that nir_opt_copy_prop_vars can properly handle array derefs on
vectors, it's safe to move UBO and SSBO lowering to late in the
pipeline.  This should allow NIR to actually start optimizing SSBO
access.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-03-08 22:03:34 -06:00
Jason Ekstrand
179d254cba intel/nir: Move lower_mem_access_bit_sizes to postprocess_nir
It doesn't really matter where this pass goes as long as it's after we
call nir_lower_explicit_io and before we go into the back-end.  Putting
it brw_postprocess_nir lets us move nir_lower_explicit_io significantly
later in the pipeline.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-03-08 22:03:14 -06:00
Brian Paul
0de83bacf0 intel/compiler: silence unitialized variable warning in opt_vector_float()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-08 10:23:11 -07:00
Brian Paul
b5ea56e411 intel/decoders: silence uninitialized variable warnings in gen_print_batch()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-08 10:23:11 -07:00
Alejandro Piñeiro
cf0b2ad486 nir/xfb: adding varyings on nir_xfb_info and gather_info
In order to be used for OpenGL (right now for ARB_gl_spirv).

This commit adds two new structures:

  * nir_xfb_varying_info: that identifies each individual varying. For
    each one, we need to know the type, buffer and xfb_offset

  * nir_xfb_buffer_info: as now for each buffer, in addition to the
    stride, we need to know how many varyings are assigned to it.

For this patch, the only case where num_outputs != num_varyings is
with the case of doubles, that for dvec3/4 could require more than one
output. There are more cases though (like aoa), that will be handled
on following patches.

v2: updated after new nir general XFB support introduced for "anv: Add
    support for VK_EXT_transform_feedback"

v3: compute num_varyings beforehand for allocating, instead of relying
    on num_outputs as approximate value (Timothy Arceri)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-03-08 15:00:50 +01:00
Lionel Landwerlin
7271808df8 intel/error2aub: support older style engine names
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
a036eac029 intel/error2aub: deal with GuC log buffer
When Guc is enabled, the error state will contain a "global" buffer
for the GuC log buffer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
c619ea945d intel/error2aub: add a verbose option
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
ca0161f890 intel/error2aub: write GGTT buffers into the aub file
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
9b5dc2124f intel/error2aub: store engine last ring buffer head/tail pointers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
cdab19fa57 intel/error2aub: annotate buffer with their address space
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
630a72827a intel/error2aub: parse other buffer types
We don't write them in the aub file yet.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
c0ea043888 intel/error2aub: strenghten batchbuffer identifier marker
Found out that some base64 data matched the '---' identifier. We can
avoid this by adding the surrounding spaces.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
650e6e5d33 intel/error2aub: identify buffers by engine
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Lionel Landwerlin
a07f5262f0 intel/error2aub: build a list of BOs before writing them
The error state contains several kind of BOs, including the context
image which we will want to write in a later commit. Because it can
come later in the error state than the user buffers and because we
need to write it first in the aub file, we have to first build a list
of BOs and then write them in the appropriate order.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-08 11:01:14 +00:00
Jason Ekstrand
1664de5924 nir/builder: Add a build_deref_array_imm helper
Unlike most of the cases in which we do this by hand, the new helper
properly handles non-32-bit pointers.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-07 21:20:30 +00:00
Kenneth Graunke
4787bc944a isl: Add a swizzle parameter to isl_buffer_fill_state()
This is necessary for legacy texture buffer object formats, where we'll
need to use a swizzle to fake e.g. luminance.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-07 11:39:27 -08:00
Lionel Landwerlin
0b3871bc7f intel/aub_write: factorize context image/pphwsp/ring creation
We allocate GGTT entries and physical addresses are we create engines
rather than having a fixed layout.

Context images now receive a parameter argument which is used to setup
pml4 & ring buffer addresses.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
c1a2c72e76 intel/aub_write: turn context images arrays into functions
We'll make them more parameterized in a later commit.

As this is just a transitional commit, we allow ourself to leak the
context images allocated in get_context_init(). We'll fix this in the
next commit.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
8e14c9b7db intel/aub_write: store the physical page allocator in struct
We want to use this allocator in the next commit for GGTT pages.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
0343a3b42b intel/aub_write: log mmio writes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
6ef46972d9 intel/aub_write: switch to use i915_drm engine classes
Prepare aub write to deal with multiple engine instances. We don't
pass the instance number yet this could be done in the future by
having a 2 dimensional array of struct engine.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
8a81f5c255 intel/aub_write: break execlist write in 2
We want to reuse the execlist submission, but won't need the ring
buffer update.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:32 +00:00
Lionel Landwerlin
69ee5bde4e intel/aub_write: write header in init
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:31 +00:00
Lionel Landwerlin
01443f34b4 intel/aub_write: split comment section from HW setup
In the future we'll want error2aub to reuse the context image saved by
i915 instead of the default one we write in intel_dump_gpu.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:31 +00:00
Lionel Landwerlin
2b42adff14 intel/aub_read: reuse defines from gen_context
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:31 +00:00
Lionel Landwerlin
bf93084f44 intel/decoders: limit number of decoded batchbuffers
IGT has a test to hang the GPU that works by having a batch buffer
jump back into itself, trigger an infinite loop on the command stream.
As our implementation of the decoding is "perfectly" mimicking the
hardware, our decoder also "hangs". This change limits the number of
batch buffer we'll decode before we bail to 100.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:31 +00:00
Lionel Landwerlin
acb50d6b1f intel/decoders: handle decoding MI_BBS from ring
An MI_BATCH_BUFFER_START in the ring buffer acts as a second level
batchbuffer (aka jump back to ring buffer when running into a
MI_BATCH_BUFFER_END).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:31 +00:00
Lionel Landwerlin
ec526d6ba0 intel/decoders: add address space indicator to get BOs
Some commands like MI_BATCH_BUFFER_START have this indicator.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2019-03-07 15:08:31 +00:00
Tapani Pälli
4900c0cff4 anv: call blob_finish when done with it
Fixes leaks from anv_device_upload_nir:

  ==7345== 8,192 bytes in 2 blocks are definitely lost in loss record 24 of 24
  ==7345==    at 0x4C2ED78: malloc (vg_replace_malloc.c:308)
  ==7345==    by 0x4C31393: realloc (vg_replace_malloc.c:836)
  ==7345==    by 0x54E0848: grow_to_fit (blob.c:67)
  ==7345==    by 0x54E0BE5: blob_reserve_bytes (blob.c:166)
  ==7345==    by 0x54E0C7C: blob_reserve_intptr (blob.c:186)
  ==7345==    by 0x54704A7: nir_serialize (nir_serialize.c:1091)
  ==7345==    by 0x512F97D: anv_device_upload_nir (anv_pipeline_cache.c:756)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-03-07 07:39:48 +02:00
Tapani Pälli
a9555f37d5 anv: use anv_gem_munmap in block pool cleanup
Use anv_gem_munmap for unmap when softpin in use, this corresponds to
anv_gem_mmap used in anv_block_pool_expand_range. This fixes valgrind
errors seen for each pool when softpin is in use:

  ==25581== 262,144 bytes in 1 blocks are definitely lost in loss record 31 of 31
  ==25581==    at 0x50E77E8: anv_gem_mmap (anv_gem.c:96)
  ==25581==    by 0x50EEE2B: anv_block_pool_expand_range (anv_allocator.c:543)
  ==25581==    by 0x50EEB51: anv_block_pool_init (anv_allocator.c:477)
  ==25581==    by 0x50EF7EF: anv_state_pool_init (anv_allocator.c:920)
  ==25581==    by 0x510B8EB: anv_CreateDevice (anv_device.c:2031)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-07 07:36:28 +02:00
Jason Ekstrand
656ace3dd8 intel/nir: Move 64-bit lowering later
Now that we have a loop unrolling cost function and loop unrolling isn't
going to kill us the moment we have a 64-bit op in a loop, we can go
ahead and move 64-bit lowering later.  This gives us the opportunity to
do more optimizations and actually let the full optimizer run even on
64-bit ops rather than hoping one round of opt_algebraic will fix
everything.  This substantially reduces both fp64 shader compile times
and the resulting code size.  On the vs-isnan-dvec test from piglit:

Before this commit:

    1684.63s user 17.29s system 99% cpu 28:28.24 total
    101479 instructions. 0 loops. 802452 cycles. 79:369 spills:fills.
    Peak memory usage (according to massif): 1.435 GB

After this commit:

    179.64s user 7.75s system 99% cpu 3:07.92 total
    57316 instructions. 0 loops. 459287 cycles. 0:0 spills:fills.
    Peak memory usage (according to massif): 531.0 MB

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-06 17:24:57 +00:00
Jason Ekstrand
e02959f442 nir/lower_doubles: Inline functions directly in lower_doubles
Instead of trusting the caller to already have created a softfp64
function shader and added all its functions to our shader, we simply
take the softfp64 shader as an argument and do the function inlining
ouselves.  This means that there's no more nasty functions lying around
that the caller needs to worry about cleaning up.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-06 17:24:57 +00:00
Jason Ekstrand
8993e0973f intel/nir: Drop an unneeded lower_constant_initializers call
Even though this is technically a step in the function inlining process
as laid out in nir_inline_functions.c, it's not really needed.  We
already have constant initializers lowered here and no new ones are
added by appending the softfp64 functions.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-06 17:24:57 +00:00
Jason Ekstrand
fa4824c1db intel/debug: Add a debug flag to force software fp64
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-06 17:24:57 +00:00
Ian Romanick
55e6454d5e intel/fs: Fix extract_u8 of an odd byte from a 64-bit integer
In the old code, we would generate the exact same instruction for
extract_u8(some_u64, 0) and extract_u8(some_u64, 1).  The mask-a-word
trick only works for even numbered bytes.

This fixes the (new) piglit test
tests/spec/arb_gpu_shader_int64/execution/fs-ushr-and-mask.shader_test.

v2: Use a SHR instead of an AND.  This saves an instruction compared to
using two moves.  Suggested by Jason.

Fixes: 6ac2d16901 ("i965/fs: Fix extract_i8/u8 to a 64-bit destination")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-06 08:35:45 -08:00
Ian Romanick
4aaf139ea4 intel/fs: nir_op_extract_i8 extracts a byte, not a word
Fixes: 6ac2d16901 ("i965/fs: Fix extract_i8/u8 to a 64-bit destination")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-06 08:35:42 -08:00
Ian Romanick
bbf20a1ca3 intel/compiler: Silence unused parameter warning in brw_interpolation_map.c
The parameter is never used, and it's not part of a common interface
idiom.  Remove it.

src/intel/compiler/brw_interpolation_map.c: In function ‘brw_setup_vue_interpolation’:
src/intel/compiler/brw_interpolation_map.c:62:59: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
                             const struct gen_device_info *devinfo)
                                                           ^~~~~~~

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-06 08:35:36 -08:00
Ian Romanick
dea19138dd intel/compiler: Silence many unused parameter warnings in brw_eu.h
In file included from src/intel/compiler/brw_eu_util.c:34:0:
src/intel/compiler/brw_eu.h: In function ‘brw_message_desc_header_present’:
src/intel/compiler/brw_eu.h:288:63: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
 brw_message_desc_header_present(const struct gen_device_info *devinfo,
                                                               ^~~~~~~
src/intel/compiler/brw_eu.h: In function ‘brw_message_ex_desc’:
src/intel/compiler/brw_eu.h:296:51: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
 brw_message_ex_desc(const struct gen_device_info *devinfo,
                                                   ^~~~~~~
src/intel/compiler/brw_eu.h: In function ‘brw_message_ex_desc_ex_mlen’:
src/intel/compiler/brw_eu.h:303:59: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
 brw_message_ex_desc_ex_mlen(const struct gen_device_info *devinfo,
                                                           ^~~~~~~
src/intel/compiler/brw_eu.h: In function ‘brw_sampler_desc_binding_table_index’:
src/intel/compiler/brw_eu.h:337:68: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
 brw_sampler_desc_binding_table_index(const struct gen_device_info *devinfo,
                                                                    ^~~~~~~
src/intel/compiler/brw_eu.h: In function ‘brw_sampler_desc_sampler’:
src/intel/compiler/brw_eu.h:344:56: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
 brw_sampler_desc_sampler(const struct gen_device_info *devinfo, uint32_t desc)
                                                        ^~~~~~~
src/intel/compiler/brw_eu.h: In function ‘brw_sampler_desc_return_format’:
src/intel/compiler/brw_eu.h:371:62: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
 brw_sampler_desc_return_format(const struct gen_device_info *devinfo,
                                                              ^~~~~~~
src/intel/compiler/brw_eu.h: In function ‘brw_dp_desc_binding_table_index’:
src/intel/compiler/brw_eu.h:405:63: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
 brw_dp_desc_binding_table_index(const struct gen_device_info *devinfo,
                                                               ^~~~~~~
src/intel/compiler/brw_eu.h: In function ‘brw_dp_a64_untyped_atomic_desc’:
src/intel/compiler/brw_eu.h:754:41: warning: unused parameter ‘exec_size’ [-Wunused-parameter]
                                unsigned exec_size, /**< 0 for SIMD4x2 */
                                         ^~~~~~~~~
src/intel/compiler/brw_eu.h: In function ‘brw_dp_a64_untyped_atomic_float_desc’:
src/intel/compiler/brw_eu.h:775:47: warning: unused parameter ‘exec_size’ [-Wunused-parameter]
                                      unsigned exec_size,
                                               ^~~~~~~~~

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-06 08:35:31 -08:00
Timothy Arceri
81ee2cd8ba glsl: rename is_record() -> is_struct()
Replace was done using:
find ./src -type f -exec sed -i -- \
's/is_record(/is_struct(/g' {} \;

Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2019-03-06 13:10:02 +11:00
Caio Marcelo de Oliveira Filho
69cc6272fb anv: Implement VK_EXT_external_memory_host
v2: Ignore the import if handleType == 0. (Jason)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-03-05 12:59:50 -08:00
Jason Ekstrand
43f40dc7cb anv: Implement VK_EXT_inline_uniform_block
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-05 10:06:50 -06:00
Jason Ekstrand
61e009d2c4 spirv: Use the same types for resource indices as pointers
We need more space than just a 32-bit scalar and we have to burn all
that space anyway so we may as well expose it to the driver.  This also
fixes a subtle bug when UBOs and SSBOs have different pointer types.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-05 10:06:50 -06:00
Jason Ekstrand
c520f4dec9 anv: Add a concept of a descriptor buffer
This buffer goes along side the CPU data structure and may contain
pointers, bindless handles, or any other descriptor information.
Currently, all descriptors are size zero and nothing goes in the buffer
but this commit sets up the framework we will need later.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-05 10:06:50 -06:00
Jason Ekstrand
5c30fffeec anv: Take references to push descriptor set layouts
Technically, descriptor set layouts aren't required to survive past the
function they're passed into so we need to reference them.

Cc: "19.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-05 10:06:50 -06:00
Jason Ekstrand
8ab95b849e anv: Refactor descriptor pushing a bit
Pull the common code out of the two entrypoints into the helper which
fetches the push descriptor set for us.  Now that it does more than just
get a thing, call it anv_cmd_buffer_push_descriptor_set.

Cc: "19.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-03-05 10:06:50 -06:00