fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-10 12:30:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

intel/decoders: limit number of decoded batchbuffers

Browse source 
IGT has a test to hang the GPU that works by having a batch buffer
jump back into itself, trigger an infinite loop on the command stream.
As our implementation of the decoding is "perfectly" mimicking the
hardware, our decoder also "hangs". This change limits the number of
batch buffer we'll decode before we bail to 100.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
This commit is contained in:
Lionel Landwerlin 2018-09-04 15:45:32 +01:00
parent acb50d6b1f
commit bf93084f44
4 changed files with 27 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
src/intel/common/gen_batch_decoder.c
View file

@ -810,6 +810,17 @@ gen_print_batch(struct gen_batch_decode_ctx *ctx,
const uint32_t *p, *end = batch + batch_size / sizeof(uint32_t);
int length;
struct gen_group *inst;
const char *reset_color = ctx->flags & GEN_BATCH_DECODE_IN_COLOR ? NORMAL : "";
if (ctx->n_batch_buffer_start >= 100) {
fprintf(ctx->fp, "%s0x%08"PRIx64": Max batch buffer jumps exceeded%s\n",
(ctx->flags & GEN_BATCH_DECODE_IN_COLOR) ? RED_COLOR : "",
(ctx->flags & GEN_BATCH_DECODE_OFFSETS) ? batch_addr : 0,
reset_color);
return;
}
ctx->n_batch_buffer_start++;
for (p = batch; p < end; p += length) {
inst = gen_ctx_find_instruction(ctx, p);
@ -817,8 +828,6 @@ gen_print_batch(struct gen_batch_decode_ctx *ctx,
assert(inst == NULL || length > 0);
length = MAX2(1, length);
const char *reset_color = ctx->flags & GEN_BATCH_DECODE_IN_COLOR ? NORMAL : "";
uint64_t offset;
if (ctx->flags & GEN_BATCH_DECODE_OFFSETS)
offset = batch_addr + ((char *)p - (char *)batch);
@ -908,4 +917,6 @@ gen_print_batch(struct gen_batch_decode_ctx *ctx,
break;
}
}
ctx->n_batch_buffer_start--;
}

2
src/intel/common/gen_decoder.h
View file

@ -237,6 +237,8 @@ struct gen_batch_decode_ctx {
int max_vbo_decoded_lines;
enum drm_i915_gem_engine_class engine;
int n_batch_buffer_start;
};
void gen_batch_decode_ctx_init(struct gen_batch_decode_ctx *ctx,

2
src/intel/tools/aubinator_viewer.h
View file

@ -82,6 +82,8 @@ struct aub_viewer_decode_ctx {
enum aub_decode_stage stage;
uint32_t end_urb_offset;
struct aub_decode_urb_stage_state urb_stages[AUB_DECODE_N_STAGE];
int n_batch_buffer_start;
};
void aub_viewer_decode_ctx_init(struct aub_viewer_decode_ctx *ctx,

10
src/intel/tools/aubinator_viewer_decoder.cpp
View file

@ -898,6 +898,14 @@ aub_viewer_render_batch(struct aub_viewer_decode_ctx *ctx,
const uint32_t *p, *batch = (const uint32_t *) _batch, *end = batch + batch_size / sizeof(uint32_t);
int length;
if (ctx->n_batch_buffer_start >= 100) {
ImGui::TextColored(ctx->cfg->error_color,
"0x%08" PRIx64 ": Max batch buffer jumps exceeded", batch_addr);
return;
}
ctx->n_batch_buffer_start++;
for (p = batch; p < end; p += length) {
inst = gen_spec_find_instruction(ctx->spec, ctx->engine, p);
length = gen_group_get_length(inst, p);
@ -991,4 +999,6 @@ aub_viewer_render_batch(struct aub_viewer_decode_ctx *ctx,
break;
}
}
ctx->n_batch_buffer_start--;
}