Commit graph

54887 commits

Author SHA1 Message Date
Eric Engestrom
0ab33ec6d4 zink: use updated tokens from vk.xml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17342>
2022-07-12 15:53:11 +00:00
Hoe Hao Cheng
c8bd10852c zink/codegen: use the updated identifiers
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17342>
2022-07-12 15:53:11 +00:00
Mike Blumenkrantz
fb917a606c lavapipe: don't crash on null xfb buffer pointer
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17469>
2022-07-12 13:43:37 +00:00
Mike Blumenkrantz
276557b9c6 lavapipe: don't overwrite entire VkFormatProperties3 struct
this clobbers pNext and breaks tooling, as found by Panagiotis Apostolou

Fixes: f72d5a930b ("lavapipe: KHR_format_feature_flags2")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17462>
2022-07-12 13:31:00 +00:00
SoroushIMG
eb6faf329c zink: Fix BO size when it's not aligned to 16 bytes
glsl_get_explicit_size can return non-16 byte aligned sizes.
Therefore, make sure the sure the size isrounded up so that OOB does not happen.

Fixes: ea8a0654f5 ("zink: further improve bo sizing")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17460>
2022-07-12 12:58:02 +00:00
Adam Jackson
4fbc237cae gallium/dri: Remove the memory of GLX_MESA_multithread_makecurrent
The only way this could happen was if GLX did it, which it doesn't.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17473>
2022-07-12 10:02:46 +00:00
Samuel Pitoiset
e9b2fa6527 radv: fix wide points/lines by configuring the guardband correctly
Fixes all remaining wide points/lines failures with Zink.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6121
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17392>
2022-07-12 09:11:40 +02:00
Emma Anholt
240a98297d freedreno: Rename the "SIZE" regs for interpolateAtOffset to "CENTERRHW"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17322>
2022-07-11 16:56:05 +00:00
Emma Anholt
0e1fb2d984 nir+ir3: Rename load_size_ir3 to load_center_rhw_ir3.
Now that we know what it does, it also explains what it's doing in
interpolateAtOffset in ir3.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17322>
2022-07-11 16:56:05 +00:00
Daniel Schürmann
676700d660 radv/shader_info: fix load_frag_coord and load_sample_pos read masks
Fixes: a8c471f962 ('radv: gather more information about PS in the shader info pass')
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17417>
2022-07-11 06:36:45 +00:00
Gert Wollny
b45cec260c r600/sfn: Add missing copyright information
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17450>
2022-07-11 05:45:26 +00:00
Pavel Ondračka
42a3d22f16 r300: Keep rc_rename_regs() from overflowing RC_REGISTER_MAX_INDEX
This pass tries to move register usage closer to SSA, and for large
shaders this means we can overflow the register index, which only has
RC_REGISTER_INDEX_BITS size. This creates invalid code and leads to
crash at a later stage. Limit the pool of available registers to
RC_REGISTER_MAX_INDEX, currently is was two times the number of
shader instructions.

This means we'll fail the compile right away if we wanted more than
RC_REGISTER_MAX_INDEX temps, but when we've got that many we're
already well past how many instructions we can support anyway.

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6017
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17393>
2022-07-11 03:38:59 +00:00
Mike Blumenkrantz
21b3a23404 mesa: fix SignalSemaphoreEXT behavior
the EXT_external_object spec originally was underspecified with regards
to this function, leaving room for synchronization errors where:
* app calls SignalSemaphoreEXT to signal a semaphore
* mesa defers pipe_context::fence_server_signal with threaded context
* driver defers gpu submission
* SignalSemaphoreEXT has long since returned, app submits vk cmdbuf waiting on semaphore
* spec violation / device lost

to prevent this, the spec is being changed to:
1) require an implicit flush when calling SignalSemaphoreEXT
2) require that this implicit flush also forces GPU submission before SignalSemaphoreEXT returns

all affected drivers have been updated

fixes #6568

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17376>
2022-07-10 16:15:17 +00:00
Emma Anholt
426c7b65db vc4: Disable OES_texture_3D being exposed.
The hardware doesn't support 3D textures.  We had been lying about 3D
texture level support in the past so that we got GL 2.1, but now reporting
levels==0 doesn't disable GL 2.1 (since we don't check for GL2 extensions
any more).  But, by not lying, we now fix the majority of the remaining
GLES2 deqp failures.

This regresses a few desktop GL piglits which get GL errors that they
notice instead of what would be silent rendering failures on 3D texturing
operations.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17350>
2022-07-10 02:50:09 +00:00
Marek Olšák
c9ca8abe4f Change all debug_assert calls to assert
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17403>
2022-07-10 00:50:35 +00:00
Marek Olšák
2f01a22fe4 util: remove our redefinition of assert
I think we can all agree that our own assert is unnecessary.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6780

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17403>
2022-07-10 00:50:34 +00:00
Marek Vasut
c73cc1785a dri: Check buffer height and avoid overflow
The dri2_allocate_buffer() can be called with arbitrary height, however
the struct pipe_resource .height0 member is uint16_t. Check height for
maximum size to avoid overflow. Note that .width0 is unsigned int, so
it does not have the same issue.

The uint16 limit comes from commit:
e6428092f5 ("gallium: decrease the size of pipe_resource - 64 -> 48 bytes")

The overflow can be triggered e.g. by requesting large BO:
```
gbm_bo_create(dev, 1, 640*480*4, GBM_FORMAT_R8, GBM_BO_USE_LINEAR);
```

Signed-off-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16513>
2022-07-09 22:07:14 +00:00
Marek Olšák
3b36700162 radeonsi: fix random PS wave size
Fixes: b3b2f97f2e "radeonsi: add Wave32 heuristics and shader profiles"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17410>
2022-07-09 21:00:51 +00:00
David Heidelberg
71b32a9f75 docs: briefly document Gallium Nine
Credits: Axel Davy, lorn10, Pavel Ondračka

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4937

Acked-by: Filip Gawin <filip@gawin.net>
Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17154>
2022-07-09 10:49:12 +00:00
Jason Ekstrand
530de844ef intel,anv,iris,crocus: Drop subgroup size from the shader key
Use nir->info.subgroup_size instead.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00
Jason Ekstrand
b2ab6d10e4 mesa,glsl,ttn: Set subgroup_size to UNIFORM
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00
Tiago Koji Castro Shibata
e64fd5e475 d3d12: add more formats to supported conversions
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4761
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17435>
2022-07-08 22:35:17 +00:00
Rob Clark
c2c2da91a8 freedreno/a6xx: Do clip-plane lowering in backend
Our GS-lowered-to-quasi-VS confuses core nir passes, so handle clip-
plane lowering ourself.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17341>
2022-07-08 20:32:35 +00:00
Rob Clark
5352cd02f8 freedreno/a6xx: Handle driver-params in GS/DS
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17341>
2022-07-08 20:32:35 +00:00
Rob Clark
100d8afbbd freedreno: rename ir3_emit_driver_params()
Driver-params are not VS specific, rename helper to reflect this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17341>
2022-07-08 20:32:35 +00:00
Rob Clark
bbcd04922f freedreno/a6xx: Fix VS const packet size
Need to account for the PKT7 header.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17341>
2022-07-08 20:32:35 +00:00
Rob Clark
b63cc83f6a freedreno/a6xx: Fix indentation
Another victim of automated re-indenting being unaware of the semantics.
Re-indent this to put each dword of the packet on it's own line to make
the size of the packet more clear.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17341>
2022-07-08 20:32:35 +00:00
Rob Clark
e16c46c6a8 freedreno/a6xx: assert valid vertex_flags reg
If this somehow gets optimized out, the GS will run forever.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17341>
2022-07-08 20:32:35 +00:00
Corentin Noël
5b683ba19a virgl: Only progagate the uniform numbers if the numbers are actually right
When the field was first introduces, the numbers were reporting the number of
vec4 instead of the number of float. Do not propagate them if they are wrong.

Fixes: d92c1ca01b

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17415>
2022-07-08 12:58:20 +00:00
Mike Blumenkrantz
2f3a233b6f zink: flush pending clears for fb texture barriers
if a texture barrier occurs while clears are pending, these clears should
show up if the fb attachments are read in shaders, so trigger a renderpass
to flush out the clears

cc: mesa-stable

fixes #6766

fixes (radv):
dEQP-GLES3.functional.draw_buffers_indexed.overwrite_common.common_advanced_blend_eq_buffer_advanced_blend_eq
dEQP-GLES3.functional.draw_buffers_indexed.overwrite_common.common_blend_eq_buffer_advanced_blend_eq
dEQP-GLES3.functional.draw_buffers_indexed.overwrite_common.common_separate_blend_eq_buffer_advanced_blend_eq
dEQP-GLES3.functional.draw_buffers_indexed.overwrite_indexed.common_advanced_blend_eq_buffer_advanced_blend_eq
dEQP-GLES3.functional.draw_buffers_indexed.overwrite_indexed.common_advanced_blend_eq_buffer_blend_eq
dEQP-GLES3.functional.draw_buffers_indexed.overwrite_indexed.common_advanced_blend_eq_buffer_separate_blend_eq

Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17363>
2022-07-08 11:58:11 +00:00
Georg Lehmann
27526ffad1 r600/sfn: Add missing std::array include.
Fixes: 79ca456b48 ("r600/sfn: rewrite NIR backend")
Closes https://gitlab.freedesktop.org/mesa/mesa/-/issues/6824

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17412>
2022-07-08 09:34:53 +00:00
Pierre-Eric Pelloux-Prayer
01314d0880 radeonsi: use LLVMBuildLoad2 for inter-stage outputs loads
The PS case was covered by the previous commit, so we can use f32
everywhere.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17361>
2022-07-08 08:41:26 +00:00
Pierre-Eric Pelloux-Prayer
248781dea1 radeonsi: use LLVMBuildLoad2 in llvm PS
PS is the only shader type where unpacked 16-bit outputs can be used,
so use ac_shader_abi::is_16bit to pass the proper type to LLVMBuildLoad2.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17361>
2022-07-08 08:41:26 +00:00
Pierre-Eric Pelloux-Prayer
196c4ebe1a ac: add per output is_16bit flag to ac_shader_abi
Outputs are always f32 except for FS that may use unpacked f16.
Store this information here to make it available to later processing.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17361>
2022-07-08 08:41:25 +00:00
Pierre-Eric Pelloux-Prayer
c275e69cee radeonsi: use LLVMBuildLoad2 where possible
This commit replaces LLVMBuildLoad usage by LLVMBuildLoad2
where possible (= where the pointee type is known).

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17361>
2022-07-08 08:41:25 +00:00
Danylo Piliaiev
d9296dcbbf zink: re-enable EXT_primitives_generated_query for Turnip
https://gitlab.freedesktop.org/mesa/mesa/-/issues/6602 is resolved
so the extension could be re-enabled.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17163>
2022-07-08 11:15:20 +03:00
Danylo Piliaiev
bf4c160909 tu: Fix prim gen query and pipeline stats query interaction
Fixed:
- VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT was able to stop prim counter
  when pipeline stats query is running.
  - This may have happened when prim gen query was in secondary cmdbuf.
- VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT counting geometry in each tile.
- VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT counting geometry in each tile
  when pipeline stats query is started inside prim gen query and inside
  a renderpass.

The matter of VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT and pipeline stats
interaction is solved by tracking whether pipeline stats query is
running both on CPU (for non secondary cmdbuf case) and on GPU (for
secondary cmdbuf).

Note, prim gen query is not allowed with secondary command buffers, so
only pipeline stats query is tracked on gpu.
See https://gitlab.khronos.org/vulkan/vulkan/-/issues/3142

Counting geometry per each tile is solved by:
- Conditionally executing START/STOP_PRIMITIVE_CTRS to not run in tiling
  pass. Solves the case when prim gen query is inside a renderpass.
- Stop prim counters before executing `draw_cs` and restarting them
  afterwards. Solves prim gen query being outside a renderpass.

Fixes GL CTS tests with Zink + `TU_DEBUG=gmem`:
 GTF-GL46.gtf30.GL3Tests.transform_feedback.transform_feedback_max_separate
 GTF-GL46.gtf40.GL3Tests.transform_feedback2.transform_feedback2_basic
 GTF-GL46.gtf40.GL3Tests.transform_feedback2.transform_feedback2_framebuffer
 GTF-GL46.gtf40.GL3Tests.transform_feedback3.transform_feedback3_streams_overflow
 GTF-GL46.gtf40.GL3Tests.transform_feedback3.transform_feedback3_streams_queried
 GTF-GL46.gtf40.GL3Tests.transform_feedback2.transform_feedback2_states

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6602

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17163>
2022-07-08 11:14:18 +03:00
Samuel Pitoiset
cf46397aec aco: fix load_barycentric_at_sample without MSAA
It's legal to use this instruction in a fragment shader, even if the
graphics pipeline doesn't use MSAA.

Fixes
dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.non_multisample_buffer.sample_n_*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17398>
2022-07-08 07:28:33 +00:00
Alyssa Rosenzweig
638b22354e panfrost: Clear with a quad to avoid flushing
Flushing the batch midframe (splitting a renderpass) is expensive on a tiler, as
it requires the GPU to flush the framebuffer contents to main memory and read
them back. Clearing the framebuffer should not trigger a flush. Apps expect
clears to be (almost) free, flushing for a clear is at the very least unexpected
behaviour.

The only reason we previously flushed is to ensure we could always use a "fast"
clear. But a slow clear is a heck of a lot faster than a flush ;-) Instead of
flushing, we should clear with a draw (via u_blitter) in case a fast clear isn't
possible.

This fixes pathological performance for applications that rely on partial clears
within a frame. This issue was identified with Inochi2D, which repeatedly clears
the stencil buffer midframe, in order to implement masking efficiently with the
stencil buffer. In total, the all-important workload of rendering Asahi Lina is
improved from 17fps to 29fps on a panfrost device.

Fixes: c138ca80d2 ("panfrost: Make sure a clear does not re-use a pre-existing batch")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17112>
2022-07-08 01:50:03 +00:00
Icecream95
dc37ad2a73 panfrost: Enable QUAD_STRIP and POLYGON on v6
I wrote fiction about dreaming that these were supported but after
waking finding that they were not. Somehow I came to consider that
fiction as fact and I never thought to test if they did work.

While reverse engineering the polygon list format, I found that these
were supported after all.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17371>
2022-07-08 01:30:23 +00:00
Alyssa Rosenzweig
3d69b65512 panfrost: Fix PIPE_COMPUTE_CAP_SUBGROUP_SIZE
Use the new helper to implement the CAP, correctly handling Midgard and Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17265>
2022-07-08 01:14:55 +00:00
Alyssa Rosenzweig
c517ec5939 panfrost: Fix PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS
This maps to CL_DEVICE_MAX_COMPUTE_UNITS, which is defined as:

   The number of parallel compute cores on the OpenCL device.

Since all supported Malis are unified shader cores, the number of parallel
compute cores is simply the number of shader cores.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17265>
2022-07-08 01:14:55 +00:00
Alyssa Rosenzweig
6f3eea5ddb panfrost: Separate core ID range from core count
To query the core count, the hardware has a SHADERS_PRESENT register containing
a mask of shader cores connected. The core count equals the number of 1-bits,
regardless of placement. This value is useful for public consumption (like
in clinfo).

However, internally we are interested in the range of core IDs.
We usually query core count to determine how many cores to allocate various
per-core buffers for (performance counters, occlusion queries, and the stack).
In each case, the hardware writes at the index of its core ID, so we have to
allocate enough for entire range of core IDs. If the core mask is
discontiguous, this necessarily overallocates.

Rename the existing core_count to core_id_range, better reflecting its
definition and purpose, and repurpose core_count for the actual core count.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17265>
2022-07-08 01:14:55 +00:00
Rhys Perry
69d21a3dee nir: rename fsin_r600/fcos_r600 to fsin_amd/fcos_amd
GCN has better range, but constant folding is the same.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10587>
2022-07-07 22:18:08 +00:00
Mike Blumenkrantz
3f11ae93be zink: support PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_FREEDRENO
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17189>
2022-07-07 20:39:31 +00:00
Mike Blumenkrantz
2f46495ac0 zink: don't warn for missing customBorderColorWithoutFormat on turnip
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17189>
2022-07-07 20:39:31 +00:00
Mike Blumenkrantz
6872adda26 zink: disable customBorderColorWithoutFormat on turnip
this should "just work" now

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17189>
2022-07-07 20:39:30 +00:00
Mike Blumenkrantz
b6f23f4144 zink: init driver workarounds earlier in screen creation
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17189>
2022-07-07 20:39:30 +00:00
Mike Blumenkrantz
c4e18cd4dd mesa/st: add PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_FREEDRENO
this is for drivers (like freedreno) which need the format in the sampler
state in order to accurately handle border colors

when set, drivers MAY receive a format in the sampler state if the frontend
supports it (e.g., nine does not), and the cso sampler cache will include
the format member of the struct

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17189>
2022-07-07 20:39:30 +00:00
Gert Wollny
983385d319 r600/sfn: support nir_op_mulz and legazy math rules
v2: Handle nir_op_ffmaz as well (Georg Lehmann)

Closes: #6390
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17076>
2022-07-07 20:11:02 +00:00