Commit graph

171764 commits

Author SHA1 Message Date
Lionel Landwerlin
521c216efc anv: use COMPUTE_WALKER post sync field to track compute work
This is more accurate than PIPE_CONTROL as it won't introduce stalls
between the compute dispatches.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
2023-05-24 09:09:01 +03:00
Lionel Landwerlin
ddc37cf430 anv: move timestamp vfunc initialization to genX code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
2023-05-24 09:09:01 +03:00
Gert Wollny
7f5613903c docs/features: fix empty line error
Fixes: cbb144c (virgl: Add support for ARB_pipeline_statistics)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23195>
2023-05-24 05:52:43 +00:00
Tapani Pälli
613eb64011 iris: add required invalidate/flush for Wa_14014427904
This WA impacts skus with multiple CCS, e.g. ATS-M. According to
description, we need to add a pipe control before following NP state
commands:

   STATE_BASE_ADDRESS
   3DSTATE_BTD
   CHROMA_KEY
   STATE_SIP
   STATE_COMPUTE_MODE

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
2023-05-24 04:42:59 +00:00
Tapani Pälli
60b0d2c2cb anv: add required invalidate/flush for Wa_14014427904
This WA impacts skus with multiple CCS, e.g. ATS-M. According to
description, we need to add a pipe control before following NP state
commands:

   STATE_BASE_ADDRESS
   3DSTATE_BTD
   CHROMA_KEY
   STATE_SIP
   STATE_COMPUTE_MODE

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
2023-05-24 04:42:59 +00:00
Tapani Pälli
abcef5a476 intel/dev: provide helper to check if devinfo is ATS-M
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
2023-05-24 04:42:59 +00:00
Rob Clark
b43e5aec0d freedreno/batch: Move submit bo tracking to batch
We already do _most_ of the tracking of rsc associated with a batch at
the batch level.  If we manually add the handful of BOs that aren't part
of the resource tracking, we can drop the duplicate drm level tracking.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
2023-05-24 00:30:49 +00:00
Rob Clark
5d26070f08 freedreno/a6xx: Optimize max_indices calculation
Turn draw-time udiv into two shifts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
2023-05-24 00:30:49 +00:00
Rob Clark
f4fc45d63d freedreno/a6xx: Template specialization for pipeline type
There are a bunch of extra steps for draws that involve GS and/or tess
stages.  But we can use template specialization to skip all that when
there is no GS/tess shader stage bound.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
2023-05-24 00:30:49 +00:00
Rob Clark
778cdb156e freedreno/a6xx: Template specialization for draw type
Convert various run-time conditionals into a single draw type
determination, and use template specialization to generate unique
optimized code paths for each.  This also lets us fold the WFM needed
in some cases into normal barrier flushes.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
2023-05-24 00:30:49 +00:00
Rob Clark
15c66adc8a mesa: Skip update_gl_clamp() if samplers need clamp
update_gl_clamp() was ~12% of drawoverhead -test 40.. this turns it into
a no-op when no clamp lowering is needed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23149>
2023-05-24 00:30:49 +00:00
Lucas Fryzek
3e44b14af8 broadcom: Fix slice memory allocation logic for compressed textures
Compressed textures require their width and height padding to be
calculated based on the number of blocks in the image. This change ensures
that the number of blocks in the texture is a POT for mip levels > 1.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23133>
2023-05-23 23:30:51 +00:00
Lucas Fryzek
fe973222a9 broadcom: Add support for VK_FORMAT_A2R10G10B10_UNORM_PACK32
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23133>
2023-05-23 23:30:51 +00:00
Eric Engestrom
cb60ca3b1d docs: update calendar for 23.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23193>
2023-05-23 23:24:59 +00:00
Eric Engestrom
7fe482d4ce docs: add release notes for 23.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23193>
2023-05-23 23:24:59 +00:00
Alyssa Rosenzweig
622779e5cb dxil: Rely on scoped_barrier
We don't get non-scoped barriers. Don't handle them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23188>
2023-05-23 23:07:42 +00:00
Filip Gawin
e367617668 ac/nir: fix slots in clamping legacy colors
fixes: 7c41cdb81f

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23178>
2023-05-23 21:28:55 +00:00
Mike Blumenkrantz
dd0469e401 lavapipe: VK_EXT_pageable_device_local_memory
the memory guarantees of this extension should be implicit to linux systems

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Mike Blumenkrantz
54c981e4a0 lavapipe: store memory allocation size onto lvp_device_memory
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Mike Blumenkrantz
0c79c04f49 lavapipe: EXT_memory_priority
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Mike Blumenkrantz
1c42056ee1 lavapipe: EXT_memory_budget
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Mike Blumenkrantz
2111a3fcdb lavapipe: report full memory in heap for 64bit processes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Mike Blumenkrantz
8ed34cbfeb lavapipe: bump memory allocation heap to 3GiB
this should still be a safe limit on all systems and archs

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23077>
2023-05-23 21:09:28 +00:00
Erik Faye-Lund
e44911827e util: mark externally-unused functions as static
These functions aren't used outside of sha1.c, so let's remove the
prototypes from the header-file, and mark the definitions as static.

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23163>
2023-05-23 20:32:19 +00:00
Ruijing Dong
799665c9ba frontends/va: remove private member and update target buffer
use update_decoder_target to update the target buffer to
let decoder obtain correct reference frame.

remove the previous logic which failed to update reference
info in time.

fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8996
fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8387
Cc: mesa-stable

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
2023-05-23 19:56:24 +00:00
Ruijing Dong
a89f740e28 radeonsi/vcn: apply update_decoder_target logic
implement update_decoder_target and
remove corresponding obsolete logic.

Cc: mesa-stable
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
2023-05-23 19:56:24 +00:00
Ruijing Dong
5b2544f868 gallium/pipe: add interface update_decoder_target
reason:
decoder uses the target buffer address in record
to indentify the reference frames. When target
buffer has changed outside of decoding process,
it has to be updated back to decoder, otherwise
the outdated reference will cause image corruption.

Cc: mesa-stable
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23061>
2023-05-23 19:56:24 +00:00
Dave Airlie
1f586f9409 ci: reenable lavapipe
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22806>
2023-05-23 19:39:59 +00:00
Ryan Houdek
a7f623e099 util: move check for AVX512
As a side effect solve:
```
[91/1401] Compiling C object src/util/libmesa_util.a.p/u_cpu_detect.c.o
../src/util/u_cpu_detect.c: In function '_util_cpu_detect_once':
../src/util/u_cpu_detect.c:889:11: warning: 'regs2[2]' may be used uninitialized [-Wmaybe-uninitialized]
  889 |       if (((regs2[2] >> 27) & 1) && // OSXSAVE
      |           ^~~~~~~~~~~~~~~~~~~~~~
../src/util/u_cpu_detect.c:823:16: note: 'regs2[2]' was declared here
  823 |       uint32_t regs2[4];
      |                ^~~~~
```

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23164>
2023-05-23 19:04:28 +00:00
Eric Engestrom
ca856143d4 util/bitset: ensure the sets compared have the same size at compile time
Instead of checking this at run time.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23171>
2023-05-23 17:31:17 +00:00
Eric Engestrom
348818fc6c ci: only execute capture-devcoredump.sh when it's present
Avoids this error:

    ./install/common/init-stage2.sh: line 130: /capture-devcoredump.sh: No such file or directory

One step closer to an error-free CI and being able to `set -e`.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22992>
2023-05-23 16:28:55 +00:00
Dave Airlie
aedbc35857 lvp: use stage iterator macros instead of explicit loops
This cleans up the compute checks

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:33 +00:00
Dave Airlie
7bd41840a4 lvp: use stage mask
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:33 +00:00
Dave Airlie
f52510efb3 gallivm/nir: refactor the local invocation index calc.
This is needed elsewhere for mesh shaders.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:33 +00:00
Dave Airlie
1e49199364 gallivm: fix whitespace in get_deref_offset
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:33 +00:00
Dave Airlie
2fbe256e82 lvp: explictly skip compute shader stage.
To add mesh/task later we have to loop over more stages the other side
of compute. So explicitly skip compute for now.

This has a couple of subtle bits to it, and I think there might be a bug
in pre rast

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:33 +00:00
Dave Airlie
6046b6ea94 lavapipe: add lavapipe specific shader stages define.
This currently does nothing, but we need to increase this to add
task/mesh later.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:32 +00:00
Dave Airlie
d45d3f0a81 llvmpipe/cs: support passing a csctx instead of using implicit one
This is just some refactoring to make adding mesh shaders easier

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:32 +00:00
Dave Airlie
89c868a956 llvmpipe/cs: start making variant generator less compute specific
This is just some refactoring prior to task/mesh shaders

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:32 +00:00
Dave Airlie
502cd6a2ca llvmpipe: convert a bunch of shader_type ifs to switches.
This makes it easier to add mesh shader support later

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:32 +00:00
Dave Airlie
7c84ca2305 gallivm/draw: refactor vertex header jit type out
mesh shaders will want access to this as well so start moving it to
common code.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23065>
2023-05-23 14:39:32 +00:00
Gert Wollny
b2c604973b virgl/ci: uprev virglrenderer
Update DEBIAN_BASE_TAG and KERNEL_ROOTFS_TAG

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23121>
2023-05-23 14:01:43 +00:00
Gert Wollny
cbb144c8d4 virgl: Add support for ARB_pipeline_statistics
v2: make sure the PIPE enums map corretly to the VIRGL enums (Tintou)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23121>
2023-05-23 14:01:43 +00:00
Gert Wollny
330a1db016 virgl: Make query result resource as dirty before requesting result
The query result resource will be written to by the host, so we have to
declare it as dirty if we want to see the change.

Fixes: 9279a28f0 (virgl: ARB_query_buffer_object support)

v2: Update expectations in CI

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23121>
2023-05-23 14:01:43 +00:00
norablackcat
c07b8a54c5 rusticl/device: implement cl_khr_device_uuid
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Andrey Alekseenko <al42and@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23147>
2023-05-23 13:40:53 +00:00
norablackcat
536283555e rusticl/screen: implement uuid wrapper funcs
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Andrey Alekseenko <al42and@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23147>
2023-05-23 13:40:53 +00:00
Karol Herbst
c06a18ad9a rusticl/spirv: skip printing info messages
Those are quite spammy and add no value.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23091>
2023-05-23 13:02:40 +00:00
Lionel Landwerlin
21c7b55f6f intel/fs: fix size_read() for LOAD_PAYLOAD
With Anv/Zink, the piglit test :

  arb_shader_storage_buffer_object-max-ssbo-size -auto -fbo fsexceed

is failing validation after copy propagation :

load_payload(8) vgrf15:F, vgrf1+0.12<0>:F, vgrf1+0.0<0>:F, vgrf1+0.4<0>:F, vgrf1+0.8<0>:F, vgrf1+0.12<0>:F
../src/intel/compiler/brw_fs_validate.cpp:191: A <= B failed
  A = inst->src[i].offset / REG_SIZE + regs_read(inst, i) = 2
  B = alloc.sizes[inst->src[i].nr] = 1

In most cases it works because src[0] would be at offset 0 and so
reading a full reg passes validation, but Anv/Zink started emitting
slightly different code adding an offset maybe the size read 2 GRFs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23126>
2023-05-23 12:39:08 +00:00
Tatsuyuki Ishi
1546a9de99 nir: Fix serializing pointer initializers.
Found by manual inspection.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>

Fixes: 7acc81056f ("compiler/nir: Add support for variable initialization from a pointer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22355>
2023-05-23 11:40:48 +00:00
Eric Engestrom
520c5091d7 ci: disable anholt's farm
Its http cache proxy has been returning `curl: (52) Empty reply from
server` for a while and rebooting it didn't help, so turn it off for now.

Suggested-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Eric Engestrom <eric@igalia.com>
2023-05-23 12:35:35 +01:00