Commit graph

4093 commits

Author SHA1 Message Date
Rob Clark
210c6c11cc freedreno+tu: Add a690 support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21573>
2023-03-18 18:21:53 +00:00
Rob Clark
b012a4a9cd freedreno+tu: Big GMEM support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21573>
2023-03-18 18:21:53 +00:00
Rob Clark
60bc7c0e22 freedreno: Specify GMEM tile alignment per GPU
They differ presumably based on # of CCU/SP and DDR bus topology.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21573>
2023-03-18 18:21:53 +00:00
David Heidelberg
161799d2c7 ci/traces: add two skips due to flakes
The unvanquished flaked time to time from beginning, minetest-v2 has
occasional 1 tiny change in the pixel.

Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21990>
2023-03-18 14:20:41 +01:00
David Heidelberg
9e6c88c96b ci/freedreno: add recent occasional flakes
Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21990>
2023-03-18 14:20:21 +01:00
David Heidelberg
f4a6993b1f ci/traces: disable nheko trace with zink since it flakes
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21976>
2023-03-17 05:51:07 +00:00
Emma Anholt
4466098324 ci/turnip: Move some more of the 1.3.5 new xfails under links.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21915>
2023-03-15 23:07:21 +00:00
Emma Anholt
5e3d36199f ci/turnip: Disable dEQP-VK.image.queue_transfer.* for now.
We're waiting on the upstream CTS fix to land.  Until then, quiet the spam
in #freedreno-ci to see if we have any other flakes we need to be managing
right now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21915>
2023-03-15 23:07:21 +00:00
Emma Anholt
45dc05d455 ci/turnip: Clear out stale xfails.
These were all fixed in the CTS, but missed from removal due to fractional runs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21915>
2023-03-15 23:07:21 +00:00
Emma Anholt
78d4a82d30 turnip: Don't push inline uniform buffer contents outside constlen.
This would apparently lead to trying to load from this inline uniform
buffer in later submits.

Fixes: 37cde2c634 ("tu: Rewrite inline uniform implementation")
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8219
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21915>
2023-03-15 23:07:21 +00:00
Emma Anholt
e61b423074 ci/turnip: Extend a630 vk full timeout to 3 hours.
With the CTS coverage and tu featureset extending, these jobs have been
reliably timing out for a while.  I've updated the xfails based on a
single run, we'll see how that goes in the upcoming nightlies.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21879>
2023-03-15 08:15:37 +00:00
Emma Anholt
761bbb2c6f ci: Update trace expectations for GLSL constant prop removal.
Somewhere along the way there were minor pixel value changes.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21751>
2023-03-15 03:29:19 +00:00
Mike Blumenkrantz
7d41b8fe4e tu: don't set startup debug on debug builds
this is incredibly annoying on normal linux systems

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21809>
2023-03-14 19:48:24 +00:00
Mark Collins
715adcb884 tu: fix tu_GetInstanceProcAddr not handling null instance
It is legal to pass in nullptr as an instance into
vkGetInstanceProcAddr when resolving any global addresses, this
wasn't handled correctly and an illegal access to a member of
a null struct was made.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21827>
2023-03-13 19:31:33 +00:00
Mark Collins
9c808043f3 tu: KGSL backend rewrite
This commit rewrites the KGSL backend to utilize vk common wherever
possible to bring the codebase in line with DRM while implicitly
fixing minor API bugs that may have occurred as a result of manually
implementing VK functions.

As a part of moving to vk common, KGSL sync is now implemented
atop vk common sync and vastly expanded in terms of functionality
such as:
* Import/Export of sync FDs - A required capability for properly
  supporting the Android WSI and as these functions were stubbed
  when a presentation operation used semaphores, it would cause a
  leak of FDs that were imported due to the expectation that the
  driver would close them. As well as causing UB around due to
  ignoring the imported FD or not exporting a valid FD.
* Supporting pre-signalled fences - Vulkan allows fences to be
  created in a signalled state which was stubbed prior and can
  lead to UB.
* Timeline semaphore support - As a result of utilizing vk common
  as the backbone for synchronization, its timeline semaphore
  emulation has been utilized to provide support for them without
  needing kernel support. (Note: On newer versions of KGSL,
  timeline semaphores can be implemented natively rather than
  using emulation as they support wait-before-signal)

Fixes freezes due to semaphore usage with presentation on:
* Genshin Impact
* Skyline Emulator

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21651>
2023-03-13 18:59:50 +00:00
Danylo Piliaiev
5ca3481b5d freedreno/register: Define chip enum values
Otherwise it cannot be used in templates

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:24 +00:00
Rob Clark
6b2c1b00ff freedreno/registers: Define rest of CP_REG_WRITE
Enough that we can use OUT_PKT() to emit it, which will be needed when
we use it to write regs that are different btwn a6xx and a7xx.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:24 +00:00
Rob Clark
6dd5b4ca5f freedreno/registers: Fix nameless fields
Originally if we had an anonymous field (ie. field declared as part of
the register definition itself) the name in the generated field struct
would include the gen prefix (ie. .a6xx_rb_stencil_buffer_pitch), but
this doesn't work for variants because the variant regs would have
different gen prefixes.  Fix this by using reg name instead of the
full_name.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:24 +00:00
Rob Clark
dc43237d1a freedreno/registers: Add c++ magic for register variants
For regs with multiple variants, generate a template'ized function to
pack the reg value.  If the template param is known at compile time
(which is the expected usage) this will optimize to the same thing as
the "traditional" reg packing.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:24 +00:00
Rob Clark
d58af7b5c7 freedreno/registers: Split out regpair builder helper
We are going to want to re-use this in the next commit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:24 +00:00
Rob Clark
d54edcfc72 freedreno/registers: Track varset
Track varset and assert that variants refer to a valid varset enum
value.  This adds a bit of extra sanity checking, but becomes more
useful in the next commit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:23 +00:00
Rob Clark
f011189642 freedreno/registers: Start adding stuff for a7xx
Start adding the bits needed for userspace.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:23 +00:00
Rob Clark
b90d4a0701 freedreno/decode: Start adding a7xx support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:23 +00:00
Rob Clark
dd6e7041ab freedreno/registers: Start adding a7xx pipe/control regs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:23 +00:00
Rob Clark
56f9371f7e freedreno/registers: Merge a6xx and a7xx regs
They have more similarities than differences, so merge them and use
"variant" attribute as needed to manage differences.

Note initially using "variant" conservatively when it comes to regs
known on a7xx but not a6xx.  It could be that they exist also on later
versions of a6xx as well, for example.  For ex, LPAC related regs/bits
likely existed on later a6xx (eg. a660 family) but BV stuff is not.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:23 +00:00
Rob Clark
684931166d freedreno/registers: Add prefix="variant"
To merge a7xx and a6xx regs, using variant property to manage the
differences, we'll want regs/etc to be named according to the first
generation it is use rather than the domain name.  Add a new prefix
type to accomplish this.  By default, if no variant property, things
will still be named based on domain (ie. REG_A6XX_...), and things
that have variant="A6XX" will also end up as they currently are
(since the chip enum matches domain name), but things that have
variant="A7XX" will end up as REG_A7XX_...

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:23 +00:00
Rob Clark
fadf76b938 freedreno/registers: Fix designator order
C++ is picky about order matching for some reason.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:23 +00:00
Rob Clark
ce336097f1 freedreno/a6xx: Fix designator initializer order
Clang seems more relaxed about this, allowing C99 style initializers
without requiring ordering.  But unfortunately g++ is more picky :-/

TODO this doesn't completely fix everything with g++, namely sparse
array initialization.. for ir3 driver-params, I think we can convert
these to structs.  But there are still one or two others to deal with.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:23 +00:00
Rob Clark
f921b7c09b freedreno: c++-proofing
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:22 +00:00
Rob Clark
5eed59cc87 freedreno/ir3+tu: Calculate subgroup size in ir3
TBD if the size changes for a7xx, but at least let's have it in one
place instead of duplicating in turnip and gallium.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:22 +00:00
Rob Clark
c449e63809 freedreno/ir3: c++-proof the headers
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:22 +00:00
Rob Clark
bff0ff5ae3 freedreno/ir3: Don't use negative opc for meta instructions
Stricter compilers complain about this, ie:

  error: left operand of shift expression ‘(-1 << 7)’ is negative [-fpermissive]

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:22 +00:00
Rob Clark
7c7761574e freedreno/ir3: Un-inline enums
It seems to be a thing that c++ dislikes

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:22 +00:00
Rob Clark
64e93ca9a1 freedreno/registers: Add regs for a690
New regs needed on kernel side.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:22 +00:00
Rob Clark
44d0365a4d freedreno/registers: Schema validation for gen_header.py
Lets catch issues at build time, and not relying on someone remembering
to run the unit tests.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:22 +00:00
Rob Clark
963729af2a freedreno: Nerf strict-aliasing warning for all of gcc
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
2023-03-13 17:31:21 +00:00
Isabella Basso
b3685f3ba7 nir/algebraic: insert patterns inside optimizations list
Some patterns were outside the list of optimizations.

Fixes: b86305bb ("nir/algebraic: collapse conversion opcodes (many patterns)")

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Signed-off-by: Isabella Basso <isabellabdoamaral@usp.br>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20965>
2023-03-11 17:21:37 +00:00
David Heidelberg
84767a5160 ci/lava: every LAVA job doesn't want to run gles2 deqp, drop it
Very annoying when adding new job and not getting failure due to missing
`DEQP_VER: `

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21702>
2023-03-11 14:48:20 +00:00
Daniel Stone
50378f59a7 ci: Actually run Piglit on LAVA
At some point in a refactoring long ago, our 'Piglit' runs on arm64
started actually being dEQP-GLES2 runs. Oh dear.

Surprisingly, there are a number of expectation changes; added every
fail I saw from a long overnight stress test.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21851>
2023-03-11 11:58:30 +00:00
Daniel Stone
6f1aa8cfc1 ci/fdno: Add a618 Vulkan flakes
It looks like descriptors are generically a bit broken, which takes out
a massive number of tests periodically.

The pipeline-library tests also have some unknowable issues.

cf. #8219

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21740>
2023-03-09 14:47:57 +00:00
Alyssa Rosenzweig
c8147e69d3 ir3: Drop non-scoped barrier handling
Now unreachable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>
2023-03-07 00:41:13 +00:00
Mark Collins
66d2ae0386 meson: forcefully disable libdrm when host doesn't have it
Signed-off-by: Mark Collins <mark@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21724>
2023-03-06 22:40:55 +00:00
Alyssa Rosenzweig
4b6d98a40c ir3: Use lower_index_to_offset
Instead of doing the add ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21546>
2023-03-06 21:38:32 +00:00
Daniel Stone
34d45df8ff ci/fdno: Only run full tests on a limited subset of machines
Though not many people run full test runs, it occupies 2/7 a630 slots
for nearly 2 hours. If more than one person does this at a time, it can
be an effective DoS and make merges time out.

Limit full runs to a subset of the runners, such that at least some of
them will always be available for us.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21737>
2023-03-06 19:56:39 +00:00
Rob Clark
399012a911 freedreno/common: Replace or_mask() with BitsetEnum<T>
Use template and operator overloading to make dealing with bitmask enums
shared between C and C++ easier.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21535>
2023-03-06 19:27:19 +00:00
Rob Clark
5f5ccf4bec turnip: Use libdrm shim
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21636>
2023-03-05 16:31:51 +00:00
David Heidelberg
b73b701579 ci/freedreno: rare flake KHR-GL45.sample_variables.mask.rgba8i.samples_4.mask_3
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21718>
2023-03-05 14:34:33 +00:00
Eric Engestrom
6f654d532b tu: add linker script to fix android symbols
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>
2023-03-04 07:41:10 +00:00
Samuel Pitoiset
f775873f81 ci: uprev CTS to 1.3.5.0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21390>
2023-03-03 08:23:21 +00:00
Timothy Arceri
d75a36a9ee glsl: remove do_copy_propagation_elements() optimisation pass
Since 13b859de do_copy_propagation_elements() has a flaw where
the time it takes to complete grows exponentially slowers as the number
of nested loops increases. It can also hurt rather than help verses
just letting NIR optimise the code. So if the NIR linker is enabled we
let it handle it instead.

shader-db results Iris (BDW):

total instructions in shared programs: 11177181 -> 11199739 (0.20%)
instructions in affected programs: 119424 -> 141982 (18.89%)
helped: 109
HURT: 65
total cycles in shared programs: 368946819 -> 372277173 (0.90%)
cycles in affected programs: 116539428 -> 119869782 (2.86%)

total spills in shared programs: 3983 -> 8785 (120.56%)
spills in affected programs: 2072 -> 6874 (231.76%)
helped: 0
HURT: 6

total fills in shared programs: 2016 -> 6068 (200.99%)
fills in affected programs: 230 -> 4282 (1761.74%)
helped: 0
HURT: 6

LOST:   85
GAINED: 77

freedreno results:

total instructions in shared programs: 11011122 -> 11011620 (<.01%)
instructions in affected programs: 939829 -> 940327 (0.05%)
total full in shared programs: 762725 -> 762674 (<.01%)
full in affected programs: 1096 -> 1045 (-4.65%)
total constlen in shared programs: 1772092 -> 1771596 (-0.03%)
constlen in affected programs: 2780 -> 2284 (-17.84%)
total stp in shared programs: 4040 -> 4058 (0.45%)
stp in affected programs: 3656 -> 3674 (0.49%)
total ldp in shared programs: 2160 -> 2178 (0.83%)
ldp in affected programs: 1748 -> 1766 (1.03%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_high_off/13.shader_test CL: 1231 -> 1234 (0.24%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_normal_off/13.shader_test CL: 1231 -> 1234 (0.24%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_high_off/15.shader_test CL: 453 -> 456 (0.66%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_normal_off/15.shader_test CL: 453 -> 456 (0.66%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_high_off/17.shader_test CL: 144 -> 147 (2.08%)
stp HURT:   shaders/robclark-shaders/gfxbench5/gl_5_normal_off/17.shader_test CL: 144 -> 147 (2.08%)

however, those stp counts are misleading -- gfxbench gl-5-normal actually
gets its scratch (ldp/stp) stored as 16 bits instead of 32 thanks to
better NIR copy prop, and the result is 2.64398% +/- 0.0991923% perf
improvement!

i915 results:

total instructions in shared programs: 510528 -> 510489 (<.01%)
instructions in affected programs: 3303 -> 3264 (-1.18%)
total tex_indirect in shared programs: 16708 -> 16717 (0.05%)
tex_indirect in affected programs: 134 -> 143 (6.72%)
total temps in shared programs: 30181 -> 30169 (-0.04%)
temps in affected programs: 1268 -> 1256 (-0.95%)
LOST:   0
GAINED: 1

i915 highlights:
instructions HURT:   shaders/closed/steam/legend-of-grimrock/47.shader_test FS: 141 -> 144 (2.13%)
instructions HURT:   shaders/closed/steam/steamworld-dig/22.shader_test FS: 84 -> 108 (28.57%)
temps HURT:   shaders/closed/steam/left-4-dead-2/medium/3682.shader_test FS: 7 -> 13 (85.71%)

r300 results:

total instructions in shared programs: 1340439 -> 1340845 (0.03%)
instructions in affected programs: 32354 -> 32760 (1.25%)
total temps in shared programs: 179394 -> 179329 (-0.04%)
temps in affected programs: 1505 -> 1440 (-4.32%)
total consts in shared programs: 1177742 -> 1177885 (0.01%)
consts in affected programs: 1107 -> 1250 (12.92%)
total lits in shared programs: 24992 -> 25019 (0.11%)
lits in affected programs: 138 -> 165 (19.57%)
instructions HURT:   shaders/closed/steam/legend-of-grimrock/26.shader_test FS: 47 -> 52 (10.64%)
instructions HURT:   shaders/closed/steam/sanctum-2/6072.shader_test FS: 43 -> 48 (11.63%)
instructions HURT:   shaders/closed/steam/champions-of-regnum/2378.shader_test VS: 35 -> 40 (14.29%)

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13288>
2023-03-01 16:09:25 +00:00