Commit graph

153307 commits

Author SHA1 Message Date
Alyssa Rosenzweig
e414a8c16f agx: Add agx_after_block_logical helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
a2a947031a agx: Mark the logical ends of blocks
We need to insert parallel copies at the logical end of blocks, before branches.
Add a pseudo instruction signaling that. Cribbed from ACO.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
5be26e8624 agx: Add predecessor index helper
To order phi sources.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
3f1e926bf4 agx: Use a dynarray for predecessors
This imposes a fixed ordering, allowing phi sources to be implicitly ordered.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
d02e913e95 agx: Remove else optimization
It will conflict with SSA-based RA and needs to be rewritten to happen
late.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
4d79f6ca76 agx: Use extract helper for tex internally
Allows better optimization.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
4f78141c77 agx: Emit splits for intrinsics
This allows optimizing the extracts.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
d06394095b agx: Optimize p_split(kill) specially
Let's make sure these are allocated optimally.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
e16ad8f443 agx: Lower p_split after RA
Using existing regalloc infrastructure.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
4fc023ed42 agx: Use a transfer graph for parallel copies
Lifted from ir3. Algorithm is the same; the data structures and interface are
lightly modified to decouple from ir3's IR.

Sequentializing parallel copies after RA is tricky. ir3's implementation works
well enough, so I use that one.

Original implementation by Connor Abbott.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
330ec4260d agx: Add helper to emit splits
This should be used for vector destinations, to facilitate the extraction
optimization.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
b30c718a57 agx: Add helper to emit combines
...in such a way that subsequent extracts will be optimized.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
5bc65ef963 agx: Add a hash table for vector extracts
This will allow us to introduce splits gradually, giving a graceful fallback.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
d285c63417 agx: Add phi pseudo instruction
For SSA.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
2a4a8a8902 agx: Add p_split pseudoinstruction
Easier on RA for extracts.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
bb1fb0a9db agx: Dynamically allocate agx_instr->src
Required for phi nodes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
d39b1c3426 agx: Implement simple copyprop
Cleans up some of the mess.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
7d38bcb7ee agx: Use pseudo ops for mov/not/and/xor/or
Rather than using builder magic (implicitly lowered on emit), add actual pseudo
operations (explicitly lowered before encoding). In theory this is slower, I
doubt it matters. This makes the instruction aliases first-class for IR prining
and machine inspection, which will make optimization passes easier to write.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
3d8c2f2693 agx: Add unit test infrastructure
Lifted from Bifrost. Add some basic optimizer tests (they pass!) to show the
compiler is ready to be unit tested. Given we can't have hardware CI for Asahi
yet -- and dEQP is still pretty janky -- unit testing should prove quite useful.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
43c701424b agx: Wrap compiler header in extern "C"
So we can use it from GTest.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
f0a973081f agx: Use correct types for some IR enums
Otherwise there are implicit int->enum casts which prevent us from building as
C++ (with -fpermissive).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
b87ce10210 agx: Match order for designated initializers
Required to compile our headers with C++, to allow us to use GTest unit tests.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
ff660dd637 agx: Track write registers more accurately
We may not write a full 32-bit vec4, don't be so pessimistic.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
0c82b5c99c agx: Note that RA proceeds in dominance-order
This is an important invariant for SSA-based RA to work.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
81477f3809 agx: Implement some shader-db stats
Instructions, bytes, and registers -- this should hold us over until we
can reverse the underlying uarch and get proper cycle estimations.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
31b3f56813 asahi: Workaround broken GLSL compiler
https://gitlab.freedesktop.org/mesa/mesa/-/issues/6075 still hasn't been
fixed (despite the bug being known for a year now..)

Workaround the brokenness.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
2022-05-01 21:56:21 -04:00
Rob Clark
69edfcaa20 freedreno/drm: Fix bos_on_stack calculation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16263>
2022-05-01 15:53:10 +00:00
Konstantin Seurer
53fe6f1084 radv: Use the entire morton code as sort key
Fixes: be57b08 <"radv: Build accaleration structures using LBVH">
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16264>
2022-04-30 22:11:06 +00:00
Konstantin Seurer
6ba55b4033 radv/radix_sort: Make variable names consistent
We usually use pdevice for "physical device" and not "device pointer".

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16259>
2022-04-30 16:05:42 +02:00
Konstantin Seurer
f1eb1bd10a radv/radix_sort: Add missing entry points
Fixes: 5d9ef0e ("radv: Add the fuchsia radix sort")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16259>
2022-04-30 16:04:22 +02:00
Yiwei Zhang
2f8123abab venus: enable ANB shared presentable image prop
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15868>
2022-04-30 04:25:44 +00:00
Yiwei Zhang
2df0aa185e venus: update vn_GetSwapchainGrallocUsage2ANDROID for shared present
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15868>
2022-04-30 04:25:44 +00:00
Yiwei Zhang
d6b4f746b0 venus: cache front_rendering_usage bit at gralloc init
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15868>
2022-04-30 04:25:44 +00:00
Yiwei Zhang
52ad0368cd venus: refactor android gralloc pieces
There's no functional change.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15868>
2022-04-30 04:25:44 +00:00
Francisco Jerez
14cad38b19 intel/dev: Compute pixel pipe information based on geometry topology DRM query.
This changes the intel_device_info calculation to call an additional
DRM query requesting the geometry topology from the kernel, which may
differ from the result of the current topology query on XeHP+
platforms with compute-only and 3D-only DSSes.  This seems more
reliable than the current guesswork done in intel_device_info.c trying
to figure out which DSSes are available for the render CS.

Cc: 22.1 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143>
2022-04-30 00:00:58 +00:00
Emma Anholt
bf02bffe15 nouveau: Enable the NIR backend by default.
The glsl-to-tgsi code generation and GLSL IR linker is is going away
(!8044), so we need to make the call on whether to use nir-to-tgsi (See
!15932 and !15541), or switch over to the NIR code generator.  The NIR
backend should reduce the compile time regression while providing more
direct control over the IR we receive than going through NTT, while still
providing the optimization that NIR-to-TGSI was bringing us.

nv92 shader-db:
total local in shared programs: 2048 -> 1988 (-2.93%)
local in affected programs: 2048 -> 1988 (-2.93%)
total gpr in shared programs: 688468 -> 724705 (5.26%)
gpr in affected programs: 437159 -> 473396 (8.29%)
total instructions in shared programs: 6115978 -> 5874401 (-3.95%)
instructions in affected programs: 5038041 -> 4796464 (-4.80%)
total loops in shared programs: 1361 -> 835 (-38.65%)
loops in affected programs: 538 -> 12 (-97.77%)
total bytes in shared programs: 42389752 -> 40480416 (-4.50%)
bytes in affected programs: 36311616 -> 34402280 (-5.26%)
LOST:   0
GAINED: 1 (pixmark-piano)

nv120 shader-db:
total local in shared programs: 4416 -> 1988 (-54.98%)
local in affected programs: 4416 -> 1988 (-54.98%)
total gpr in shared programs: 870534 -> 893490 (2.64%)
gpr in affected programs: 564210 -> 587166 (4.07%)
total instructions in shared programs: 6379402 -> 6243210 (-2.13%)
instructions in affected programs: 5430790 -> 5294598 (-2.51%)
total bytes in shared programs: 68184224 -> 66729672 (-2.13%)
bytes in affected programs: 58013544 -> 56558992 (-2.51%)

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15949>
2022-04-29 23:07:03 +00:00
Emma Anholt
16ead7132f nouveau/nir: Put the UBO offset indirect into the address reg.
Fixes indirect UBO addressing pre-nvc0.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15949>
2022-04-29 23:07:03 +00:00
Karol Herbst
d1ff453a0d nv50/nir: align tlsspace to 0x10
nvc0 aligns to 0x10 in setting up its rogram header, but nv50 TLS
allocation expects the incoming value to be aligned already (like TGSI
always did).  Avoids regression in
KHR-GL33.shaders.arrays.declaration.dynamic_expression_array_access_* with
the nir backend.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15949>
2022-04-29 23:07:03 +00:00
Emma Anholt
c228cb3889 nouveau/nir: Add support for pre-GF100 images and ssbos.
We have to allocate them slots in the global file.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15949>
2022-04-29 23:07:03 +00:00
Emma Anholt
75f0127d78 ci/nouveau: Add MESA_GLES_VERSION_OVERRIDE=3.1 baseline state.
imirkin requested that I test the GLES31 codepaths on nv50, and this is
the best I can do with the hardware I have.

Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15949>
2022-04-29 23:07:03 +00:00
Emma Anholt
3ddc505400 nouveau/nir: Move FS output stores to the end of the last block.
The nir_move/sink caused instructions to sink interleaved into the output
stores at the end of the shader.  nouveau's RA doesn't track liveness of
FS outputs in registers after the export instruction, so they could end up
overwritten.  To work around it, after normal NIR move/sink, move the
output stores back to the end of the shader.

Fixes: b1fa2068b8 ("nouveau/nir: Enable nir_opt_move/sink.")

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15949>
2022-04-29 23:07:03 +00:00
Chia-I Wu
53d87865ca turnip: fix drm modifier support with planar formats
We need to advertise the results of tu6_plane_count and handle
VK_IMAGE_ASPECT_MEMORY_PLANE_*_BIT.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6374
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16169>
2022-04-29 22:30:45 +00:00
Erik Faye-Lund
ba9c917149 mesa: add missing error-path
The ARB_shader_objects spec says the following:

> The error INVALID_VALUE is generated by any command that takes one or
> more handles as input, and one or more of these handles are not an
> object handle generated by OpenGL.

And a long, long time ago, we used do to just that for
glDeleteObjectARB... Until 9ac9605de1, all the way back in February 2006,
where the error condition was removed without explanation.

Let's restore it, because it should really be there.

This was noticed by running the tests that are in the mesa-demos
repository, that actually tested this condition.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16211>
2022-04-29 19:57:58 +00:00
Erik Faye-Lund
82b681db99 gallium/xlib: fix stale comment
We haven't been doing what the comment says for about a decade, it's
about time to update the comment!

Fixes: 5f60a00743 ("st/glx: remove STENCIL_BITS, DEFAULT_SOFTWARE_DEPTH_BITS")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16213>
2022-04-29 19:30:03 +00:00
Erik Faye-Lund
202cab3d30 meson: deprecate specifying osmesa-bits
This option has no meaningful effect any more other than pointlessly
renaming the the library. Let's introduce a new default value called
"unspecified", and complain if it's set to anything else.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16213>
2022-04-29 19:30:03 +00:00
Erik Faye-Lund
36250e839b meson: remove unused defines
These defines are no longer used since we removed libmesa_classic.

Fixes: e030d5ba8a ("mesa: Delete libmesa_classic")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16213>
2022-04-29 19:30:03 +00:00
Jordan Justen
33456ae5a4 iris: Fix assertion meant to only target the clear-color stride
Fixes: 2bc8c61fd0 ("iris: Return a 64B stride for clear color plane")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6398
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16241>
2022-04-29 09:34:56 -07:00
Jesse Natalie
ab9d649ac3 microsoft/compiler: Unload DXIL validator library *after* calling Release()
Otherwise, the code to actually run Release() might not be loaded or
callable anymore.

Fixes: 193cf76c ("microsoft/compiler: add common dxil-validator API")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16225>
2022-04-29 16:16:22 +00:00
Daniel Schürmann
12d7f911c9 aco/optimizer: prevent any overflow between SGPR and const offset on MUBUF
Apparently, if the SGPR offset + const offset overflows,
it doesn't work.

Totals from 145 (0.11% of 134913) affected shaders: (GFX10.3)
SpillSGPRs: 134 -> 104 (-22.39%)
CodeSize: 1632676 -> 1645916 (+0.81%); split: -0.03%, +0.84%
Instrs: 316920 -> 320252 (+1.05%); split: -0.01%, +1.07%
Latency: 1456285 -> 1459686 (+0.23%); split: -0.02%, +0.25%
InvThroughput: 165785 -> 166086 (+0.18%); split: -0.02%, +0.20%
VClause: 6815 -> 6875 (+0.88%); split: -0.03%, +0.91%
SClause: 19089 -> 19079 (-0.05%); split: -0.06%, +0.01%
PreSGPRs: 7302 -> 7304 (+0.03%); split: -0.01%, +0.04%

Fixes: KHR-GL45.shader_storage_buffer_object.basic-operations-case1-cs
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15866>
2022-04-29 15:57:57 +00:00
Daniel Schürmann
d5dc0c0392 aco: adjust num_waves for LDS before scheduling
Totals from 67 (0.05% of 134913) affected shaders: (GFX10.3)
VGPRs: 2024 -> 2136 (+5.53%); split: -0.40%, +5.93%
CodeSize: 162364 -> 162348 (-0.01%); split: -0.08%, +0.07%
MaxWaves: 1882 -> 1816 (-3.51%); split: +0.11%, -3.61%
Instrs: 29176 -> 29162 (-0.05%); split: -0.09%, +0.04%
Latency: 329984 -> 327272 (-0.82%); split: -0.88%, +0.06%
InvThroughput: 54653 -> 54672 (+0.03%); split: -0.01%, +0.04%
VClause: 782 -> 761 (-2.69%); split: -2.81%, +0.13%
SClause: 833 -> 824 (-1.08%); split: -2.28%, +1.20%
Copies: 1872 -> 1873 (+0.05%); split: -0.37%, +0.43%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16039>
2022-04-29 15:39:10 +00:00