Commit graph

163458 commits

Author SHA1 Message Date
Erik Faye-Lund
0685e330dd radeonsi: mark glx-multithread-texture as a flake
This has apparently been flaking for a while, so let's mark it as such.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7772
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20004>
2022-11-25 16:52:50 +00:00
Matt Coster
20747fabba pvr: debug: Add PPP sub-buffer support to CSB dumps.
This patch also includes the infrastructure for dumping sub-buffers in
print_sub_buffer() and new field types for floating and fixed point
decimals.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster
97e54d69a9 pvr: csbgen: Remove TEXTURE_WRAP_VARYING-dependent fields
This patch removes all fields dependent on the TEXTURE_WRAP_VARYING,
feature which is not currently supported.

It also removes STATE_PPP_CTRL.trp which is conditional on another
unused feature.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster
01f9601b02 pvr: debug: Add option to track pvr_bo allocations
This functionality should only need to be enabled when required by
other debug options.

While not used directly in this commit, it lays the groundwork for
dumping information from buffers referenced by other buffers.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster
f9a234ef04 pvr: debug: Add "cs" debug option to dump control stream on job submit
With PVR_DEBUG=cs, the control stream will be dumped to stderr
immediately prior to every render or compute job submission.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster
0432015265 pvr: debug: Add documentation for PVR_DEBUG environment variable
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster
e6b752ff62 pvr: Add pvr_bo_cpu_map_unchanged() helper to load saved vbits on map
When HAVE_VALGRIND is set, vbits of the CPU mapping are stored when
pvr_bo_cpu_unmap() is called. They can be reloaded by calling
pvr_bo_cpu_map_unchanged() instead of pvr_bo_cpu_map(). The vbits are
not loaded by default on every map, since they could easily have been
changed by the device between the unmap/map calls. Only use
pvr_bo_cpu_map_unchanged() when you can safely assume that nothing has
changed in the underlying memory.

When HAVE_VALGRIND is not set, pvr_bo_cpu_map_unchanged() just inlines
to pvr_bo_cpu_map().

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster
d51d79b450 pvr: csbgen: Generate enum-to-string functions for debugging
All enums should be unambiguous, so an error is raised when multiple
enum variants with the same value are encountered. When no enum
variants match the provided value, NULL is returned. This allows the
to-string functions to double as validators.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Matt Coster
f36c938c94 pvr: util: Add integer digit counting functions
These are (reasonably) fast helpers for computing the number of binary,
decimal or hexadecimal digits required to represent a given non-negative
integer.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18948>
2022-11-25 16:42:55 +00:00
Samuel Pitoiset
ccac91db7b radv: make sure to mark DCC as compressed on GFX11
The bit has moved to FDCC_ENABLE on GFX11.
Found by inspection.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20005>
2022-11-25 15:22:18 +00:00
Rhys Perry
9b19a93319 ac/nir: combine shift translation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19966>
2022-11-25 14:40:22 +00:00
Rhys Perry
064336d359 ac/nir: mask shift operands
NIR shifts are defined to truncate the shift amount to the number of bits
needed to represent the bit-size of the value shifted. LLVM treats large
shifts as poison. This fix achieves NIR semantics for shifts.

As an example, a|(b << 32), where "a" is 32bits, should produce a|b
according to NIR (because 32&31 == 0).

This caused LLVM to incorrectly optimize "(a >> c) | (b << (32 - c))" to a
u2u32(pack_64_2x32(a, b) >> c) (v_alignbit_b32), when the original NIR
should have returned "a | b" if c==0.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19966>
2022-11-25 14:40:22 +00:00
Gert Wollny
d5217b024e virgl: Fix injection of double from const mov instruction
We only copy two components, we have to use the complete original source,
and we should rewrite the new source from scratch to avoid incorrect
dimension and indirect handling.

Fixes: 036d7172c (virgl: Move double operands to a temp to avoid double-swizzling bugs)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19975>
2022-11-25 11:54:18 +00:00
Samuel Pitoiset
762e5cccb5 radv: remove useless parenthesis in radv_cmd_buffer_flush_dynamic_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19843>
2022-11-25 10:51:06 +00:00
Samuel Pitoiset
e9b3a6b81f radv: simplify handling logic op when it's not dynamic
The command buffer already emits ROP3_COPY if the logic op is disabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19843>
2022-11-25 10:51:06 +00:00
Samuel Pitoiset
470fbb35ef radv: fix and rework DISABLE_DUAL_QUAD setting
This bit can be enabled with various combinations and it looks better
to only emit it from the cmdbuf.

Fixes: 17b9aa92b7 ("radv: add support for dynamic logic op enable")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19843>
2022-11-25 10:51:06 +00:00
Samuel Pitoiset
0a327f9c7a radv: re-emit dynamic provoking vertex mode if primitive topology changed
The vertex shader depends on the primitive topology.

Fixes: 2cce8500de ("radv: add support for dynamic provoking vertex mode with NGG")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19843>
2022-11-25 10:51:06 +00:00
Samuel Pitoiset
de4de09a56 radv: re-emit dynamic depth clamp enable if depth clip enable changed
The depth clamp mode depends on depth clip enable/disable.

Fixes: e48c0fbd8f ("radv: add support for dynamic depth clamp enable")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19843>
2022-11-25 10:51:06 +00:00
Lionel Landwerlin
bbbc8e7ce7 anv: use the anv_state_pool address helper more
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19983>
2022-11-25 10:29:56 +00:00
Iago Toral Quiroga
08d34ca582 v3dv: allocate copy query pipelines lazily
Instead of creating all 8 pipeline combinations when we initialize
the device we create the pipelines when we need to use them. This
is probably better because applications are likely to always use
the same flags for the copy command, which means that only one
pipeline may be required.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19981>
2022-11-25 09:30:49 +00:00
Samuel Pitoiset
edc830be34 radv: fix memleak with link time optimizations and GPL
Do not clone the NIR when the driver retains NIR shaders because it
exits early, otherwise stage->nir will never be freed.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7768
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19973>
2022-11-25 08:46:38 +00:00
Erik Faye-Lund
16fd8b8324 docs/zink: update query requirements
These features are no longer required.

Reviewed-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19750>
2022-11-25 06:50:59 +00:00
Erik Faye-Lund
00a88f48fd mesa: do not require optional queries
The OpenGL specifications explicitly calls out these queries as allowing
zero bits, so these features aren't actually required to bump the OpenGL
version.

While we could in theory also enable the corresponding extensions
unconditionally, this risks breaking applications that assume that the
presence of the extensions are sufficient to use meaningfully use them,
like is the case with most other OpenGL extensions.

However, blocking more recent GL versions due to this seems like a bit
of an overreaction. So let's allow new OpenGL versions, but not the
extensions themselves.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Soroush Kashani <soroush.kashani@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19750>
2022-11-25 06:50:59 +00:00
Erik Faye-Lund
2906c468c1 mesa: support dummy queries for ARB_pipeline_statistics_query
Similar to ARB_occlusion_query / ARB_occlusion_query2, this extension
allows zero bits for the queries, meaning there's no actual hardware
requirements here.

So let's just report zero bits if the driver doesn't support the CAP,
and treat these queries as dummies like we already do for occlusion
queries.

We still don't expose the extension, this is just to make it possible to
allow the core OpenGL functionality without exposing the extension.

Reviewed-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19750>
2022-11-25 06:50:59 +00:00
Erik Faye-Lund
1b1e8873fe mesa: treat unsupported queries as dummies
It's legal in OpenGL to start a query even if the result will have zero
valid bits. It's not enough to just report zero bits, We need to also
prevent calling down into the driver with these invalid queries.

Because ARB_ES3_compatibility adds ANY_SAMPLES_PASSED and
ANY_SAMPLES_PASSED_CONSERVATIVE to the set of queries that support zero
bits, we also need to check for the corresponding indices.

Fixes: 0186e9e1c5 ("mesa: always support occlusion queries")
Reviewed-by: Soroush Kashani <soroush.kashani@imgtec.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19750>
2022-11-25 06:50:58 +00:00
Marek Olšák
c70eec86ef st/vdpau: fix interop with GL
Fixes: e00bb6cb98 - mesa/st: use tracked samplerview swizzle values
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7751

Tested-By: Veerabadhran.Gopalakrishnan@amd.com
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19961>
2022-11-24 19:47:49 -05:00
Alyssa Rosenzweig
4b19725ee5 panfrost: Revert "Require 64-byte alignment on imports"
This reverts commit 811f8a1946. As Alpine put it
-- this is causing more problems than it's fixing. Hotfix to revert the
offending commit until a more measured fix can be implemented.

Closes: #7731
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reported-by: Jan Palus
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19993>
2022-11-24 23:46:55 +00:00
Alyssa Rosenzweig
9f136fea8c agx: Use default SHAREABLE_SHADERS
No need to set this explicitly, u_default does it for us.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19971>
2022-11-24 23:37:48 +00:00
Alyssa Rosenzweig
6de5bd5f41 agx: Fix signedness issues packing
UBSan complains otherwise:

../src/asahi/compiler/agx_pack.c:701:21: runtime error: left shift of 1 by 31 places cannot be represented in type 'int'
../src/asahi/compiler/agx_pack.c:534:18: runtime error: left shift of 8 by 28 places cannot be represented in type 'int'

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19971>
2022-11-24 23:37:48 +00:00
Alyssa Rosenzweig
d608ca0363 agx: Handle vertex shaders that use <= 8 halfregs
r5 and r6 are always getting lowered. Will prevent a regression with VBO
lowering on a shader which has stride=0 and hence gets the vertex ID read
optimized out with NIR:

   dEQP-GLES2.functional.draw.random.50

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19971>
2022-11-24 23:37:48 +00:00
Alyssa Rosenzweig
94124925ca agx: Try to align sources of pack_64_2x32_split
Helps with coalescing the pack.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19971>
2022-11-24 23:37:48 +00:00
Alyssa Rosenzweig
442e29890d agx: Implement nir_op_pack_64_2x32_split
This maps to a collect where the dest size is 64 and the src size is 32.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19971>
2022-11-24 23:37:48 +00:00
Alyssa Rosenzweig
68e25f33da asahi: Allocate smaller scissor/zbias arrays
Don't waste 1MB per batch for descriptors that may be completely unused.
Instead, upload the scissor and depth bias arrays at submit time. This is a
simple solution to a silly problem: we can't grow the scissor/depth bias arrays,
and we don't know how big they will be at draw time. We could...

1. Statically allocate large buffers? Waste lots of memory.
2. Statically allocate small buffers? Forces too much flushing.
3. Dynamically allocate a growable GPU buffer? Requires either reading
   back write-combined memory contents, or maintaining a CPU copy in
   addition to extra GPU copies, or doing complicated MMU shenanigans.
   The first two options are slow and the last is complicated.

Instead, we upload these descriptors to a dynamically allocated CPU-side which
gets copied just once to the GPU at submit-time when the exact size is known,
minimizing wasted memory and copies and avoiding any unnecessary flushing or WC
memory reads.

In addition, this patch makes sure we flush if we would overflow with more than
65535 scissor descriptors in a batch. This is a (minor) bug fix.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19971>
2022-11-24 23:37:48 +00:00
Alyssa Rosenzweig
2baaff9cac asahi: Allocate/free batch BOs as needed
Rather than hanging onto them across batches. This lets us free these BOs if the
number of batches shrinks, which is pretty common if all 32 batches are used
during a loading screen for glGenerateMipmap() and then the in-game portion
drops to 1 or 2 batches only. Now that we have the BO cache wired up, this
should not adversely affect performance.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19971>
2022-11-24 23:37:48 +00:00
Alyssa Rosenzweig
04360a270e asahi: Copy panfrost's bo cache
Massive performance gains, some fps before/after numbers from glmark2:

   [shading] 1486 -> 2391
   [refract] 87   -> 127
   [terrain] 32   -> 56

...and it's basically for free with enough copy/paste, so thank you to Boris
Brezillon for an excellent Asahi patch, the LRU cache seems to work great on M1
:-p

There are a few minor changes I made from panfrost, notably adjusting the
constants to account for 16KiB pages and switching from pthread_mutex to
simple_mtx to be less weird in Mesa.

For context on the design, the following commits evolved it in Panfrost and
their commit messages may be useful... The logic in this module is the product
of years of mistakes and correcting course :-)

   f06809cdca ("panfrost: Evict the BO cache when allocation fails")
   77d0498913 ("panfrost: Fix major flaw in BO cache")
   ee82f9f07e ("panfrost: Try to evict unused BOs from the cache")
   2225383af8 ("panfrost: Make sure the BO is 'ready' when picked from the cache")
   9af4aeaaf7 ("panfrost: Don't return imported/exported BOs to the cache")

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19971>
2022-11-24 23:37:48 +00:00
Alyssa Rosenzweig
7c8e3963bd asahi: Stop aligning pool allocations to 4KiB
This defeats the point of specifying alignments and of packing allocations
together with the BO cache. We're a real driver now, let's allocate memory like
one.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19971>
2022-11-24 23:37:48 +00:00
Alyssa Rosenzweig
860f5d77c6 asahi: Label BOs internally
This will help debugging memory usage problems.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19971>
2022-11-24 23:37:48 +00:00
David Heidelberg
4a8134975e ci/alpine: bump to 3.17, new GCC 12 and LLVM 15
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19959>
2022-11-24 22:36:03 +01:00
David Heidelberg
629e940b2c ci/alpine: enable Mold linker
Alpine has Mold 1.7.1 in the repository.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19959>
2022-11-24 22:36:03 +01:00
Martin Roukala (né Peres)
c85d09bcdd radv/ci: do not create jobs that will fail outside of mesa's namespace
Mirror what is done for the freedreno project and do not allow manual
execution of jobs that require restricted access to a CI farm.

This fixes pushing new branches with non-radv-related changes.

Fixes: #7773
Reported-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19984>
2022-11-24 18:06:47 +00:00
Italo Nicola
4b63667f31 hud: add GALLIUM_HUD_ROTATION option
The user can use GALLIUM_HUD_ROTATION={0,90,180,270} to rotate the hud
by the specified amount.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19854>
2022-11-24 17:13:46 +00:00
Timur Kristóf
8ec6cb06e3 ac/nir: Avoid data race with task shader payloads.
Device memory scope is necessary because we need to ensure there is
always a waitcnt_vscnt instruction in order to avoid a race condition
between payload stores and their loads after mesh shaders launch.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19967>
2022-11-24 13:18:37 +00:00
Erik Faye-Lund
a2a0ac21e4 docs/zink: add missing required device-feature
Seems I forgot to add this to the list of required features.

Fixes: eb0195358c ("zink: only inspect dual-src limit if feature enabled")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19779>
2022-11-24 12:57:46 +00:00
Erik Faye-Lund
13bccac5a7 zink: update textureCompressionBC requirement
The mesa state-tracker can now emulate all formats indicated by this
feature-flag, so we don't require this for OpenGL 4.2 any more.

It's however a good idea to support for power-usage and performance
reasons, saving on memory bandwidth. So let's move it to the
gl46_optimal block instead.

Fixes: e4ff42684b ("mesa/st: enable bptc extension with fallback")
Fixes: 2ea481b2f0 ("Zink: add Zink profiles file")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19779>
2022-11-24 12:57:46 +00:00
Erik Faye-Lund
754353c417 zink: fix incorrect requirements
These were in the wrong list all along.

Fixes: a466c2a783 ("zink: check for stores and atomics features")
Fixes: 2644835f03 ("zink: add missing required feature")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19779>
2022-11-24 12:57:46 +00:00
Erik Faye-Lund
b60bc52992 zink: remove needless requirements
We never required the uniform texel buffer bit for more than
bufferFeatures for a bunch of these formats.

Similarly, we *don't* need the uniform texel buffer bit for sampled
image access.

For the image-dimensions, the Mesa frontend doesn't validate the max 1D,
3D or Cube sizes, nor the max texture layers. So we'll expose GL 4.1
without these, even if that's not conformant.

Finally, we don't require robustImageAccess2 for OpenGL 4.3 at all. All
we need is the robustBufferAccess feature.

Fixes: 2ea481b2f0 ("Zink: add Zink profiles file")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19779>
2022-11-24 12:57:46 +00:00
Erik Faye-Lund
b707cf24a3 zink: fix json-errors in profile-file
There's some stray commas here, let's get rid of them.

Fixes: 2ea481b2f0 ("Zink: add Zink profiles file")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19779>
2022-11-24 12:57:46 +00:00
Iago Toral Quiroga
f71944ae0e v3dv: specialize query copy pipelines
Instead of having one shader that checks the various flags and emits
conditional code, create specialized pipelines for each relevant
combination of flags values so we can produce more optimized
pipelines with less conditional code for each scenario.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19770>
2022-11-24 12:21:59 +00:00
Iago Toral Quiroga
ae4351e939 v3dv: allocate one BO for both occlusion results and availability
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19770>
2022-11-24 12:21:59 +00:00
Iago Toral Quiroga
7a65b3f006 v3dv: reimplement occlusion queries
Our implementation was mostly CPU-based, with things such as query
resets and result copying handled in the CPU, as well as some aspects
of query availability tracking.

This new implementation handles all GPU-side query functions by
dispatching compute shaders to push the work to the GPU. This
involves query availability, reset and result copying.

For now, only occlusion queries are managed this way. Performance
queries can also be implemented in a similar fashion in the future
with some additional work, however, for timestamp queries our only
option to improve this would be to execute the actual timestamp in the
kernel, since we can't take a timestamp from a shader.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19770>
2022-11-24 12:21:59 +00:00