Commit graph

1130 commits

Author SHA1 Message Date
Anuj Phogat
c1f3a778de intel: Rename GENx prefix in macros to GFXx in source files
Commands used to do the changes:
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "GEN" -rIl src/intel/genxml | grep -E ".*py" |  xargs sed -ie "s/GEN\([%{]\)/GFX\1/g"
grep -E "[^_]GEN[[:digit:]]+" -rIl $SEARCH_PATH | grep -E ".*(\.c|\.h|\.y|\.l)" | xargs sed -ie "s/\([^_]\)GEN\([[:digit:]]\+\)/\1GFX\2/g"

Leave out renaming GFX12_CCS_E macros. They fall under renaming pattern like "_GEN[[:digit:]]+":
grep -E "GFX12_CCS_E" -rIl $SEARCH_PATH | xargs sed -ie "s/GFX12_CCS_E/GEN12_CCS_E/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
2021-04-02 18:33:07 +00:00
Anuj Phogat
9da8a55b08 intel: Rename GEN_GEN macro to GFX_VER
Commands used to do the changes:
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "GEN_GEN" -rIl $SEARCH_PATH | xargs sed -ie "s/GEN_GEN/GFX_VER/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
2021-04-02 18:33:06 +00:00
Anuj Phogat
295bb3c263 intel: Rename GEN_VERSIONx10 macro to GFX_VERx10
Commands used to do the changes:
export SEARCH_PATH="src/intel src/gallium/drivers/iris src/mesa/drivers/dri/i965"
grep -E "GEN_VERSION" -rIl $SEARCH_PATH | xargs sed -ie "s/GEN_VERSION/GFX_VER/g"

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9936>
2021-04-02 18:33:06 +00:00
Samuel Pitoiset
50b5a9a4a0 anv: use common entrypoints for VK_KHR_create_renderpass2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9601>
2021-03-24 11:21:53 +00:00
Lionel Landwerlin
33bc2977e5 intel/mi_builder: use device info to use the right CS prefetch size
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9679>
2021-03-18 20:08:45 +00:00
Anuj Phogat
1d0295ea2c intel: Simplify version checks involving haswell
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9608>
2021-03-16 16:40:12 +00:00
Anuj Phogat
97d6ceaf04 intel: Remove GEN_IS_HASWELL macro
Use GEN_VERSIONx10 == 75 check in place of GEN_IS_HASWELL macro.
GEN_GEN and GEN_VERSIONx10 macros provide a consistent way to do platform
version checks. We can avoid platform specific macros.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9608>
2021-03-16 16:40:12 +00:00
Lionel Landwerlin
8e36f7da85 anv: move L3 initialization to device init on Gen11+
On Gen11+ we tend to only use a single configuration, so just get rid
of the stalls in the command buffers by moving the config to device
initialization.

v2: drop NULL config check

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9534>
2021-03-12 20:49:01 +00:00
Lionel Landwerlin
581e68bc99 anv: move L3 config emission to genX_state.c
We're about to reuse this at device initialization.

v2: Handle NULL configs on Gen12+

v3: Handle NULL config in emission helper (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9534>
2021-03-12 20:49:01 +00:00
Jason Ekstrand
5b792d79a4 anv: Add an anv_batch_write_reg macro
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9537>
2021-03-12 04:17:39 +00:00
Jason Ekstrand
5f192b190f anv,genxml: Handle L3SQCREG1_SQGHPCI in GenXML
Technically, this is only one field on IVB but it's two on BYT and so it
makes things easier if we split it for all Gen7.

While we're here, make some of the other fields in L3SQCREG1 Booleans.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9537>
2021-03-12 04:17:39 +00:00
Anuj Phogat
96e251bde7 intel: Rename "GEN_" prefix used in common code to "INTEL_"
This patch renames all macros with "GEN_" prefix defined in
common code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
65d7f52098 intel: Fix broken alignment due to gen_ prefix renaming
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
692472a376 intel: Rename "gen_" prefix used in common code to "intel_"
This patch renames functions, structures, enums etc. with "gen_"
prefix defined in common code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
733b0ee8cb intel: Rename files with gen_ prefix in common code to intel_
Changes in this patch include:
- Rename all files in src/intel/common path
- Update the filenames used in source and build files

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Jason Ekstrand
4fb6c051c9 anv: Move vk_format helpers to common code
The Android ones we put in anv_android.c.  Maybe one day we'll want a
vk_android.h to put some common Android stuff but, for now, let's keep
it contained to ANV's android code.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8857>
2021-03-10 18:17:31 +00:00
Chad Versace
d978383966 anv/image: Make memory layout more explicit
Future patches for VK_EXT_image_drm_format_modifier will, in some cases,
place the aux surface and fast clear state into a driver-private bo.
This increases the complexity of image memory layout to such a degree
that, to maintain sanity, we must improve how we track the layout.

Define new types:
  - anv_image_memory_range
  - anv_image_memory_binding
  - anv_image_binding

Delete many fields in anv_image (and its children), and replace them
with the new types.

This patch does not change how anv_image tracks (or, rather, does not
track) the memory of gen12 implicit ccs. We should probably do that, but
that's left as a future exercise.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
bb7d627865 anv/image: Add anv_image_address()
It calculates the address to a surface or to metadata in the image.

Refactor only. No intended change in behavior.

This patch prepares for, and reduces much noise in, the upcoming patch
that rewrites image memory tracking.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
ffc08351e1 anv: Add anv_surface_is_valid()
Current code checks for surface validity with `surface.isl.size_B > 0`.
Replace the checks with anv_surface_is_valid().

This prepares for adding new members to anv_surface that may
be accidentally used as a validity-indicator.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
5065faca00 anv/image: Rename anv_image_plane::surface -> primary_surface
This disambiguates code that accesses `image->planes[*].surface`.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Jason Ekstrand
8525ebe6e3 intel/mi_builder: Return an address from __gen_get_batch_address
While we're here, add __gen_get_batch_address declarations to more files
because we're about to start requiring it on all GFX 12.5+.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:47:19 -06:00
Lionel Landwerlin
8955d179d3 anv: fix MI_PREDICATE_RESULT write
This register is only 32bits.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1952fd8d2c ("anv: Implement VK_EXT_conditional_rendering for gen 7.5+")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9428>
2021-03-05 16:19:20 +00:00
Jason Ekstrand
1e53e0d2c7 intel/mi_builder: Drop the gen_ prefix
mi_ is already a unique prefix in Mesa so the gen_ isn't really gaining
us anything except extra characters.  It's possible that MI_ may
conflict a tiny bit with GenXML but it doesn't seem to be a problem
today and we can deal with that in the future if it's ever an issue.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9393>
2021-03-04 15:14:27 +00:00
Jason Ekstrand
6d522538b6 intel: Rename gen_mi_builder.h to mi_builder.h
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9393>
2021-03-04 15:14:27 +00:00
Jordan Justen
36dd7c44f6 intel: Use GEN_VERSIONx10 in more places
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9329>
2021-03-01 22:00:08 -08:00
Mike Blumenkrantz
025b57524f anv: for_each_bit -> foreach_bit
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9191>
2021-02-24 17:11:44 +00:00
Lionel Landwerlin
207ee2b6a9 isl: add external parameter to isl_mocs()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9127>
2021-02-18 11:20:59 +02:00
Mark Janes
cec1a9bbb9 anv: add hooks to call INTEL_MEASURE
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7354>
2021-02-01 17:24:57 -08:00
Mark Janes
c5f3eb1961 anv: enable timestamp for INTEL_MEASURE
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7354>
2021-02-01 17:24:57 -08:00
Jason Ekstrand
c41eaf0add anv: Use vk_object_base::type for debug_report
This is way better than the giant macro thing we had before.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8676>
2021-02-01 18:54:25 +00:00
Jason Ekstrand
dc8d74a555 anv: Drop anv_dump
I originally wrote this several years ago to aid in app debugging.  Now
that we have nice tools like RenderDoc, it's no longer needed.  I don't
think anyone's really used it in 4 years or more.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8667>
2021-01-28 18:26:32 +00:00
Sagar Ghuge
001722b3a3 anv: Skip CCS ambiguate which preceed fast-clears
We can skip CCS ambiguate if followed by a fast clear within render
pass.

v2: (Jason)
- Check array layer as well since we only fast clear first layer and
  first LOD.
- Don't drop fast clear check while doing resolve operation.

Fixes: d5849bc840 "anv: Skip HiZ and CCS ambiguates which preceed fast-clears"
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6988>
2021-01-26 00:08:59 +00:00
Sagar Ghuge
dab229ef69 anv: Invalidate the correct AUX-TT entry
While invalidating the AUX-TT entries, we have to consider the surface
offset as well otherwise, we will end up invalidating another surface's
CCS portion.

For eg. when we have HiZ+CCS and STC_CCS enabled, both will use the CCS
portion allocated at the end of BO. While invalidating the CCS portion
of stencil buffer, we will end up invalidating the CCS portion that
belongs to the depth main surface and vice-versa, if the surface offset
is not considered.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4123
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Acked-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8677>
2021-01-25 22:37:39 +00:00
Lionel Landwerlin
65f7b93435 intel: silence unused var warnings in release builds
v2: Use ASSERTED

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4162
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8681>
2021-01-25 09:04:32 +00:00
Jason Ekstrand
0e1447eb1b anv: Early-exit from cmd_buffer_flush_state
If we don't have any dynamic state, pipeline, or descriptor changes,
we can do a very quick early-exit instead of checking for a bunch of
stuff bit-by-bit.

Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8594>
2021-01-22 17:21:11 +00:00
Jason Ekstrand
18fc1dfea3 anv: Only flush descriptors used by the pipeline
Previously, if we had a pipeline transition from something which used,
say, tessellation to something which didn't and we ended up with
tessellation descriptors dirty, we could end up re-emitting far more
than necessary.  With this commit, we mask off unused stages so we only
update when necessary.

Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8594>
2021-01-22 17:21:11 +00:00
Jason Ekstrand
72c7a68c2b anv: Take the set of stages to flush in flush_descriptor_sets
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8594>
2021-01-22 17:21:11 +00:00
Jason Ekstrand
16a81cabb5 anv: Exit early from cmd_buffer_apply_pipe_flushes
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8594>
2021-01-22 17:21:11 +00:00
Jason Ekstrand
f4902bb189 intel/genxml,anv,iris: Drop the legacy compute path from gen125.xml
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
2021-01-13 13:10:28 -08:00
Jason Ekstrand
8f85e68dea anv: Enable push constants on gen12-hp
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
2021-01-13 13:10:28 -08:00
Jordan Justen
a6f8d59142 anv: Use COMPUTE_WALKER for gen12-hp
Rework: Rafael Antognolli, Jason Ekstrand
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
2021-01-13 13:10:28 -08:00
Jordan Justen
91fe96cfbe anv: Don't use MEDIA_INTERFACE_DESCRIPTOR_LOAD for gen12-hp
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
2021-01-13 13:10:27 -08:00
Tapani Pälli
5998a6543a anv: fix calculation of buffer size in case dynamic size is used
VK spec got clarification about the pSizes parameter.

Fixes set of new tests:
   dEQP-VK.pipeline.extended_dynamic_state*with_offset*

v2: move offset subtract to be part of size calculation (Jason)

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3871
Fixes: b9a05447a1 ("anv: dynamic vertex input binding stride and size support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7439>
2020-12-10 08:26:34 +02:00
Jason Ekstrand
802fabdaa4 Revert "anv/image: Define anv_image_get_aux_addr (v3)"
This reverts commit 87dc3106b0.

Fixes: 87dc3106b0 "anv/image: Define anv_image_get_aux_addr (v3)"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3826
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7670>
2020-11-17 23:27:42 -06:00
Chad Versace
87dc3106b0 anv/image: Define anv_image_get_aux_addr (v3)
Simple refactor. No intended change in behavior.

Replace each derivation of aux address with anv_image_get_aux_addr().

The function will soon do more in support of
VK_EXT_image_drm_format_modifier, where the image bo and aux bo may be
disjoint.

v2:
  - Replace param 'aspect' with 'plane'.
v3:
  - Workaround for stencil ccs. If no aux surface, then return
    ANV_NULL_ADDRESS.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v2)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v3)
2020-11-17 10:36:45 -08:00
Sagar Ghuge
dc22d6b3ab anv: Pass correct stencil aux usage during MSAA resolve
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
2020-10-22 21:42:36 +00:00
Sagar Ghuge
c76ebc0c7a anv: Set stencil_aux_usage flag
v2: Use image aux usage (Nanley Chery)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
2020-10-22 21:42:36 +00:00
Sagar Ghuge
be2ca24da5 anv: Handle compressed stencil buffer transition on Gen12+
Handle compressed stencil buffer transition from one layout to another
on gen12+.

When stencil compression is enabled, we have to initialize buffer via
stencil clear (HZ_OP) before any renderpass.

v2:
- Pass predicate bit false to anv_image_ccs_op (Nanley Chery)

v3:
- update aspect assertion (Nanley Chery)

v4:
- Make state decision based on anv_layout_to_aux_state instated of
  anv_layout_to_aux_usage (Sagar Ghuge)

v5:
- No need to handle stencil CCS resolve case (Jason Ekstrand)
- Initialize buffer using HZ_OP (Nanley Chery)

v6: (Nanley Chery)
- Pass correct layer/level count.
- Remove local variable.

v7:
- Skip stencil initialization with HZ_OP packet if followed by fast
  clear. (Nanley Chery)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2942>
2020-10-22 21:42:36 +00:00
Kenneth Graunke
02fe825a61 isl, anv, iris: Add a centralized helper to select MOCS based on usage
On Gen12+, we can enable additional caches in certain usage situations.
This routes that decision making to a central place in ISL, based on
surface usage flags, and updates both drivers to use it.  (i965 doesn't
need to change because it doesn't support Gen12.)

We continue handling the "external" decision via an anv_mocs() wrapper
for now, since we store that flag in anv_bo, which isl doesn't know
about.  (We could introduce an ISL_SURF_USAGE_EXTERNAL, but I'm not
actually sure that would be cleaner.)

This patch should not have any functional nor performance effects, as
we continue selecting the exact same MOCS values for now.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7104>
2020-10-19 19:18:11 +00:00
Jason Ekstrand
9a062383e3 anv: Implement VariableDescriptorCount
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7180>
2020-10-19 14:50:47 +00:00